C++ (Cpp) soc_is_ar724x示例

示例#1

文件： dev-common.c 项目： NETFORCE2/OpenWrt-14.07-Barrier-Breaker

void __init ath79_register_uart(void)
{
	struct clk *clk;

	clk = clk_get(NULL, "uart");
	if (IS_ERR(clk))
		panic("unable to get UART clock, err=%ld", PTR_ERR(clk));

	if (soc_is_ar71xx())
		ath79_gpio_function_enable(AR71XX_GPIO_FUNC_UART_EN);
	else if (soc_is_ar724x())
		ath79_gpio_function_enable(AR724X_GPIO_FUNC_UART_EN);
	else if (soc_is_ar913x())
		ath79_gpio_function_enable(AR913X_GPIO_FUNC_UART_EN);
	else if (soc_is_ar933x())
		ath79_gpio_function_enable(AR933X_GPIO_FUNC_UART_EN);

	if (soc_is_ar71xx() ||
	    soc_is_ar724x() ||
	    soc_is_ar913x() ||
	    soc_is_ar934x() ||
	    soc_is_qca953x() ||
	    soc_is_qca955x()) {
		ath79_uart_data[0].uartclk = clk_get_rate(clk);
		platform_device_register(&ath79_uart_device);
	} else if (soc_is_ar933x()) {
		ar933x_uart_data.uartclk = clk_get_rate(clk);
		platform_device_register(&ar933x_uart_device);
	} else {
		BUG();
	}
}

示例#2

void __init ath79_register_uart(void)
{
	unsigned long uart_clk_rate;

	uart_clk_rate = ath79_get_sys_clk_rate("uart");

	if (soc_is_ar71xx())
		ath79_gpio_function_enable(AR71XX_GPIO_FUNC_UART_EN);
	else if (soc_is_ar724x())
		ath79_gpio_function_enable(AR724X_GPIO_FUNC_UART_EN);
	else if (soc_is_ar913x())
		ath79_gpio_function_enable(AR913X_GPIO_FUNC_UART_EN);
	else if (soc_is_ar933x())
		ath79_gpio_function_enable(AR933X_GPIO_FUNC_UART_EN);

	if (soc_is_ar71xx() ||
	    soc_is_ar724x() ||
	    soc_is_ar913x() ||
	    soc_is_ar934x() ||
	    soc_is_qca955x()) {
		ath79_uart_data[0].uartclk = uart_clk_rate;
		platform_device_register(&ath79_uart_device);
	} else if (soc_is_ar933x()) {
		platform_device_register(&ar933x_uart_device);
	} else {
		BUG();
	}
}

示例#3

文件： irq.c 项目： NETFORCE2/OpenWrt-14.07-Barrier-Breaker

static void __init ath79_misc_irq_init(void)
{
	void __iomem *base = ath79_reset_base;
	int i;

	__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
	__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);

	if (soc_is_ar71xx() || soc_is_ar913x())
		ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
	else if (soc_is_ar724x() ||
		 soc_is_ar933x() ||
		 soc_is_ar934x() ||
		 soc_is_qca953x() ||
		 soc_is_qca955x())
		ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
	else
		BUG();

	for (i = ATH79_MISC_IRQ_BASE;
	     i < ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT; i++) {
		irq_set_chip_and_handler(i, &ath79_misc_irq_chip,
					 handle_level_irq);
	}

	irq_set_chained_handler(ATH79_CPU_IRQ(6), ath79_misc_irq_handler);
}

示例#4

文件： irq.c 项目： 03199618/linux

void __init arch_init_irq(void)
{
	if (soc_is_ar71xx()) {
		ath79_ip2_handler = ar71xx_ip2_handler;
		ath79_ip3_handler = ar71xx_ip3_handler;
	} else if (soc_is_ar724x()) {
		ath79_ip2_handler = ar724x_ip2_handler;
		ath79_ip3_handler = ar724x_ip3_handler;
	} else if (soc_is_ar913x()) {
		ath79_ip2_handler = ar913x_ip2_handler;
		ath79_ip3_handler = ar913x_ip3_handler;
	} else if (soc_is_ar933x()) {
		ath79_ip2_handler = ar933x_ip2_handler;
		ath79_ip3_handler = ar933x_ip3_handler;
	} else if (soc_is_ar934x()) {
		ath79_ip2_handler = ath79_default_ip2_handler;
		ath79_ip3_handler = ar934x_ip3_handler;
	} else if (soc_is_qca955x()) {
		ath79_ip2_handler = ath79_default_ip2_handler;
		ath79_ip3_handler = ath79_default_ip3_handler;
	} else {
		BUG();
	}

	cp0_perfcount_irq = ATH79_MISC_IRQ(5);
	mips_cpu_irq_init();
	ath79_misc_irq_init();

	if (soc_is_ar934x())
		ar934x_ip2_irq_init();
	else if (soc_is_qca955x())
		qca955x_irq_init();
}

示例#5

文件： common.c 项目： NETFORCE2/OpenWrt-14.07-Barrier-Breaker

void ath79_device_reset_clear(u32 mask)
{
	unsigned long flags;
	u32 reg;
	u32 t;

	if (soc_is_ar71xx())
		reg = AR71XX_RESET_REG_RESET_MODULE;
	else if (soc_is_ar724x())
		reg = AR724X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar913x())
		reg = AR913X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar933x())
		reg = AR933X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar934x())
		reg = AR934X_RESET_REG_RESET_MODULE;
	else if (soc_is_qca953x())
		reg = QCA953X_RESET_REG_RESET_MODULE;
	else if (soc_is_qca955x())
		reg = QCA955X_RESET_REG_RESET_MODULE;
	else
		panic("Reset register not defined for this SOC");

	spin_lock_irqsave(&ath79_device_reset_lock, flags);
	t = ath79_reset_rr(reg);
	ath79_reset_wr(reg, t & ~mask);
	spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
}

示例#6

static void __iomem *ath79_gpio_get_function_reg(void)
{
	u32 reg = 0;

	if (soc_is_ar71xx() ||
	    soc_is_ar724x() ||
	    soc_is_ar913x() ||
	    soc_is_ar933x())
		reg = AR71XX_GPIO_REG_FUNC;
	else if (soc_is_ar934x())
		reg = AR934X_GPIO_REG_FUNC;
	else
		BUG();

	return ath79_gpio_base + reg;
}

示例#7

文件： pci.c 项目： 7L/pi_plus

int __init ath79_register_pci(void)
{
	if (soc_is_ar71xx())
		return ar71xx_pcibios_init();

	if (soc_is_ar724x())
		return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2);

	if (soc_is_ar9342() || soc_is_ar9344()) {
		u32 bootstrap;

		bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
		if (bootstrap & AR934X_BOOTSTRAP_PCIE_RC)
			return ar724x_pcibios_init(ATH79_IP2_IRQ(0));
	}

	return -ENODEV;
}

示例#8

文件： pci.c 项目： 7L/pi_plus

int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
{
	int irq = -1;
	int i;

	if (ath79_pci_nr_irqs == 0 ||
	    ath79_pci_irq_map == NULL) {
		if (soc_is_ar71xx()) {
			ath79_pci_irq_map = ar71xx_pci_irq_map;
			ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map);
		} else if (soc_is_ar724x() ||
			   soc_is_ar9342() ||
			   soc_is_ar9344()) {
			ath79_pci_irq_map = ar724x_pci_irq_map;
			ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
		} else {
			pr_crit("pci %s: invalid irq map\n",
				pci_name((struct pci_dev *) dev));
			return irq;
		}
	}

	for (i = 0; i < ath79_pci_nr_irqs; i++) {
		const struct ath79_pci_irq *entry;

		entry = &ath79_pci_irq_map[i];
		if (entry->slot == slot && entry->pin == pin) {
			irq = entry->irq;
			break;
		}
	}

	if (irq < 0)
		pr_crit("pci %s: no irq found for pin %u\n",
			pci_name((struct pci_dev *) dev), pin);
	else
		pr_info("pci %s: using irq %d for pin %u\n",
			pci_name((struct pci_dev *) dev), irq, pin);

	return irq;
}

示例#9

文件： irq.c 项目： romanbb/android_kernel_lge_d851

void __init arch_init_irq(void)
{
	if (soc_is_ar71xx()) {
		ath79_ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI;
		ath79_ip3_flush_reg = AR71XX_DDR_REG_FLUSH_USB;
	} else if (soc_is_ar724x()) {
		ath79_ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE;
		ath79_ip3_flush_reg = AR724X_DDR_REG_FLUSH_USB;
	} else if (soc_is_ar913x()) {
		ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC;
		ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB;
	} else if (soc_is_ar933x()) {
		ath79_ip2_flush_reg = AR933X_DDR_REG_FLUSH_WMAC;
		ath79_ip3_flush_reg = AR933X_DDR_REG_FLUSH_USB;
	} else
		BUG();

	cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC;
	mips_cpu_irq_init();
	ath79_misc_irq_init();
}

示例#10

文件： dev-common.c 项目： 7L/pi_plus

void __init ath79_register_uart(void)
{
	struct clk *clk;

	clk = clk_get(NULL, "uart");
	if (IS_ERR(clk))
		panic("unable to get UART clock, err=%ld", PTR_ERR(clk));

	if (soc_is_ar71xx() ||
	    soc_is_ar724x() ||
	    soc_is_ar913x() ||
	    soc_is_ar934x()) {
		ath79_uart_data[0].uartclk = clk_get_rate(clk);
		platform_device_register(&ath79_uart_device);
	} else if (soc_is_ar933x()) {
		ar933x_uart_data.uartclk = clk_get_rate(clk);
		platform_device_register(&ar933x_uart_device);
	} else {
		BUG();
	}
}

示例#11

文件： gpio.c 项目： openube/android_kernel_sony_c2305

void __init ath79_gpio_init(void)
{
	int err;

	if (soc_is_ar71xx())
		ath79_gpio_count = AR71XX_GPIO_COUNT;
	else if (soc_is_ar724x())
		ath79_gpio_count = AR724X_GPIO_COUNT;
	else if (soc_is_ar913x())
		ath79_gpio_count = AR913X_GPIO_COUNT;
	else if (soc_is_ar933x())
		ath79_gpio_count = AR933X_GPIO_COUNT;
	else
		BUG();

	ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
	ath79_gpio_chip.ngpio = ath79_gpio_count;

	err = gpiochip_add(&ath79_gpio_chip);
	if (err)
		panic("cannot add AR71xx GPIO chip, error=%d", err);
}

示例#12

文件： irq.c 项目： ilikenwf/zen-kernel

void __init arch_init_irq(void)
{
	if (mips_machtype == ATH79_MACH_GENERIC_OF) {
		irqchip_init();
		return;
	}

	if (soc_is_ar71xx() || soc_is_ar724x() ||
	    soc_is_ar913x() || soc_is_ar933x()) {
		irq_wb_chan[2] = 3;
		irq_wb_chan[3] = 2;
	} else if (soc_is_ar934x()) {
		irq_wb_chan[3] = 2;
	}

	mips_cpu_irq_init();
	ath79_misc_irq_init();

	if (soc_is_ar934x())
		ar934x_ip2_irq_init();
	else if (soc_is_qca955x())
		qca955x_irq_init();
}

示例#13

文件： common.c 项目： NETFORCE2/OpenWrt-14.07-Barrier-Breaker

u32 ath79_device_reset_get(u32 mask)
{
	unsigned long flags;
	u32 reg;
	u32 ret;

	if (soc_is_ar71xx())
		reg = AR71XX_RESET_REG_RESET_MODULE;
	else if (soc_is_ar724x())
		reg = AR724X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar913x())
		reg = AR913X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar933x())
		reg = AR933X_RESET_REG_RESET_MODULE;
	else if (soc_is_ar934x())
		reg = AR934X_RESET_REG_RESET_MODULE;
	else
		BUG();

	spin_lock_irqsave(&ath79_device_reset_lock, flags);
	ret = ath79_reset_rr(reg);
	spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
	return ret;
}