void spdif_fifo_write(unsigned long base, int mode, u32 data)
{
if (mode == AUDIO_TX_MODE)
{
spdif_writel(base, data, SPDIF_DATA_OUT_0);
}
if (mode == AUDIO_RX_MODE)
{
spdif_writel(base, data, SPDIF_DATA_IN_0);
}
}
int spdif_fifo_write(int ifc, int mode, u32 data)
{
unsigned long base = spinfo->base;
if (mode == AUDIO_TX_MODE) {
spdif_writel(base, data, SPDIF_DATA_OUT_0);
} else {
spdif_writel(base, data, SPDIF_DATA_IN_0);
}
return 0;
}
int spdif_ack_status(int ifc)
{
unsigned long base = spinfo->base;
spdif_writel(base, spdif_readl(base, SPDIF_STATUS_0),
SPDIF_STATUS_0);
return 0;
}
int spdif_set_fifo_packed(unsigned long base, unsigned on)
{
u32 val = spdif_readl(base, SPDIF_CTRL_0);
val &= ~SPDIF_CTRL_0_PACK;
val |= on ? (SPDIF_CTRL_0_PACK) : 0;
spdif_writel(base, val, SPDIF_CTRL_0);
return 0;
}
void spdif_fifo_clear(unsigned long base, int mode)
{
u32 val = spdif_readl(base, SPDIF_DATA_FIFO_CSR_0);
if (mode == AUDIO_TX_MODE)
{
val &= ~(SPDIF_DATA_FIFO_CSR_0_TX_CLR | SPDIF_DATA_FIFO_CSR_0_TU_CLR);
val |= SPDIF_DATA_FIFO_CSR_0_TX_CLR | SPDIF_DATA_FIFO_CSR_0_TU_CLR;
}
spdif_writel(base, val, SPDIF_DATA_FIFO_CSR_0);
}
int spdif_initialize(unsigned long base, int mode)
{
/* disable interrupts from SPDIF */
spdif_writel(base, 0x0, SPDIF_CTRL_0);
spdif_fifo_clear(base, mode);
spdif_fifo_enable(base, mode, 0);
spdif_set_bit_mode(base, SPDIF_BIT_MODE_MODE16BIT);
spdif_set_fifo_packed(base, 1);
spdif_set_sample_rate(0, mode, 48000);
return 0;
}
int spdif_set_bit_mode(unsigned long base, unsigned mode)
{
u32 val = spdif_readl(base, SPDIF_CTRL_0);
val &= ~SPDIF_CTRL_0_BIT_MODE_MASK;
if (mode > SPDIF_BIT_MODE_MODERAW) {
pr_err("%s: invalid bit_size selector %d\n", __func__,
mode);
return -EINVAL;
}
val |= mode << SPDIF_CTRL_0_BIT_MODE_SHIFT;
spdif_writel(base, val, SPDIF_CTRL_0);
return 0;
}
int spdif_fifo_clear(int ifc, int mode)
{
unsigned long base = spinfo->base;
u32 val = spdif_readl(base, SPDIF_DATA_FIFO_CSR_0);
if (mode == AUDIO_TX_MODE) {
val &= ~(SPDIF_DATA_FIFO_CSR_0_TX_CLR |
SPDIF_DATA_FIFO_CSR_0_TU_CLR);
val |= SPDIF_DATA_FIFO_CSR_0_TX_CLR |
SPDIF_DATA_FIFO_CSR_0_TU_CLR;
}
spdif_writel(base, val, SPDIF_DATA_FIFO_CSR_0);
return 0;
}
void spdif_fifo_enable(unsigned long base, int mode, int on)
{
u32 val = spdif_readl(base, SPDIF_CTRL_0);
if (mode == AUDIO_TX_MODE)
{
val &= ~(SPDIF_CTRL_0_TU_EN | SPDIF_CTRL_0_TC_EN | SPDIF_CTRL_0_TX_EN);
val |= on ? (SPDIF_CTRL_0_TX_EN) : 0;
val |= on ? (SPDIF_CTRL_0_TC_EN) : 0;
}
if (mode == AUDIO_RX_MODE)
{
val &= ~SPDIF_CTRL_0_RX_EN;
val |= on ? (SPDIF_CTRL_0_RX_EN) : 0;
}
spdif_writel(base, val, SPDIF_CTRL_0);
}
int spdif_fifo_set_attention_level(int ifc, int mode, unsigned int level)
{
u32 val;
unsigned long base = spinfo->base;
if (level > SPDIF_FIFO_ATN_LVL_TWELVE_SLOTS) {
pr_err("%s: invalid fifo level selector %d\n", __func__,
level);
return -EINVAL;
}
val = spdif_readl(base, SPDIF_DATA_FIFO_CSR_0);
if (mode == AUDIO_TX_MODE) {
val &= ~SPDIF_DATA_FIFO_CSR_0_TX_ATN_LVL_MASK;
val |= level << SPDIF_DATA_FIFO_CSR_0_TX_ATN_LVL_SHIFT;
}
spdif_writel(base, val, SPDIF_DATA_FIFO_CSR_0);
return 0;
}
int spdif_set_sample_rate(int ifc, int fifo_mode, unsigned int sample_rate)
{
unsigned int rate = 0;
unsigned long base = spinfo->base;
unsigned int ch_sta[] = {
0x0, /* 44.1, default values */
0x0,
0x0,
0x0,
0x0,
0x0,
};
switch (sample_rate) {
case 32000:
ch_sta[0] = 0x3 << 24;
ch_sta[1] = 0xC << 4;
break;
case 44100:
ch_sta[0] = 0x0;
ch_sta[1] = 0xF << 4;
break;
case 48000:
ch_sta[0] = 0x2 << 24;
ch_sta[1] = 0xD << 4;
break;
case 88200:
case 96000:
case 176400:
case 192000:
break;
default:
return -1;
}
spdif_writel(base, ch_sta[0], SPDIF_CH_STA_TX_A_0);
spdif_writel(base, ch_sta[1], SPDIF_CH_STA_TX_B_0);
spdif_writel(base, ch_sta[2], SPDIF_CH_STA_TX_C_0);
spdif_writel(base, ch_sta[3], SPDIF_CH_STA_TX_D_0);
spdif_writel(base, ch_sta[4], SPDIF_CH_STA_TX_E_0);
spdif_writel(base, ch_sta[5], SPDIF_CH_STA_TX_F_0);
rate = sample_rate << 7; /* sr*128 */
spdif_clock_set_rate(0, fifo_mode, rate);
return 0;
}
int spdif_set_sample_rate(unsigned long base, unsigned int sample_rate)
{
unsigned int ch_sta[] = {
0x0, /* 44.1, default values */
0x0,
0x0,
0x0,
0x0,
0x0,
};
switch (sample_rate) {
case 32000:
ch_sta[0] = 0x3 << 24;
ch_sta[1] = 0xC << 4;
break;
case 44100:
ch_sta[0] = 0x0;
ch_sta[1] = 0xF << 4;
break;
case 48000:
ch_sta[0] = 0x2 << 24;
ch_sta[1] = 0xD << 4;
break;
case 88200:
case 96000:
case 176400:
case 192000:
break;
default:
return -1;
}
spdif_writel(base, ch_sta[0], SPDIF_CH_STA_TX_A_0);
spdif_writel(base, ch_sta[1], SPDIF_CH_STA_TX_B_0);
spdif_writel(base, ch_sta[2], SPDIF_CH_STA_TX_C_0);
spdif_writel(base, ch_sta[3], SPDIF_CH_STA_TX_D_0);
spdif_writel(base, ch_sta[4], SPDIF_CH_STA_TX_E_0);
spdif_writel(base, ch_sta[5], SPDIF_CH_STA_TX_F_0);
return 0;
}
void spdif_ack_status(unsigned long base)
{
return spdif_writel(base, spdif_readl(base, SPDIF_STATUS_0),
SPDIF_STATUS_0);
}
