void can_reset(void) { //ENABLE SLAVE AND SEND TRANSMIT CODE spi_chipselect(ENABLE); spi_tx_rx(RESET); spi_chipselect(DISABLE); }
void can_config(int mode) { can_reset(); //reset mcp spi_chipselect(ENABLE); //enable slave spi_tx_rx(WRITE_CMD); //Enter config mode //Send address of CAN CONTROL registerxFF because 0xXFH is mentioned //0b10000000 to enter config mode //be aware of potential delay while setting config_mode can_write_reg(0xFF,0x80); //check config mode is achieved or not spi_chipselect(DISABLE); if(can_read_status()>>5 !=0x04) { printf("\n\rERROR UNABLE TO ENTER CONFIG MODE\n\r"); } else {
void can_rx_if_clear(void) { spi_chipselect(ENABLE); spi_tx_rx(BIT_MODIFY_CMD); spi_tx_rx(INT_FLAG_ADDR); spi_tx_rx(RX_MASK); spi_tx_rx(0x00); //send 0x00 to clear flags spi_chipselect(DISABLE); }
static int stellaris_spi_setup(struct spi_device *spi) { struct spi_stellaris_config *priv_dev; struct spi_stellaris_data *priv_master; if( spi->chip_select >= spi->master->num_chipselect ) return -EINVAL; priv_dev = kmalloc(sizeof(struct spi_stellaris_config), GFP_KERNEL); if( priv_dev == 0 ) return -ENOMEM; priv_master = spi_master_get_devdata(spi->master); spi_set_ctldata(spi, priv_dev); priv_dev->gpio_chipselect = priv_master->chipselect[spi->chip_select]; spi_config(priv_dev, spi->mode, spi->bits_per_word, spi->max_speed_hz); spi_chipselect(spi, BITBANG_CS_INACTIVE); dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", __func__, spi->mode, spi->bits_per_word, spi->max_speed_hz); return 0; }
void can_transmit(uint8_t buff_num,uint8_t msg_id,uint8_t length, char *data) //ask that can we for address use 8_t!!!!! { unsigned char temp=0; //always maximum priority is used, standard frames no remote request spi_chipselect(ENABLE); //enable slave (mcp) //check for pending transmissions spi_tx_rx((unsigned char)READ_CMD); spi_tx_rx((unsigned char)0x30+(buff_num*0x10)); //send address of Transmit Control Register (add 10 to base address to point to other buffers) temp=spi_tx_rx((unsigned char)0); //send zero and get status of buffer (Transmit Control Register) in temp while(temp & 0x08) //0x08 because TXREQ is position 3 in Transmit control buffer!!!! { spi_chipselect(ENABLE); // temp=spi_tx_rx((unsigned char)0); //keep receiving status of control Transmit Control Register until TXREQ is 0 !!!! spi_tx_rx((unsigned char)READ_CMD); spi_tx_rx((unsigned char)0x30+(buff_num*0x10)); //send address of Transmit Control Register (add 10 to base address to point to other buffers) temp=spi_tx_rx((unsigned char)0); //send zero and get status of buffer (Transmit Control Register) in temp spi_chipselect(DISABLE); } spi_chipselect(DISABLE); //preparing TX buffer to start transmission //priority spi_chipselect(ENABLE); spi_tx_rx((unsigned char)WRITE_CMD); //send write command when flag is cleared spi_tx_rx((unsigned char)0x30+(buff_num*0x10)); //send address of Transmit Control Register (add 10 to base address to point to other registers) spi_tx_rx((unsigned char)0x03); //send message priority as highest (first 2 bits in control register)!!!! spi_chipselect(DISABLE); //higher byte of ID spi_chipselect(ENABLE); spi_tx_rx(WRITE_CMD); spi_tx_rx(0x31+(buff_num*0x10)); //send address of Transmit Buffer Std. Identifier HIGH Register (add 10 to base address to point to other registers) spi_tx_rx((unsigned char)msg_id>>3); //shift out lower 3 bits!!!! spi_chipselect(DISABLE); //lower byte of ID spi_chipselect(ENABLE); spi_tx_rx(WRITE_CMD); spi_tx_rx((unsigned char)0x32+(buff_num*0x10)); //send address of Transmit Buffer Std. Identifier LOW Register (add 10 to base address to point to other registers) spi_tx_rx((unsigned char)msg_id<<5); //shift lower 5 bits to higher position!!!! spi_chipselect(DISABLE); //length of data spi_chipselect(ENABLE); spi_tx_rx(WRITE_CMD); spi_tx_rx((unsigned char)0x35+(buff_num*0x10)); //send address of Transmit Buffer Data Length Register, RTR is always 0!!! spi_tx_rx((unsigned char)(length & 0x0F)); //only lower 4 bits of length are used, RTR=0 spi_chipselect(DISABLE); //NOW DATA IS SENT spi_chipselect(ENABLE); spi_tx_rx(WRITE_CMD); spi_tx_rx((unsigned char)((0x36+(buff_num*0x10)))); unsigned char loop_var; for(loop_var=0;loop_var<length;loop_var++) { //spi_tx_rx((unsigned char)((0x36+(buff_num*0x10))+loop_var)); //transmit buffer data registers addresses spi_tx_rx(data[loop_var]); //data to be sent!!!! } spi_chipselect(DISABLE); //set TXREQ to initiate transmission spi_chipselect(ENABLE); spi_tx_rx(WRITE_CMD); //TX initiation part spi_tx_rx((unsigned char)0x30+(buff_num*0x10)); //send address of Transmit Control Register (add 10 to base address to point to other registers) spi_tx_rx((unsigned char)0x08); //set TXREQ to start transmission, it is 4th bit!!!! spi_chipselect(DISABLE); //disable slave //clear flag!!! YULONG THE GREAT can_rx_if_clear(); }