struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct spi_slave *slave;
u32 data;
#ifdef CONFIG_KIRKWOOD
static const u32 kwspi_mpp_config[2][2] = {
{ MPP0_SPI_SCn, 0 }, /* if cs == 0 */
{ MPP7_SPI_SCn, 0 } /* if cs != 0 */
};
#endif
if (!spi_cs_is_valid(bus, cs))
return NULL;
slave = spi_alloc_slave_base(bus, cs);
if (!slave)
return NULL;
writel(KWSPI_SMEMRDY, &spireg->ctrl);
/* calculate spi clock prescaller using max_hz */
data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10;
data = data < KWSPI_CLKPRESCL_MIN ? KWSPI_CLKPRESCL_MIN : data;
data = data > KWSPI_CLKPRESCL_MASK ? KWSPI_CLKPRESCL_MASK : data;
/* program spi clock prescaller using max_hz */
writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg);
debug("data = 0x%08x\n", data);
writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
writel(KWSPI_IRQMASK, &spireg->irq_mask);
#ifdef CONFIG_KIRKWOOD
/* program mpp registers to select SPI_CSn */
kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back);
#endif
return slave;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct fsl_spi_slave *fsl;
sys_info_t sysinfo;
unsigned long spibrg = 0;
unsigned char pm = 0;
if (!spi_cs_is_valid(bus, cs))
return NULL;
fsl = malloc(sizeof(struct fsl_spi_slave));
if (!fsl)
return NULL;
fsl->slave.bus = bus;
fsl->slave.cs = cs;
fsl->mode = mode;
fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
/* Set eSPI BRG clock source */
get_sys_info(&sysinfo);
spibrg = sysinfo.freqSystemBus / 2;
fsl->div16 = 0;
if ((spibrg / max_hz) > 32) {
fsl->div16 = ESPI_CSMODE_DIV16;
pm = spibrg / (max_hz * 16 * 2);
if (pm > 16) {
pm = 16;
debug("Requested speed is too low: %d Hz, "
"%d Hz is used.\n", max_hz, spibrg / (32 * 16));
}
} else
pm = spibrg / (max_hz * 2);
if (pm)
pm--;
fsl->pm = pm;
return &fsl->slave;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct spi_slave *slave;
if (!spi_cs_is_valid(bus, cs))
return NULL;
slave = malloc(sizeof(struct spi_slave));
if (!slave)
return NULL;
slave->bus = bus;
slave->cs = cs;
/*
* TODO: Some of the code in spi_init() should probably move
* here, or into spi_claim_bus() below.
*/
return slave;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct davinci_spi_slave *ds;
if (!spi_cs_is_valid(bus, cs))
return NULL;
ds = spi_alloc_slave(struct davinci_spi_slave, bus, cs);
if (!ds)
return NULL;
ds->slave.bus = bus;
ds->slave.cs = cs;
switch (bus) {
case SPI0_BUS:
ds->regs = (struct davinci_spi_regs *)SPI0_BASE;
break;
#ifdef CONFIG_SYS_SPI1
case SPI1_BUS:
ds->regs = (struct davinci_spi_regs *)SPI0_BASE;
break;
#endif
#ifdef CONFIG_SYS_SPI2
case SPI2_BUS:
ds->regs = (struct davinci_spi_regs *)SPI2_BASE;
break;
#endif
default: /* Invalid bus number */
return NULL;
}
ds->freq = max_hz;
return &ds->slave;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct imx_spi_dev_t *imx_spi_slave = NULL;
if (!spi_cs_is_valid(bus, cs))
return NULL;
imx_spi_slave =
(struct imx_spi_dev_t *)malloc(sizeof(struct imx_spi_dev_t));
if (!imx_spi_slave)
return NULL;
imx_spi_slave->slave.bus = bus;
imx_spi_slave->slave.cs = cs;
spi_get_cfg(imx_spi_slave);
spi_io_init(imx_spi_slave);
spi_reset(&(imx_spi_slave->slave));
return &(imx_spi_slave->slave);
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct atmel_spi_slave *as;
unsigned int scbr;
u32 csrx;
void *regs;
if (!spi_cs_is_valid(bus, cs))
return NULL;
switch (bus) {
case 0:
regs = (void *)ATMEL_BASE_SPI0;
break;
#ifdef ATMEL_BASE_SPI1
case 1:
regs = (void *)ATMEL_BASE_SPI1;
break;
#endif
#ifdef ATMEL_BASE_SPI2
case 2:
regs = (void *)ATMEL_BASE_SPI2;
break;
#endif
#ifdef ATMEL_BASE_SPI3
case 3:
regs = (void *)ATMEL_BASE_SPI3;
break;
#endif
default:
return NULL;
}
scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz;
if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
/* Too low max SCK rate */
return NULL;
if (scbr < 1)
scbr = 1;
csrx = ATMEL_SPI_CSRx_SCBR(scbr);
csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
if (!(mode & SPI_CPHA))
csrx |= ATMEL_SPI_CSRx_NCPHA;
if (mode & SPI_CPOL)
csrx |= ATMEL_SPI_CSRx_CPOL;
as = spi_alloc_slave(struct atmel_spi_slave, bus, cs);
if (!as)
return NULL;
as->regs = regs;
as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS
| ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf);
if (spi_has_wdrbt(as))
as->mr |= ATMEL_SPI_MR_WDRBT;
spi_writel(as, CSR(cs), csrx);
return &as->slave;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct atmel_spi_slave *as;
unsigned int scbr;
u32 csrx;
void *regs;
if (cs > 3 || !spi_cs_is_valid(bus, cs))
return NULL;
switch (bus) {
case 0:
regs = (void *)SPI0_BASE;
break;
#ifdef SPI1_BASE
case 1:
regs = (void *)SPI1_BASE;
break;
#endif
#ifdef SPI2_BASE
case 2:
regs = (void *)SPI2_BASE;
break;
#endif
#ifdef SPI3_BASE
case 3:
regs = (void *)SPI3_BASE;
break;
#endif
default:
return NULL;
}
scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz;
if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
/* Too low max SCK rate */
return NULL;
if (scbr < 1)
scbr = 1;
csrx = ATMEL_SPI_CSRx_SCBR(scbr);
csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
if (!(mode & SPI_CPHA))
csrx |= ATMEL_SPI_CSRx_NCPHA;
if (mode & SPI_CPOL)
csrx |= ATMEL_SPI_CSRx_CPOL;
as = malloc(sizeof(struct atmel_spi_slave));
if (!as)
return NULL;
as->slave.bus = bus;
as->slave.cs = cs;
as->regs = regs;
as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS
| ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf);
spi_writel(as, CSR(cs), csrx);
return &as->slave;
}
