void eeprom_init (void)
{
#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
spi_init_f ();
#endif
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
}
void eeprom_init (void)
{
#if defined(CONFIG_SPI)
spi_init_f ();
#endif
#if defined(CONFIG_HARD_I2C) || \
defined(CONFIG_SOFT_I2C)
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
#endif
}
static int initr_spi(void)
{
/* PPC does this here */
#ifdef CONFIG_SPI
#if !defined(CONFIG_ENV_IS_IN_EEPROM)
spi_init_f();
#endif
spi_init_r();
#endif
return 0;
}
static int test_ctlr (int ctlr, int index)
{
int res = -1;
char packet_send[MAX_PACKET_LENGTH];
char packet_recv[MAX_PACKET_LENGTH];
int length;
int i;
int l;
ctlr_proc[ctlr].init (index);
for (i = 0; i < TEST_NUM; i++) {
for (l = MIN_PACKET_LENGTH; l <= MAX_PACKET_LENGTH; l++) {
packet_fill (packet_send, l);
ctlr_proc[ctlr].send (index, packet_send, l);
length = ctlr_proc[ctlr].recv (index, packet_recv,
MAX_PACKET_LENGTH);
if (length != l || packet_check (packet_recv, length) < 0) {
goto Done;
}
}
}
res = 0;
Done:
ctlr_proc[ctlr].halt (index);
/*
* SCC2 Ethernet parameter RAM space overlaps
* the SPI parameter RAM space. So we need to restore
* the SPI configuration after SCC2 ethernet test.
*/
#if defined(CONFIG_SPI)
if (ctlr == CTLR_SCC && index == 1) {
spi_init_f ();
spi_init_r ();
}
#endif
if (res != 0) {
post_log ("ethernet %s%d test failed\n", ctlr_name[ctlr],
index + 1);
}
return res;
}
void eeprom_init(int bus)
{
/* SPI EEPROM */
#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
spi_init_f();
#endif
/* I2C EEPROM */
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
#if defined(CONFIG_SYS_I2C)
if (bus >= 0)
i2c_set_bus_num(bus);
#endif
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
}
void board_init_f(ulong bootflag)
{
cmd_tbl_t *cmdtp;
bd_t *bd;
unsigned char *s;
init_fnc_t **init_fnc_ptr;
int j;
int i;
char *e;
#ifndef CONFIG_SYS_NO_FLASH
ulong flash_size;
#endif
gd = (gd_t *) (CONFIG_SYS_GBL_DATA_OFFSET);
/* Clear initial global data */
memset((void *)gd, 0, sizeof(gd_t));
gd->bd = (bd_t *) (gd + 1); /* At end of global data */
gd->baudrate = CONFIG_BAUDRATE;
gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
bd = gd->bd;
bd->bi_memstart = CONFIG_SYS_RAM_BASE;
bd->bi_memsize = CONFIG_SYS_RAM_SIZE;
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
#if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;
#endif
bd->bi_baudrate = CONFIG_BAUDRATE;
bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
gd->reloc_off = CONFIG_SYS_RELOC_MONITOR_BASE - CONFIG_SYS_MONITOR_BASE;
for (init_fnc_ptr = init_sequence, j = 0; *init_fnc_ptr;
++init_fnc_ptr, j++) {
#ifdef DEBUG_INIT_SEQUENCE
if (j > 9)
str_init_seq[9] = '0' + (j / 10);
str_init_seq[10] = '0' + (j - (j / 10) * 10);
serial_puts(str_init_seq);
#endif
if ((*init_fnc_ptr + gd->reloc_off) () != 0) {
hang();
}
}
#ifdef DEBUG_INIT_SEQUENCE
serial_puts(str_init_seq_done);
#endif
/*
* Now that we have DRAM mapped and working, we can
* relocate the code and continue running from DRAM.
*
* Reserve memory at end of RAM for (top down in that order):
* - kernel log buffer
* - protected RAM
* - LCD framebuffer
* - monitor code
* - board info struct
*/
#ifdef DEBUG_MEM_LAYOUT
printf("CONFIG_SYS_MONITOR_BASE: 0x%lx\n", CONFIG_SYS_MONITOR_BASE);
printf("CONFIG_ENV_ADDR: 0x%lx\n", CONFIG_ENV_ADDR);
printf("CONFIG_SYS_RELOC_MONITOR_BASE: 0x%lx (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
CONFIG_SYS_MONITOR_LEN);
printf("CONFIG_SYS_MALLOC_BASE: 0x%lx (%d)\n", CONFIG_SYS_MALLOC_BASE,
CONFIG_SYS_MALLOC_LEN);
printf("CONFIG_SYS_INIT_SP_OFFSET: 0x%lx (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
CONFIG_SYS_STACK_SIZE);
printf("CONFIG_SYS_PROM_OFFSET: 0x%lx (%d)\n", CONFIG_SYS_PROM_OFFSET,
CONFIG_SYS_PROM_SIZE);
printf("CONFIG_SYS_GBL_DATA_OFFSET: 0x%lx (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
CONFIG_SYS_GBL_DATA_SIZE);
#endif
#ifdef CONFIG_POST
post_bootmode_init();
post_run(NULL, POST_ROM | post_bootmode_get(0));
#endif
/*
* We have to relocate the command table manually
*/
for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
ulong addr;
addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
#if DEBUG_COMMANDS
printf("Command \"%s\": 0x%08lx => 0x%08lx\n",
cmdtp->name, (ulong) (cmdtp->cmd), addr);
#endif
cmdtp->cmd =
(int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
addr = (ulong) (cmdtp->name) + gd->reloc_off;
cmdtp->name = (char *)addr;
if (cmdtp->usage) {
addr = (ulong) (cmdtp->usage) + gd->reloc_off;
cmdtp->usage = (char *)addr;
}
#ifdef CONFIG_SYS_LONGHELP
if (cmdtp->help) {
addr = (ulong) (cmdtp->help) + gd->reloc_off;
cmdtp->help = (char *)addr;
}
#endif
}
#if defined(CONFIG_CMD_AMBAPP) && defined(CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP)
puts("AMBA:\n");
do_ambapp_print(NULL, 0, 0, NULL);
#endif
/* initialize higher level parts of CPU like time base and timers */
cpu_init_r();
/* start timer */
timer_interrupt_init();
/*
* Enable Interrupts before any calls to udelay,
* the flash driver may use udelay resulting in
* a hang if not timer0 IRQ is enabled.
*/
interrupt_init();
/* The Malloc area is immediately below the monitor copy in RAM */
mem_malloc_init(CONFIG_SYS_MALLOC_BASE,
CONFIG_SYS_MALLOC_END - CONFIG_SYS_MALLOC_BASE);
malloc_bin_reloc();
#if !defined(CONFIG_SYS_NO_FLASH)
puts("FLASH: ");
if ((flash_size = flash_init()) > 0) {
# ifdef CONFIG_SYS_FLASH_CHECKSUM
print_size(flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
s = getenv("flashchecksum");
if (s && (*s == 'y')) {
printf(" CRC: %08lX",
crc32(0, (const unsigned char *)CONFIG_SYS_FLASH_BASE,
flash_size)
);
}
putc('\n');
# else /* !CONFIG_SYS_FLASH_CHECKSUM */
print_size(flash_size, "\n");
# endif /* CONFIG_SYS_FLASH_CHECKSUM */
} else {
puts(failed);
hang();
}
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; /* update start of FLASH memory */
bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
#if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
#else
bd->bi_flashoffset = 0;
#endif
#else /* CONFIG_SYS_NO_FLASH */
bd->bi_flashsize = 0;
bd->bi_flashstart = 0;
bd->bi_flashoffset = 0;
#endif /* !CONFIG_SYS_NO_FLASH */
#ifdef CONFIG_SPI
# if !defined(CONFIG_ENV_IS_IN_EEPROM)
spi_init_f();
# endif
spi_init_r();
#endif
/* relocate environment function pointers etc. */
env_relocate();
#if defined(CONFIG_BOARD_LATE_INIT)
board_late_init();
#endif
#ifdef CONFIG_ID_EEPROM
mac_read_from_eeprom();
#endif
/* IP Address */
bd->bi_ip_addr = getenv_IPaddr("ipaddr");
#if defined(CONFIG_PCI)
/*
* Do pci configuration
*/
pci_init();
#endif
/* Initialize stdio devices */
stdio_init();
/* Initialize the jump table for applications */
jumptable_init();
/* Initialize the console (after the relocation and devices init) */
console_init_r();
#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
serial_buffered_init();
#endif
#ifdef CONFIG_STATUS_LED
status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
udelay(20);
set_timer(0);
/* Initialize from environment */
if ((s = getenv("loadaddr")) != NULL) {
load_addr = simple_strtoul(s, NULL, 16);
}
#if defined(CONFIG_CMD_NET)
if ((s = getenv("bootfile")) != NULL) {
copy_filename(BootFile, s, sizeof(BootFile));
}
#endif /* CONFIG_CMD_NET */
WATCHDOG_RESET();
#if defined(CONFIG_CMD_DOC)
WATCHDOG_RESET();
puts("DOC: ");
doc_init();
#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#if defined(CONFIG_CMD_NET)
#if defined(CONFIG_NET_MULTI)
WATCHDOG_RESET();
puts("Net: ");
#endif
eth_initialize(bd);
#endif
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
WATCHDOG_RESET();
debug("Reset Ethernet PHY\n");
reset_phy();
#endif
#ifdef CONFIG_POST
post_run(NULL, POST_RAM | post_bootmode_get(0));
#endif
#if defined(CONFIG_CMD_IDE)
WATCHDOG_RESET();
puts("IDE: ");
ide_init();
#endif /* CONFIG_CMD_IDE */
#ifdef CONFIG_LAST_STAGE_INIT
WATCHDOG_RESET();
/*
* Some parts can be only initialized if all others (like
* Interrupts) are up and running (i.e. the PC-style ISA
* keyboard).
*/
last_stage_init();
#endif
#ifdef CONFIG_PS2KBD
puts("PS/2: ");
kbd_init();
#endif
prom_init();
/* main_loop */
for (;;) {
WATCHDOG_RESET();
main_loop();
}
}
/*
* This is the next part if the initialization sequence: we are now
* running from RAM and have a "normal" C environment, i. e. global
* data can be written, BSS has been cleared, the stack size in not
* that critical any more, etc.
*/
void board_init_r(gd_t *id, ulong dest_addr)
{
bd_t *bd;
ulong malloc_start;
#ifndef CONFIG_SYS_NO_FLASH
ulong flash_size;
#endif
gd = id; /* initialize RAM version of global data */
bd = gd->bd;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
/* The Malloc area is immediately below the monitor copy in DRAM */
malloc_start = dest_addr - TOTAL_MALLOC_LEN;
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
/*
* The gd->arch.cpu pointer is set to an address in flash before
* relocation. We need to update it to point to the same CPU entry
* in RAM.
*/
gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
/*
* If we didn't know the cpu mask & # cores, we can save them of
* now rather than 'computing' them constantly
*/
fixup_cpu();
#endif
#ifdef CONFIG_SYS_EXTRA_ENV_RELOC
/*
* Some systems need to relocate the env_addr pointer early because the
* location it points to will get invalidated before env_relocate is
* called. One example is on systems that might use a L2 or L3 cache
* in SRAM mode and initialize that cache from SRAM mode back to being
* a cache in cpu_init_r.
*/
gd->env_addr += dest_addr - CONFIG_SYS_MONITOR_BASE;
#endif
serial_initialize();
debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
WATCHDOG_RESET();
/*
* Setup trap handlers
*/
trap_init(dest_addr);
#ifdef CONFIG_ADDR_MAP
init_addr_map();
#endif
#if defined(CONFIG_BOARD_EARLY_INIT_R)
board_early_init_r();
#endif
monitor_flash_len = (ulong)&__init_end - dest_addr;
WATCHDOG_RESET();
#ifdef CONFIG_LOGBUFFER
logbuff_init_ptrs();
#endif
#ifdef CONFIG_POST
post_output_backlog();
#endif
WATCHDOG_RESET();
#if defined(CONFIG_SYS_DELAYED_ICACHE)
icache_enable(); /* it's time to enable the instruction cache */
#endif
#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
#endif
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
/*
* Do early PCI configuration _before_ the flash gets initialised,
* because PCU ressources are crucial for flash access on some boards.
*/
pci_init();
#endif
#if defined(CONFIG_WINBOND_83C553)
/*
* Initialise the ISA bridge
*/
initialise_w83c553f();
#endif
asm("sync ; isync");
mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN);
#if !defined(CONFIG_SYS_NO_FLASH)
puts("Flash: ");
if (board_flash_wp_on()) {
printf("Uninitialized - Write Protect On\n");
/* Since WP is on, we can't find real size. Set to 0 */
flash_size = 0;
} else if ((flash_size = flash_init()) > 0) {
#ifdef CONFIG_SYS_FLASH_CHECKSUM
print_size(flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
if (getenv_yesno("flashchecksum") == 1) {
printf(" CRC: %08X",
crc32(0,
(const unsigned char *)
CONFIG_SYS_FLASH_BASE, flash_size)
);
}
putc('\n');
#else /* !CONFIG_SYS_FLASH_CHECKSUM */
print_size(flash_size, "\n");
#endif /* CONFIG_SYS_FLASH_CHECKSUM */
} else {
puts(failed);
hang();
}
/* update start of FLASH memory */
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
/* size of FLASH memory (final value) */
bd->bi_flashsize = flash_size;
#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
/* Make a update of the Memctrl. */
update_flash_size(flash_size);
#endif
#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
/* flash mapped at end of memory map */
bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
#elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
#endif
#endif /* !CONFIG_SYS_NO_FLASH */
WATCHDOG_RESET();
/* initialize higher level parts of CPU like time base and timers */
cpu_init_r();
WATCHDOG_RESET();
#ifdef CONFIG_SPI
#if !defined(CONFIG_ENV_IS_IN_EEPROM)
spi_init_f();
#endif
spi_init_r();
#endif
#if defined(CONFIG_CMD_NAND)
WATCHDOG_RESET();
puts("NAND: ");
nand_init(); /* go init the NAND */
#endif
#ifdef CONFIG_GENERIC_MMC
/*
* MMC initialization is called before relocating env.
* Thus It is required that operations like pin multiplexer
* be put in board_init.
*/
WATCHDOG_RESET();
puts("MMC: ");
mmc_initialize(bd);
#endif
/* relocate environment function pointers etc. */
env_relocate();
/*
* after non-volatile devices & environment is setup and cpu code have
* another round to deal with any initialization that might require
* full access to the environment or loading of some image (firmware)
* from a non-volatile device
*/
cpu_secondary_init_r();
/*
* Fill in missing fields of bd_info.
* We do this here, where we have "normal" access to the
* environment; we used to do this still running from ROM,
* where had to use getenv_f(), which can be pretty slow when
* the environment is in EEPROM.
*/
#if defined(CONFIG_SYS_EXTBDINFO)
#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
#if defined(CONFIG_I2CFAST)
/*
* set bi_iic_fast for linux taking environment variable
* "i2cfast" into account
*/
{
if (getenv_yesno("i2cfast") == 1) {
bd->bi_iic_fast[0] = 1;
bd->bi_iic_fast[1] = 1;
}
}
#endif /* CONFIG_I2CFAST */
#endif /* CONFIG_405GP, CONFIG_405EP */
#endif /* CONFIG_SYS_EXTBDINFO */
#if defined(CONFIG_SC3)
sc3_read_eeprom();
#endif
#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
mac_read_from_eeprom();
#endif
#ifdef CONFIG_CMD_NET
/* kept around for legacy kernels only ... ignore the next section */
eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
#ifdef CONFIG_HAS_ETH1
eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
#endif
#ifdef CONFIG_HAS_ETH2
eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
#endif
#ifdef CONFIG_HAS_ETH3
eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
#endif
#ifdef CONFIG_HAS_ETH4
eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
#endif
#ifdef CONFIG_HAS_ETH5
eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
#endif
#endif /* CONFIG_CMD_NET */
WATCHDOG_RESET();
#if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
/*
* Do pci configuration
*/
pci_init();
#endif
/** leave this here (after malloc(), environment and PCI are working) **/
/* Initialize stdio devices */
stdio_init();
/* Initialize the jump table for applications */
jumptable_init();
#if defined(CONFIG_API)
/* Initialize API */
api_init();
#endif
/* Initialize the console (after the relocation and devices init) */
console_init_r();
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
misc_init_r();
#endif
#if defined(CONFIG_CMD_KGDB)
WATCHDOG_RESET();
puts("KGDB: ");
kgdb_init();
#endif
debug("U-Boot relocated to %08lx\n", dest_addr);
/*
* Enable Interrupts
*/
interrupt_init();
#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
udelay(20);
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
WATCHDOG_RESET();
#if defined(CONFIG_CMD_SCSI)
WATCHDOG_RESET();
puts("SCSI: ");
scsi_init();
#endif
#if defined(CONFIG_CMD_DOC)
WATCHDOG_RESET();
puts("DOC: ");
doc_init();
#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#if defined(CONFIG_CMD_NET)
WATCHDOG_RESET();
puts("Net: ");
eth_initialize(bd);
#endif
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
WATCHDOG_RESET();
debug("Reset Ethernet PHY\n");
reset_phy();
#endif
#ifdef CONFIG_POST
post_run(NULL, POST_RAM | post_bootmode_get(0));
#endif
#if defined(CONFIG_CMD_PCMCIA) \
&& !defined(CONFIG_CMD_IDE)
WATCHDOG_RESET();
puts("PCMCIA:");
pcmcia_init();
#endif
#if defined(CONFIG_CMD_IDE)
WATCHDOG_RESET();
#ifdef CONFIG_IDE_8xx_PCCARD
puts("PCMCIA:");
#else
puts("IDE: ");
#endif
#if defined(CONFIG_START_IDE)
if (board_start_ide())
ide_init();
#else
ide_init();
#endif
#endif
#ifdef CONFIG_LAST_STAGE_INIT
WATCHDOG_RESET();
/*
* Some parts can be only initialized if all others (like
* Interrupts) are up and running (i.e. the PC-style ISA
* keyboard).
*/
last_stage_init();
#endif
#if defined(CONFIG_CMD_BEDBUG)
WATCHDOG_RESET();
bedbug_init();
#endif
#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
/*
* Export available size of memory for Linux,
* taking into account the protected RAM at top of memory
*/
{
ulong pram = 0;
char memsz[32];
#ifdef CONFIG_PRAM
pram = getenv_ulong("pram", 10, CONFIG_PRAM);
#endif
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
#endif
#endif
sprintf(memsz, "%ldk", (ulong) (bd->bi_memsize / 1024) - pram);
setenv("mem", memsz);
}
#endif
#ifdef CONFIG_PS2KBD
puts("PS/2: ");
kbd_init();
#endif
/* Initialization complete - start the monitor */
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;) {
WATCHDOG_RESET();
main_loop();
}
/* NOTREACHED - no way out of command loop except booting */
}