void spi_init(void) { /* First, configure CS as output */ /* This MUST be done BEFORE configuring SPI as a master */ DDRB |= (1U<<DDB4); spi_set_cs(false); /* Enable SPI, Master, set clock rate fck/2 */ SPCR = (1U<<SPE) | (1U<<MSTR); /* Reset SPI2X flag */ SPSR |= (1U<<SPI2X); /* Set SS, MOSI and SCK output */ DDRB |= (1U<<DDB4) | (1U<<DDB5) | (1U<<DDB7); /* Set MISO input */ DDRB &= ~(1U<<DDB6); }
int spi_adc_read(struct busyboard *bb) { int i, val; spi_set_cs(bb, 0); for (i = 0; i < 3; ++i) { do_delay(); spi_set_clk(bb); do_delay(); spi_clear_clk(bb); } for (i = val = 0; i < 10; ++i) { do_delay(); spi_set_clk(bb); do_delay(); busyboard_in(bb); val = (val << 1) | (bb->in_state[1] & 1); spi_clear_clk(bb); } spi_clear_cs(bb); return val; }