static int ms5611_spi_read_adc_temp_and_pressure(struct device *dev,
s32 *temp, s32 *pressure)
{
int ret;
struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev));
const struct ms5611_osr *osr = st->temp_osr;
/*
* Warning: &osr->cmd MUST be aligned on a word boundary since used as
* 2nd argument (void*) of spi_write_then_read.
*/
ret = spi_write_then_read(st->client, &osr->cmd, 1, NULL, 0);
if (ret < 0)
return ret;
usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL));
ret = ms5611_spi_read_adc(dev, temp);
if (ret < 0)
return ret;
osr = st->pressure_osr;
ret = spi_write_then_read(st->client, &osr->cmd, 1, NULL, 0);
if (ret < 0)
return ret;
usleep_range(osr->conv_usec, osr->conv_usec + (osr->conv_usec / 10UL));
return ms5611_spi_read_adc(dev, pressure);
}
static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *time)
{
struct spi_device *spi = dev_get_drvdata(dev);
u8 buf[1 + RTC_CLCK_LEN];
u8 *bp = buf;
int status;
/* Enable writing */
bp = buf;
*bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
*bp++ = RTC_CMD_WRITE_ENABLE;
status = spi_write_then_read(spi, buf, 2,
NULL, 0);
if (status)
return status;
/* Write registers starting at the first time/date address. */
bp = buf;
*bp++ = RTC_CLCK_BURST << 1 | RTC_CMD_WRITE;
*bp++ = bin2bcd(time->tm_sec);
*bp++ = bin2bcd(time->tm_min);
*bp++ = bin2bcd(time->tm_hour);
*bp++ = bin2bcd(time->tm_mday);
*bp++ = bin2bcd(time->tm_mon + 1);
*bp++ = time->tm_wday + 1;
*bp++ = bin2bcd(time->tm_year % 100);
*bp++ = RTC_CMD_WRITE_DISABLE;
/* use write-then-read since dma from stack is nonportable */
return spi_write_then_read(spi, buf, sizeof(buf),
NULL, 0);
}
/*
* Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
*/
static int ds1305_get_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
struct ds1305 *ds1305 = dev_get_drvdata(dev);
struct spi_device *spi = ds1305->spi;
u8 addr;
int status;
u8 buf[DS1305_ALM_LEN];
/* Refresh control register cache BEFORE reading ALM0 registers,
* since reading alarm registers acks any pending IRQ. That
* makes returning "pending" status a bit of a lie, but that bit
* of EFI status is at best fragile anyway (given IRQ handlers).
*/
addr = DS1305_CONTROL;
status = spi_write_then_read(spi, &addr, sizeof addr,
ds1305->ctrl, sizeof ds1305->ctrl);
if (status < 0)
return status;
alm->enabled = !!(ds1305->ctrl[0] & DS1305_AEI0);
alm->pending = !!(ds1305->ctrl[1] & DS1305_AEI0);
/* get and check ALM0 registers */
addr = DS1305_ALM0(DS1305_SEC);
status = spi_write_then_read(spi, &addr, sizeof addr,
buf, sizeof buf);
if (status < 0)
return status;
dev_vdbg(dev, "%s: %02x %02x %02x %02x\n",
"alm0 read", buf[DS1305_SEC], buf[DS1305_MIN],
buf[DS1305_HOUR], buf[DS1305_WDAY]);
if ((DS1305_ALM_DISABLE & buf[DS1305_SEC])
|| (DS1305_ALM_DISABLE & buf[DS1305_MIN])
|| (DS1305_ALM_DISABLE & buf[DS1305_HOUR]))
return -EIO;
/* Stuff these values into alm->time and let RTC framework code
* fill in the rest ... and also handle rollover to tomorrow when
* that's needed.
*/
alm->time.tm_sec = bcd2bin(buf[DS1305_SEC]);
alm->time.tm_min = bcd2bin(buf[DS1305_MIN]);
alm->time.tm_hour = bcd2hour(buf[DS1305_HOUR]);
alm->time.tm_mday = -1;
alm->time.tm_mon = -1;
alm->time.tm_year = -1;
/* next three fields are unused by Linux */
alm->time.tm_wday = -1;
alm->time.tm_mday = -1;
alm->time.tm_isdst = -1;
return 0;
}
/* eeprom_status - read the status register */
char eeprom_status()
{
char byte;
EE_CS = 0; /* active eeprom */
spi_write_then_read(EE_RDSR); /* send read-status-register
instruction to the eeprom */
byte = spi_write_then_read(0);
EE_CS = 1; /* inactive eeprom */
return byte;
}
/* eeprom_read - read single byte from specified address
* @addr: target address
*/
char eeprom_read(unsigned int addr)
{
char byte = 0;
while (eeprom_status() & 0x01) /* wait until write cycle done */
;
EE_CS = 0; /* active eeprom */
spi_write_then_read(EE_READ); /* read instruction */
spi_write_then_read(addr >> 8); /* higher byte of addr */
spi_write_then_read(addr & 0xff); /* lower byte */
byte = spi_write_then_read(0); /* read data */
EE_CS = 1; /* inactive eeprom */
return byte;
}
static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
struct spi_device *spi = to_spi_device(dev);
u8 txbuf[1], rxbuf[7];
int ret;
txbuf[0] = PCF2123_READ | PCF2123_REG_SC;
ret = spi_write_then_read(spi, txbuf, sizeof(txbuf),
rxbuf, sizeof(rxbuf));
if (ret < 0)
return ret;
pcf2123_delay_trec();
tm->tm_sec = bcd2bin(rxbuf[0] & 0x7F);
tm->tm_min = bcd2bin(rxbuf[1] & 0x7F);
tm->tm_hour = bcd2bin(rxbuf[2] & 0x3F);
tm->tm_mday = bcd2bin(rxbuf[3] & 0x3F);
tm->tm_wday = rxbuf[4] & 0x07;
tm->tm_mon = bcd2bin(rxbuf[5] & 0x1F) - 1;
tm->tm_year = bcd2bin(rxbuf[6]);
if (tm->tm_year < 70)
tm->tm_year += 100;
dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
"mday=%d, mon=%d, year=%d, wday=%d\n",
__func__,
tm->tm_sec, tm->tm_min, tm->tm_hour,
tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
if (rtc_valid_tm(tm) < 0)
dev_err(dev, "retrieved date/time is not valid.\n");
return 0;
}
static int max6902_read_time(struct device *dev, struct rtc_time *dt)
{
int err, century;
struct spi_device *spi = to_spi_device(dev);
unsigned char buf[8];
buf[0] = 0xbf; /* Burst read */
err = spi_write_then_read(spi, buf, 1, buf, 8);
if (err != 0)
return err;
/* The chip sends data in this order:
* Seconds, Minutes, Hours, Date, Month, Day, Year */
dt->tm_sec = bcd2bin(buf[0]);
dt->tm_min = bcd2bin(buf[1]);
dt->tm_hour = bcd2bin(buf[2]);
dt->tm_mday = bcd2bin(buf[3]);
dt->tm_mon = bcd2bin(buf[4]) - 1;
dt->tm_wday = bcd2bin(buf[5]);
dt->tm_year = bcd2bin(buf[6]);
/* Read century */
err = max6902_get_reg(dev, MAX6902_REG_CENTURY, &buf[0]);
if (err != 0)
return err;
century = bcd2bin(buf[0]) * 100;
dt->tm_year += century;
dt->tm_year -= 1900;
return rtc_valid_tm(dt);
}
/*
* Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
*/
static int ds1305_ioctl(struct device *dev, unsigned cmd, unsigned long arg)
{
struct ds1305 *ds1305 = dev_get_drvdata(dev);
u8 buf[2];
int status = -ENOIOCTLCMD;
buf[0] = DS1305_WRITE | DS1305_CONTROL;
buf[1] = ds1305->ctrl[0];
switch (cmd) {
case RTC_AIE_OFF:
status = 0;
if (!(buf[1] & DS1305_AEI0))
goto done;
buf[1] &= ~DS1305_AEI0;
break;
case RTC_AIE_ON:
status = 0;
if (ds1305->ctrl[0] & DS1305_AEI0)
goto done;
buf[1] |= DS1305_AEI0;
break;
}
if (status == 0) {
status = spi_write_then_read(ds1305->spi, buf, sizeof buf,
NULL, 0);
if (status >= 0)
ds1305->ctrl[0] = buf[1];
}
done:
return status;
}
static int
rs5c348_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
struct spi_device *spi = to_spi_device(dev);
struct rs5c348_plat_data *pdata = spi->dev.platform_data;
u8 txbuf[5+7], *txp;
int ret;
txp = txbuf;
txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2);
txbuf[1] = 0;
txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2);
txbuf[3] = 0;
txbuf[4] = RS5C348_CMD_MW(RS5C348_REG_SECS);
txp = &txbuf[5];
txp[RS5C348_REG_SECS] = bin2bcd(tm->tm_sec);
txp[RS5C348_REG_MINS] = bin2bcd(tm->tm_min);
if (pdata->rtc_24h) {
txp[RS5C348_REG_HOURS] = bin2bcd(tm->tm_hour);
} else {
txp[RS5C348_REG_HOURS] = bin2bcd((tm->tm_hour + 11) % 12 + 1) |
(tm->tm_hour >= 12 ? RS5C348_BIT_PM : 0);
}
txp[RS5C348_REG_WDAY] = bin2bcd(tm->tm_wday);
txp[RS5C348_REG_DAY] = bin2bcd(tm->tm_mday);
txp[RS5C348_REG_MONTH] = bin2bcd(tm->tm_mon + 1) |
(tm->tm_year >= 100 ? RS5C348_BIT_Y2K : 0);
txp[RS5C348_REG_YEAR] = bin2bcd(tm->tm_year % 100);
ret = spi_write_then_read(spi, txbuf, sizeof(txbuf), NULL, 0);
udelay(62);
return ret;
}
static int adt7316_spi_multi_read(void *client, u8 reg, u8 count, u8 *data)
{
struct spi_device *spi_dev = client;
u8 cmd[2];
int ret = 0;
if (count > ADT7316_REG_MAX_ADDR)
count = ADT7316_REG_MAX_ADDR;
cmd[0] = ADT7316_SPI_CMD_WRITE;
cmd[1] = reg;
ret = spi_write(spi_dev, cmd, 2);
if (ret < 0) {
dev_err(&spi_dev->dev, "SPI fail to select reg\n");
return ret;
}
cmd[0] = ADT7316_SPI_CMD_READ;
ret = spi_write_then_read(spi_dev, cmd, 1, data, count);
if (ret < 0) {
dev_err(&spi_dev->dev, "SPI read data error\n");
return ret;
}
return 0;
}
static int ds1302_rtc_get_time(struct device *dev, struct rtc_time *time)
{
struct spi_device *spi = dev_get_drvdata(dev);
u8 addr = RTC_CLCK_BURST << 1 | RTC_CMD_READ;
u8 buf[RTC_CLCK_LEN - 1];
int status;
/* Use write-then-read to get all the date/time registers
* since dma from stack is nonportable
*/
status = spi_write_then_read(spi, &addr, sizeof(addr),
buf, sizeof(buf));
if (status < 0)
return status;
/* Decode the registers */
time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]);
time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]);
time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]);
time->tm_wday = buf[RTC_ADDR_DAY] - 1;
time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]);
time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1;
time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100;
/* Time may not be set */
return rtc_valid_tm(time);
}
static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
struct spi_device *spi = to_spi_device(dev);
u8 txbuf[1], rxbuf[7];
int ret;
txbuf[0] = PCF2123_READ | PCF2123_REG_SC;
ret = spi_write_then_read(spi, txbuf, sizeof(txbuf),
rxbuf, sizeof(rxbuf));
if (ret < 0)
return ret;
pcf2123_delay_trec();
tm->tm_sec = bcd2bin(rxbuf[0] & 0x7F);
tm->tm_min = bcd2bin(rxbuf[1] & 0x7F);
tm->tm_hour = bcd2bin(rxbuf[2] & 0x3F); /* rtc hr 0-23 */
tm->tm_mday = bcd2bin(rxbuf[3] & 0x3F);
tm->tm_wday = rxbuf[4] & 0x07;
tm->tm_mon = bcd2bin(rxbuf[5] & 0x1F) - 1; /* rtc mn 1-12 */
tm->tm_year = bcd2bin(rxbuf[6]);
if (tm->tm_year < 70)
tm->tm_year += 100; /* assume we are in 1970...2069 */
dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
"mday=%d, mon=%d, year=%d, wday=%d\n",
__func__,
tm->tm_sec, tm->tm_min, tm->tm_hour,
tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
return rtc_valid_tm(tm);
}
static unsigned int aic32x4_read(struct snd_soc_codec *codec, unsigned int reg)
{
struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
unsigned int page = reg / 128;
unsigned int fixed_reg = reg % 128;
int ret;
u8 buffer;
if (aic32x4->page_no != page) {
ret = aic32x4_change_page(codec, page);
if (ret != 0)
return ret;
}
if (aic32x4->control_type == SND_SOC_SPI) {
buffer = (fixed_reg<<1) | 0x01;
ret = spi_write_then_read(codec->control_data, &buffer, 1, &buffer, 1);
if (ret) {
dev_err(codec->dev, "AIC32x4 reg read error\n");
return -EIO;
}
return (unsigned int)buffer;
} else
return i2c_smbus_read_byte_data(codec->control_data, fixed_reg & 0xff);
}
/* radio_send - send payload to specified address
* @*addr: receiver's address
* @addr_len: receiver's address length (in bytes)
* @*payload: payload to receiver
* @pl_len: payload to receiver length (in bytes)
*/
void rf_send(char *addr, unsigned char addr_len,
char *payload, unsigned char pl_len)
{
unsigned char i;
CE = 1; /* enter transmit mode */
/* send address */
for (i = 0; i < addr_len; i++)
spi_write_then_read(*(addr + i));
/* send payload */
for (i = 0; i < pl_len; i++)
spi_write_then_read(*(payload + i));
CE = 0; /* back to standby mode */
}
static int cxd2880_spi_read_ts_buffer_info(struct spi_device *spi,
struct cxd2880_ts_buf_info *info)
{
u8 send_data = 0x20;
u8 recv_data[2];
int ret;
if (!spi || !info) {
pr_err("invalid arg\n");
return -EINVAL;
}
ret = spi_write_then_read(spi, &send_data, 1,
recv_data, sizeof(recv_data));
if (ret)
pr_err("spi_write_then_read failed\n");
info->read_ready = (recv_data[0] & 0x80) ? 1 : 0;
info->almost_full = (recv_data[0] & 0x40) ? 1 : 0;
info->almost_empty = (recv_data[0] & 0x20) ? 1 : 0;
info->overflow = (recv_data[0] & 0x10) ? 1 : 0;
info->underflow = (recv_data[0] & 0x08) ? 1 : 0;
info->pkt_num = ((recv_data[0] & 0x07) << 8) | recv_data[1];
return ret;
}
int qtft_spi_write_then_read(const void *tbuf, size_t tn, void *rbuf, size_t rn)
{
if(current_device)
return spi_write_then_read(current_device, tbuf, tn, rbuf, rn);
else
return -ENODEV;
}
/*----------------------------------------------------------------------------
* name : ad9363_spi_write
* function : ad9363 spi write interface
* author version date note
* feller 1.0 20151229
*----------------------------------------------------------------------------
*/
int ad9363_spi_write(struct spi_device *spi, unsigned short reg, unsigned char val)
{
unsigned char buf[3];
int ret;
unsigned short cmd;
cmd = AD9363_WRITE |(reg);
buf[0] = cmd >> 8;
buf[1] = cmd & 0xFF;
buf[2] = val;
ret = spi_write_then_read(spi, buf, 3, NULL, 0);
if (ret < 0) {
dev_err(&spi->dev, "Write Error %d", ret);
return ret;
}
dev_dbg(&spi->dev, "reg 0x%X val 0x%X\n", reg, buf[2]);
return 0;
}
static int ds1390_read_time(struct device *dev, struct rtc_time *dt)
{
struct spi_device *spi = to_spi_device(dev);
struct ds1390 *chip = dev_get_drvdata(dev);
int status;
/* build the message */
chip->txrx_buf[0] = DS1390_REG_SECONDS;
/* do the i/o */
status = spi_write_then_read(spi, chip->txrx_buf, 1, chip->txrx_buf, 8);
if (status != 0)
return status;
/* The chip sends data in this order:
* Seconds, Minutes, Hours, Day, Date, Month / Century, Year */
dt->tm_sec = bcd2bin(chip->txrx_buf[0]);
dt->tm_min = bcd2bin(chip->txrx_buf[1]);
dt->tm_hour = bcd2bin(chip->txrx_buf[2]);
dt->tm_wday = bcd2bin(chip->txrx_buf[3]);
dt->tm_mday = bcd2bin(chip->txrx_buf[4]);
/* mask off century bit */
dt->tm_mon = bcd2bin(chip->txrx_buf[5] & 0x7f) - 1;
/* adjust for century bit */
dt->tm_year = bcd2bin(chip->txrx_buf[6]) + ((chip->txrx_buf[5] & 0x80) ? 100 : 0);
return rtc_valid_tm(dt);
}
static int ms5611_spi_reset(struct device *dev)
{
u8 cmd = MS5611_RESET;
struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev));
return spi_write_then_read(st->client, &cmd, 1, NULL, 0);
}
static int codec_spi_read(unsigned char addr, unsigned char *data, bool flag)
{
int rc;
u8 buffer[2] = { 0, 0 };
u8 result[2] = { 0, 0 };
codec_spi_dev->bits_per_word = 16;
buffer[1] = addr << 1 | 1; /* high byte because 16bit word */
/*AUD_DBG("before read: buf[1]:0x%02X buf[0]:0x%02X res[1]:0x%02X res[0]:0x%02X \n",
buffer[1], buffer[0], result[1], result[0]);*/
/* because aic3008 does symmetric SPI write and read */
rc = spi_write_then_read(codec_spi_dev, buffer, 2, result, 2);
if (rc < 0)
return rc;
if(flag)
{
AUD_DBG("read: reg: 0x%02X , data: 0x%02X \n", addr, result[0]);
}
*data = result[0]; /* seems address on high byte, data on low byte */
return 0;
}
static int ds1305_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
struct ds1305 *ds1305 = dev_get_drvdata(dev);
u8 buf[2];
long err = -EINVAL;
buf[0] = DS1305_WRITE | DS1305_CONTROL;
buf[1] = ds1305->ctrl[0];
if (enabled) {
if (ds1305->ctrl[0] & DS1305_AEI0)
goto done;
buf[1] |= DS1305_AEI0;
} else {
if (!(buf[1] & DS1305_AEI0))
goto done;
buf[1] &= ~DS1305_AEI0;
}
err = spi_write_then_read(ds1305->spi, buf, sizeof buf, NULL, 0);
if (err >= 0)
ds1305->ctrl[0] = buf[1];
done:
return err;
}
static void ds1305_work(struct work_struct *work)
{
struct ds1305 *ds1305 = container_of(work, struct ds1305, work);
struct mutex *lock = &ds1305->rtc->ops_lock;
struct spi_device *spi = ds1305->spi;
u8 buf[3];
int status;
/* lock to protect ds1305->ctrl */
mutex_lock(lock);
/* Disable the IRQ, and clear its status ... for now, we "know"
* that if more than one alarm is active, they're in sync.
* Note that reading ALM data registers also clears IRQ status.
*/
ds1305->ctrl[0] &= ~(DS1305_AEI1 | DS1305_AEI0);
ds1305->ctrl[1] = 0;
buf[0] = DS1305_WRITE | DS1305_CONTROL;
buf[1] = ds1305->ctrl[0];
buf[2] = 0;
status = spi_write_then_read(spi, buf, sizeof buf,
NULL, 0);
if (status < 0)
dev_dbg(&spi->dev, "clear irq --> %d\n", status);
mutex_unlock(lock);
if (!test_bit(FLAG_EXITING, &ds1305->flags))
enable_irq(spi->irq);
rtc_update_irq(ds1305->rtc, 1, RTC_AF | RTC_IRQF);
}
static int ds1305_set_time(struct device *dev, struct rtc_time *time)
{
struct ds1305 *ds1305 = dev_get_drvdata(dev);
u8 buf[1 + DS1305_RTC_LEN];
u8 *bp = buf;
dev_vdbg(dev, "%s secs=%d, mins=%d, "
"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
"write", time->tm_sec, time->tm_min,
time->tm_hour, time->tm_mday,
time->tm_mon, time->tm_year, time->tm_wday);
/* Write registers starting at the first time/date address. */
*bp++ = DS1305_WRITE | DS1305_SEC;
*bp++ = bin2bcd(time->tm_sec);
*bp++ = bin2bcd(time->tm_min);
*bp++ = hour2bcd(ds1305->hr12, time->tm_hour);
*bp++ = (time->tm_wday < 7) ? (time->tm_wday + 1) : 1;
*bp++ = bin2bcd(time->tm_mday);
*bp++ = bin2bcd(time->tm_mon + 1);
*bp++ = bin2bcd(time->tm_year - 100);
dev_dbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
"write", buf[1], buf[2], buf[3],
buf[4], buf[5], buf[6], buf[7]);
/* use write-then-read since dma from stack is nonportable */
return spi_write_then_read(ds1305->spi, buf, sizeof buf,
NULL, 0);
}
/*
* radio_send - send payload to specified address
* @*addr: receiver's address
* @addr_len: receiver's address length (in bytes)
* @*payload: payload to receiver
* @pl_len: payload to receiver length (in bytes)
*/
void rf_send(char *addr, unsigned char addr_len,
char *payload, unsigned char pl_len)
{
int i;
CE = 1; /* enable on board processing */
/* send address */
for (i = 0; i < addr_len; i++)
spi_write_then_read(*(addr + i));
/* send payload */
for (i = 0; i < pl_len; i++)
spi_write_then_read(*(payload + i));
CE = 0; /* enable transmission */
}
static int
rs5c348_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
struct spi_device *spi = to_spi_device(dev);
struct rs5c348_plat_data *pdata = spi->dev.platform_data;
u8 txbuf[5+7], *txp;
int ret;
/* Transfer 5 bytes before writing SEC. This gives 31us for carry. */
txp = txbuf;
txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
txbuf[1] = 0; /* dummy */
txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
txbuf[3] = 0; /* dummy */
txbuf[4] = RS5C348_CMD_MW(RS5C348_REG_SECS); /* cmd, sec, ... */
txp = &txbuf[5];
txp[RS5C348_REG_SECS] = bin2bcd(tm->tm_sec);
txp[RS5C348_REG_MINS] = bin2bcd(tm->tm_min);
if (pdata->rtc_24h) {
txp[RS5C348_REG_HOURS] = bin2bcd(tm->tm_hour);
} else {
/* hour 0 is AM12, noon is PM12 */
txp[RS5C348_REG_HOURS] = bin2bcd((tm->tm_hour + 11) % 12 + 1) |
(tm->tm_hour >= 12 ? RS5C348_BIT_PM : 0);
}
txp[RS5C348_REG_WDAY] = bin2bcd(tm->tm_wday);
txp[RS5C348_REG_DAY] = bin2bcd(tm->tm_mday);
txp[RS5C348_REG_MONTH] = bin2bcd(tm->tm_mon + 1) |
(tm->tm_year >= 100 ? RS5C348_BIT_Y2K : 0);
txp[RS5C348_REG_YEAR] = bin2bcd(tm->tm_year % 100);
/* write in one transfer to avoid data inconsistency */
ret = spi_write_then_read(spi, txbuf, sizeof(txbuf), NULL, 0);
udelay(62); /* Tcsr 62us */
return ret;
}
static int test_read_reg(struct spi_device *spi, int reg)
{
char buf[2];
buf[0] = reg << 2;
buf[1] = 0;
spi_write_then_read(spi, buf, 2, buf, 2);
return buf[1] << 8 | buf[0];
}
/* eeprom_write - write a single byte to specified address
* @addr: target address
* @byte: writting byte of data
*/
void eeprom_write(unsigned int addr, char byte)
{
while (eeprom_status() & 0x01) /* wait until write cycle done */
;
EE_CS = 0; /* active eeprom */
spi_write_then_read(EE_WREN); /* write-enable instruction */
EE_CS = 1; /* inactive eeprom */
EE_CS = 0; /* active eeprom */
spi_write_then_read(EE_WRITE); /* write instruction */
spi_write_then_read(addr >> 8); /* higher byte of addr */
spi_write_then_read(addr & 0xff); /* lower byte */
spi_write_then_read(byte); /* write data */
EE_CS = 1; /* inactive eeprom */
EE_CS = 0; /* active eeprom */
spi_write_then_read(EE_WRDI); /* write-disable instruction */
EE_CS = 1; /* inactive eeprom */
}
/* flash_erase_all - erase all pages on flash memory */
void flash_erase_all()
{
while (eeprom_status() & 0x01) /* wait until write cycle done */
;
EE_CS = 0; /* enable SPI slave */
spi_write_then_read(EE_WREN); /* write-enable instruction */
EE_CS = 1; /* start erase operation */
EE_CS = 0; /* start erase operation */
spi_write_then_read(ERASE_ALL); /* read instruction */
EE_CS = 1; /* start erase operation */
while (eeprom_status() & 0x00) /* wait until erase done */
;
/* re-enable flash write operation */
EE_CS = 0; /* enable SPI slave */
spi_write_then_read(EE_WREN); /* write-enable instruction */
EE_CS = 1; /* start erase operation */
}
/* sysfs hook function */
static ssize_t lm70_sense_temp(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct spi_device *spi = to_spi_device(dev);
int status, val = 0;
u8 rxbuf[2];
s16 raw=0;
struct lm70 *p_lm70 = dev_get_drvdata(&spi->dev);
if (mutex_lock_interruptible(&p_lm70->lock))
return -ERESTARTSYS;
/*
* spi_read() requires a DMA-safe buffer; so we use
* spi_write_then_read(), transmitting 0 bytes.
*/
status = spi_write_then_read(spi, NULL, 0, &rxbuf[0], 2);
if (status < 0) {
printk(KERN_WARNING
"spi_write_then_read failed with status %d\n", status);
goto out;
}
raw = (rxbuf[0] << 8) + rxbuf[1];
dev_dbg(dev, "rxbuf[0] : 0x%02x rxbuf[1] : 0x%02x raw=0x%04x\n",
rxbuf[0], rxbuf[1], raw);
/*
* LM70:
* The "raw" temperature read into rxbuf[] is a 16-bit signed 2's
* complement value. Only the MSB 11 bits (1 sign + 10 temperature
* bits) are meaningful; the LSB 5 bits are to be discarded.
* See the datasheet.
*
* Further, each bit represents 0.25 degrees Celsius; so, multiply
* by 0.25. Also multiply by 1000 to represent in millidegrees
* Celsius.
* So it's equivalent to multiplying by 0.25 * 1000 = 250.
*
* TMP121/TMP123:
* 13 bits of 2's complement data, discard LSB 3 bits,
* resolution 0.0625 degrees celsius.
*/
switch (p_lm70->chip) {
case LM70_CHIP_LM70:
val = ((int)raw / 32) * 250;
break;
case LM70_CHIP_TMP121:
val = ((int)raw / 8) * 625 / 10;
break;
}
status = sprintf(buf, "%d\n", val); /* millidegrees Celsius */
out:
mutex_unlock(&p_lm70->lock);
return status;
}
static int ds3234_get_reg(struct device *dev, unsigned char address,
unsigned char *data)
{
struct spi_device *spi = to_spi_device(dev);
*data = address & 0x7f;
return spi_write_then_read(spi, data, 1, data, 1);
}