static int regmap_spmi_gather_write(void *context, const void *reg, size_t reg_size, const void *val, size_t val_size) { BUG_ON(reg_size != 2); return spmi_ext_register_writel(context, *(u16 *)reg, val, val_size); }
static int qpnp_led_masked_write(struct spmi_device *spmi_dev, u16 addr, u8 mask, u8 val) { int rc; u8 reg; rc = spmi_ext_register_readl(spmi_dev->ctrl, spmi_dev->sid, addr, ®, 1); if (rc) dev_err(&spmi_dev->dev, "Unable to read from addr=%x, rc(%d)\n", addr, rc); reg &= ~mask; reg |= val; rc = spmi_ext_register_writel(spmi_dev->ctrl, spmi_dev->sid, addr, ®, 1); if (rc) dev_err(&spmi_dev->dev, "Unable to write to addr=%x, rc(%d)\n", addr, rc); dev_dbg(&spmi_dev->dev, "Write 0x%02X to addr 0x%02X\n", val, addr); return rc; }
static int qpnp_lpg_save_and_write(u8 value, u8 mask, u8 *reg, u16 addr, u16 size, struct qpnp_lpg_chip *chip) { qpnp_lpg_save(reg, mask, value); return spmi_ext_register_writel(chip->spmi_dev->ctrl, chip->spmi_dev->sid, addr, reg, size); }
static int pm_reg_write(struct pm8941_flash_data *data, u16 offset, u8 val) { const u16 addr = data->base + offset; int rc; rc = spmi_ext_register_writel(data->spmi_dev->ctrl, data->spmi_dev->sid, addr, &val, 1); if (rc) pm8941_dev_err(data, "write err addr=%x, rc(%d)\n", addr, rc); return rc; }
static int qpnp_vib_write_u8(struct qpnp_vib *vib, u8 *data, u16 reg) { int rc; rc = spmi_ext_register_writel(vib->spmi->ctrl, vib->spmi->sid, reg, data, 1); if (rc < 0) dev_err(&vib->spmi->dev, "Error writing address: %X - ret %X\n", reg, rc); return rc; }
static int qpnp_fts2_set_mode(struct spm_vreg *vreg, u8 mode) { int rc; rc = spmi_ext_register_writel(vreg->spmi_dev->ctrl, vreg->spmi_dev->sid, vreg->spmi_base_addr + QPNP_FTS2_REG_MODE, &mode, 1); if (rc) dev_err(&vreg->spmi_dev->dev, "%s: could not write to mode register, rc=%d\n", __func__, rc); return rc; }
static int cn_write_wrapper(struct cn_chip *chip, u8 *val, u16 addr, int count) { int rc; struct spmi_device *spmi = chip->spmi; rc = spmi_ext_register_writel(spmi->ctrl, spmi->sid, addr, val, count); if (rc) { pr_err("SPMI write failed rc=%d\n", rc); return rc; } return 0; }
static int qpnpint_spmi_write(struct q_irq_data *irq_d, uint8_t reg, void *buf, uint32_t len) { struct q_chip_data *chip_d = irq_d->chip_d; int rc; if (!chip_d->spmi_ctrl) return -ENODEV; rc = spmi_ext_register_writel(chip_d->spmi_ctrl, irq_d->spmi_slave, irq_d->spmi_offset + reg, buf, len); return rc; }
/* helper to write a pmic register */ static int qpnp_hap_write_reg(struct qpnp_hap *hap, u8 *data, u16 addr) { int rc; rc = spmi_ext_register_writel(hap->spmi->ctrl, hap->spmi->sid, addr, data, 1); if (rc < 0) dev_err(&hap->spmi->dev, "Error writing address: %X - ret %X\n", addr, rc); dev_dbg(&hap->spmi->dev, "write: HAP_0x%x = 0x%x\n", addr, *data); return rc; }
/* helper to write a pmic register */ static int qpnp_wled_write_reg(struct qpnp_wled *wled, u8 *data, u16 addr) { int rc; rc = spmi_ext_register_writel(wled->spmi->ctrl, wled->spmi->sid, addr, data, 1); if (rc < 0) dev_err(&wled->spmi->dev, "Error writing address: %x(%d)\n", addr, rc); dev_dbg(&wled->spmi->dev, "write: WLED_0x%x = 0x%x\n", addr, *data); return rc; }
static inline int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 *buf, int len) { int rc; rc = spmi_ext_register_writel(chip->spmi_dev->ctrl, chip->spmi_dev->sid, chip->base_addr + addr, buf, len); if (rc) dev_err(&chip->spmi_dev->dev, "%s: spmi_ext_register_writel() failed. sid=%d, addr=%04X, len=%d, rc=%d\n", __func__, chip->spmi_dev->sid, chip->base_addr + addr, len, rc); return rc; }
static int32_t qpnp_iadc_write_reg(struct qpnp_iadc_chip *iadc, uint32_t reg, u8 data) { int rc; u8 *buf; buf = &data; rc = spmi_ext_register_writel(iadc->adc->spmi->ctrl, iadc->adc->slave, (iadc->adc->offset + reg), buf, 1); if (rc < 0) { pr_err("qpnp iadc write reg %d failed with %d\n", reg, rc); return rc; } return 0; }
static int qpnp_register_write(struct qpnp_tm_chip *chip, u8 *val, u16 base, int count) { int rc; struct spmi_device *spmi = chip->spmi_dev; rc = spmi_ext_register_writel(spmi->ctrl, spmi->sid, base, val, count); if (rc) { pr_err("write failed base=0x%02x sid=0x%02x rc=%d\n", base, spmi->sid, rc); return rc; } return 0; }
static void spmi_write(u8 value) { struct spmi_controller *ctrl = spmi_busnum_to_ctrl(0); int ret = 0; u16 addr = 0x0000; u8 write_buf = 0x0; u8 read_buf = 0x0; addr = 0xdc46; write_buf = value; if (ctrl == NULL) { HSD_ERR("spmi_write: spmi_controller is NULL!\n"); return; } ret = spmi_ext_register_writel(ctrl, 0, addr, &write_buf,1); spmi_ext_register_readl(ctrl, 0, addr,&read_buf,1); HSD_DBG("addr:%x,write_buf:%x,read_buf:%x,ret:%d\n",addr, write_buf,read_buf,ret); }
static int spm_regulator_write_voltage(struct spm_vreg *vreg, int uV) { unsigned vlevel = spm_regulator_uv_to_vlevel(vreg, uV); bool spm_failed = false; int rc = 0; u8 reg; if (likely(!vreg->bypass_spm)) { /* Set voltage control register via SPM. */ rc = msm_spm_set_vdd(vreg->cpu_num, vlevel); if (rc) { pr_debug("%s: msm_spm_set_vdd failed, rc=%d; falling back on SPMI write\n", vreg->rdesc.name, rc); spm_failed = true; } } if (unlikely(vreg->bypass_spm || spm_failed)) { /* Set voltage control register via SPMI. */ reg = vlevel; rc = spmi_ext_register_writel(vreg->spmi_dev->ctrl, vreg->spmi_dev->sid, vreg->spmi_base_addr + QPNP_SMPS_REG_VOLTAGE_SETPOINT, ®, 1); if (rc) { pr_err("%s: spmi_ext_register_writel failed, rc=%d\n", vreg->rdesc.name, rc); return rc; } } if (uV > vreg->last_set_uV) { /* Wait for voltage stepping to complete. */ udelay(DIV_ROUND_UP(uV - vreg->last_set_uV, vreg->step_rate)); } vreg->last_set_uV = uV; vreg->last_set_vlevel = vlevel; return rc; }
static int qpnp_smps_init_mode(struct spm_vreg *vreg) { const char *mode_name; int rc; rc = of_property_read_string(vreg->spmi_dev->dev.of_node, "qcom,mode", &mode_name); if (!rc) { if (strcmp("pwm", mode_name) == 0) { vreg->init_mode = QPNP_SMPS_MODE_PWM; } else if ((strcmp("auto", mode_name) == 0) && (vreg->regulator_type == QPNP_TYPE_FTS2 || vreg->regulator_type == QPNP_TYPE_FTS2p5)) { vreg->init_mode = QPNP_FTS2_MODE_AUTO; } else { dev_err(&vreg->spmi_dev->dev, "%s: unknown regulator mode: %s\n", __func__, mode_name); return -EINVAL; } rc = spmi_ext_register_writel(vreg->spmi_dev->ctrl, vreg->spmi_dev->sid, vreg->spmi_base_addr + QPNP_SMPS_REG_MODE, &vreg->init_mode, 1); if (rc) dev_err(&vreg->spmi_dev->dev, "%s: could not write mode register, rc=%d\n", __func__, rc); } else { rc = spmi_ext_register_readl(vreg->spmi_dev->ctrl, vreg->spmi_dev->sid, vreg->spmi_base_addr + QPNP_SMPS_REG_MODE, &vreg->init_mode, 1); if (rc) dev_err(&vreg->spmi_dev->dev, "%s: could not read mode register, rc=%d\n", __func__, rc); } vreg->mode = vreg->init_mode; return rc; }
static int pm_reg_masked_write(struct pm8941_flash_data *data, u16 offset, u8 mask, u8 val) { const u16 addr = data->base + offset; int rc; u8 reg; rc = spmi_ext_register_readl(data->spmi_dev->ctrl, data->spmi_dev->sid, addr, ®, 1); if (rc) pm8941_dev_err(data, "read err addr=%x, rc(%d)\n", addr, rc); reg &= ~mask; reg |= mask & val; rc = spmi_ext_register_writel(data->spmi_dev->ctrl, data->spmi_dev->sid, addr, ®, 1); if (rc) pm8941_dev_err(data, "write err addr=%x, rc(%d)\n", addr, rc); return rc; }
static int bcl_write_general_register(int16_t reg_offset, uint16_t base, uint8_t data) { int ret = 0; uint8_t *write_buf = &data; if (!bcl_perph) { pr_err("BCL device not initialized\n"); return -EINVAL; } ret = spmi_ext_register_writel(bcl_perph->spmi->ctrl, bcl_perph->slave_id, (base + reg_offset), write_buf, 1); if (ret < 0) { pr_err("Error reading register %d. err:%d", reg_offset, ret); return ret; } pr_debug("wrote 0x%02x to 0x%04x\n", data, base + reg_offset); return ret; }
static inline int qpnp_vreg_write(struct qpnp_regulator *vreg, u16 addr, u8 *buf, int len) { char str[DEBUG_PRINT_BUFFER_SIZE]; int rc = 0; if (qpnp_vreg_debug_mask & QPNP_VREG_DEBUG_WRITES) { str[0] = '\0'; fill_string(str, DEBUG_PRINT_BUFFER_SIZE, buf, len); pr_info("%-11s: write(0x%04X), sid=%d, len=%d; %s\n", vreg->rdesc.name, vreg->base_addr + addr, vreg->spmi_dev->sid, len, str); } rc = spmi_ext_register_writel(vreg->spmi_dev->ctrl, vreg->spmi_dev->sid, vreg->base_addr + addr, buf, len); if (!rc) vreg->write_count += len; return rc; }
static int regmap_spmi_ext_gather_write(void *context, const void *reg, size_t reg_size, const void *val, size_t val_size) { int err = 0; size_t len; u16 addr; BUG_ON(reg_size != 2); addr = *(u16 *)reg; while (addr <= 0xFF && val_size) { len = min_t(size_t, val_size, 16); err = spmi_ext_register_write(context, addr, val, len); if (err) goto err_out; addr += len; val += len; val_size -= len; } while (val_size) { len = min_t(size_t, val_size, 8); err = spmi_ext_register_writel(context, addr, val, len); if (err) goto err_out; addr += len; val += len; val_size -= len; } err_out: return err; }
static int qpnp_led_masked_write(struct qpnp_led_data *led, u16 addr, u8 mask, u8 val) { int rc; u8 reg; rc = spmi_ext_register_readl(led->spmi_dev->ctrl, led->spmi_dev->sid, addr, ®, 1); if (rc) { dev_err(&led->spmi_dev->dev, "Unable to read from addr=%x, rc(%d)\n", addr, rc); } reg &= ~mask; reg |= val; rc = spmi_ext_register_writel(led->spmi_dev->ctrl, led->spmi_dev->sid, addr, ®, 1); if (rc) dev_err(&led->spmi_dev->dev, "Unable to write to addr=%x, rc(%d)\n", addr, rc); return rc; }
static int qpnp_pon_masked_write(struct qpnp_pon *pon, u16 addr, u8 mask, u8 val) { int rc; u8 reg; rc = spmi_ext_register_readl(pon->spmi->ctrl, pon->spmi->sid, addr, ®, 1); if (rc) { dev_err(&pon->spmi->dev, "Unable to read from addr=%x, rc(%d)\n", addr, rc); return rc; } reg &= ~mask; reg |= val & mask; rc = spmi_ext_register_writel(pon->spmi->ctrl, pon->spmi->sid, addr, ®, 1); if (rc) dev_err(&pon->spmi->dev, "Unable to write to addr=%x, rc(%d)\n", addr, rc); return rc; }
static int _spm_regulator_set_voltage(struct regulator_dev *rdev) { struct spm_vreg *vreg = rdev_get_drvdata(rdev); bool spm_failed = false; int rc = 0; u8 reg; if (vreg->vlevel == vreg->last_set_vlevel) return 0; if ((vreg->regulator_type == QPNP_TYPE_FTS2) && !(vreg->init_mode & QPNP_SMPS_MODE_PWM) && vreg->uV > vreg->last_set_uV) { /* Switch to PWM mode so that voltage ramping is fast. */ rc = qpnp_smps_set_mode(vreg, QPNP_SMPS_MODE_PWM); if (rc) return rc; } if (likely(!vreg->bypass_spm)) { /* Set voltage control register via SPM. */ rc = msm_spm_set_vdd(vreg->cpu_num, vreg->vlevel); if (rc) { pr_debug("%s: msm_spm_set_vdd failed, rc=%d; falling back on SPMI write\n", vreg->rdesc.name, rc); spm_failed = true; } } if (unlikely(vreg->bypass_spm || spm_failed)) { /* Set voltage control register via SPMI. */ reg = vreg->vlevel; rc = spmi_ext_register_writel(vreg->spmi_dev->ctrl, vreg->spmi_dev->sid, vreg->spmi_base_addr + QPNP_SMPS_REG_VOLTAGE_SETPOINT, ®, 1); if (rc) { pr_err("%s: spmi_ext_register_writel failed, rc=%d\n", vreg->rdesc.name, rc); return rc; } } if (vreg->uV > vreg->last_set_uV) { /* Wait for voltage stepping to complete. */ udelay(DIV_ROUND_UP(vreg->uV - vreg->last_set_uV, vreg->step_rate)); } if ((vreg->regulator_type == QPNP_TYPE_FTS2) && !(vreg->init_mode & QPNP_SMPS_MODE_PWM) && vreg->uV > vreg->last_set_uV) { /* Wait for mode transition to complete. */ udelay(QPNP_FTS2_MODE_CHANGE_DELAY - QPNP_SPMI_WRITE_MIN_DELAY); /* Switch to AUTO mode so that power consumption is lowered. */ rc = qpnp_smps_set_mode(vreg, QPNP_FTS2_MODE_AUTO); if (rc) return rc; } vreg->last_set_uV = vreg->uV; vreg->last_set_vlevel = vreg->vlevel; return rc; }
static int qpnp_wled_set(struct qpnp_led_data *led) { int rc, duty; u8 level, val, i, num_wled_strings; level = led->cdev.brightness; if (level > WLED_MAX_LEVEL) level = WLED_MAX_LEVEL; if (level == 0) { val = WLED_BOOST_OFF; rc = spmi_ext_register_writel(led->spmi_dev->ctrl, led->spmi_dev->sid, WLED_MOD_CTRL_REG(led->base), &val, 1); if (rc) { dev_err(&led->spmi_dev->dev, "WLED write ctrl reg failed(%d)\n", rc); return rc; } } else { val = WLED_BOOST_ON; rc = spmi_ext_register_writel(led->spmi_dev->ctrl, led->spmi_dev->sid, WLED_MOD_CTRL_REG(led->base), &val, 1); if (rc) { dev_err(&led->spmi_dev->dev, "WLED write ctrl reg failed(%d)\n", rc); return rc; } } duty = (WLED_MAX_DUTY_CYCLE * level) / WLED_MAX_LEVEL; num_wled_strings = led->wled_cfg->num_strings; /* program brightness control registers */ for (i = 0; i < num_wled_strings; i++) { rc = qpnp_led_masked_write(led, WLED_BRIGHTNESS_CNTL_MSB(led->base, i), WLED_MSB_MASK, (duty >> WLED_8_BIT_SHFT) & WLED_4_BIT_MASK); if (rc) { dev_err(&led->spmi_dev->dev, "WLED set brightness MSB failed(%d)\n", rc); return rc; } val = duty & WLED_8_BIT_MASK; rc = spmi_ext_register_writel(led->spmi_dev->ctrl, led->spmi_dev->sid, WLED_BRIGHTNESS_CNTL_LSB(led->base, i), &val, 1); if (rc) { dev_err(&led->spmi_dev->dev, "WLED set brightness LSB failed(%d)\n", rc); return rc; } } /* sync */ val = WLED_SYNC_VAL; rc = spmi_ext_register_writel(led->spmi_dev->ctrl, led->spmi_dev->sid, WLED_SYNC_REG(led->base), &val, 1); if (rc) { dev_err(&led->spmi_dev->dev, "WLED set sync reg failed(%d)\n", rc); return rc; } val = WLED_SYNC_RESET_VAL; rc = spmi_ext_register_writel(led->spmi_dev->ctrl, led->spmi_dev->sid, WLED_SYNC_REG(led->base), &val, 1); if (rc) { dev_err(&led->spmi_dev->dev, "WLED reset sync reg failed(%d)\n", rc); return rc; } return 0; }