void *lnb_pio_attach(u32 *lnb, struct equipment_s *equipment)
{
struct lnb_state *state = kmalloc(sizeof(struct lnb_state), GFP_KERNEL);
memcpy(state->lnb, lnb, sizeof(state->lnb));
equipment->lnb_set_voltage = lnb_pio_set_voltage;
state->lnb_enable_pin = stpio_request_pin(lnb[0], lnb[1], "lnb_enab", STPIO_OUT);
printk("lnb_enable_pin %p\n", state->lnb_enable_pin);
stpio_set_pin(state->lnb_enable_pin, lnb[2]);
state->lnb_pin = stpio_request_pin(lnb[3], lnb[4], "lnb_sel", STPIO_OUT);
return state;
}
void serial_init (void)
{
/* Configure the PIO pins */
stpio_request_pin(1, 0, "ASC_TX", STPIO_ALT_OUT); /* Tx */
stpio_request_pin(1, 1, "ASC_RX", STPIO_IN); /* Rx */
// Configure the asc input/output settings
*(unsigned int*)(ASCXBaseAddress + ASC_INT_EN) = 0x00000000; // TODO: Why do we set here the INT_EN again ???
*(unsigned int*)(ASCXBaseAddress + ASC_CTRL) = 0x00000589; // mode 0
*(unsigned int*)(ASCXBaseAddress + ASC_TIMEOUT) = 0x00000010;
*(unsigned int*)(ASCXBaseAddress + ASC_BAUDRATE) = 0x0000028b; // 9600
*(unsigned int*)(ASCXBaseAddress + ASC_TX_RST) = 0;
*(unsigned int*)(ASCXBaseAddress + ASC_RX_RST) = 0;
}
static void spi_stpio_chipselect(struct spi_device *spi, int value)
{
unsigned int out;
dgb_print("\n");
if (spi->chip_select == SPI_NO_CHIPSELECT)
return;
/* Request stpio_pin if not already done so */
/* (stored in spi_device->controller_data) */
if (!spi->controller_data)
spi->controller_data =
stpio_request_pin(spi_get_bank(spi->chip_select),
spi_get_line(spi->chip_select),
"spi-cs", STPIO_OUT);
if (!spi->controller_data) {
printk(KERN_ERR NAME " Error spi-cs locked or not-exist\n");
return;
}
if (value == BITBANG_CS_ACTIVE)
out = spi->mode & SPI_CS_HIGH ? 1 : 0;
else
out = spi->mode & SPI_CS_HIGH ? 0 : 1;
stpio_set_pin((struct stpio_pin *)spi->controller_data, out);
dgb_print("%s PIO%d[%d] -> %d \n",
value == BITBANG_CS_ACTIVE ? "select" : "deselect",
spi_get_bank(spi->chip_select),
spi_get_line(spi->chip_select), out);
return;
}
int __init stmcore_probe_device(struct stmcore_display_pipeline_data **pd, int *nr_platform_devices)
{
if(boot_cpu_data.type == CPU_STX7141)
{
unsigned long syscfg20;
*pd = platform_data;
*nr_platform_devices = N_ELEMENTS (platform_data);
/*
* Setup HDMI hotplug
*/
hotplug_pio = stpio_request_pin(5,6,"HDMI Hotplug",STPIO_IN);
/*
* Enable hotplug pio in syscfg
*/
syscfg20_24 = sysconf_claim(SYS_CFG,20,24,24,"HDMI Hotplug PIO ALT Function");
sysconf_write(syscfg20_24,1);
printk(KERN_WARNING "stmcore-display: STi7141 display probed\n");
return 0;
}
printk(KERN_WARNING "stmcore-display: STi7141 display not found\n");
return -ENODEV;
}
static int __init init_fan_module(void)
{
install_e2_procs(e2_procs[0].name, e2_procs[0].read_proc, e2_procs[0].write_proc, NULL);
fan_registers = (unsigned long) ioremap(0x18010000, 0x100);
printk("fan_registers = 0x%.8lx\n", fan_registers);
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)
fan_pin = stpio_request_pin (4, 7, "fan ctrl", STPIO_OUT);
stpio_set_pin(fan_pin, 1);
#else
fan_pin = stpio_request_pin (4, 7, "fan ctrl", STPIO_ALT_OUT);
#endif
return 0;
}
void serial_init (void)
{
#ifdef OCTAGON1008
/* Configure the PIO pins */
stpio_request_pin(4, 3, "ASC_TX", STPIO_ALT_OUT); /* Tx */
stpio_request_pin(4, 2, "ASC_RX", STPIO_IN); /* Rx */
#endif
// Configure the asc input/output settings
*(unsigned int*)(ASCXBaseAddress + ASC_INT_EN) = 0x00000000; // TODO: Why do we set here the INT_EN again ???
*(unsigned int*)(ASCXBaseAddress + ASC_CTRL) = 0x00001589;
*(unsigned int*)(ASCXBaseAddress + ASC_TIMEOUT) = 0x00000010;
*(unsigned int*)(ASCXBaseAddress + ASC_BAUDRATE) = 0x000000c9;
*(unsigned int*)(ASCXBaseAddress + ASC_TX_RST) = 0;
*(unsigned int*)(ASCXBaseAddress + ASC_RX_RST) = 0;
}
int __init stmcore_probe_device(struct stmcore_display_pipeline_data **pd, int *nr_platform_devices)
{
if(boot_cpu_data.type == CPU_STX7106)
{
*pd = platform_data;
*nr_platform_devices = N_ELEMENTS (platform_data);
/*
* Setup HDMI hotplug
*/
hotplug_pio = stpio_request_pin(9,7,"HDMI Hotplug",STPIO_IN);
if (hotplug_pio)
{
/* enable hotplug pio in syscfg */
syscfg2_27 = sysconf_claim (SYS_CFG, 2, 27, 27, "HDMI Hotplug PIO enable");
sysconf_write (syscfg2_27, 1);
printk (KERN_INFO "stmcore-display: using HDMI hotplug\n");
}
else
printk (KERN_INFO "stmcore-display: HDMI hotplug not available\n");
printk(KERN_WARNING "stmcore-display: STi7106 display: probed\n");
return 0;
}
printk(KERN_WARNING "stmcore-display: STi7106 display: platform unknown\n");
return -ENODEV;
}
int __init stmcore_probe_device(struct stmcore_display_pipeline_data **pd, int *nr_platform_devices)
{
if(SYSCONF_DEVICEID != 0)
{
unsigned long *devid = ioremap(SYSCONF_DEVICEID, sizeof(unsigned long));
unsigned long chipid = readl(devid);
int is7100 = (((chipid>>12)&0x3ff) != 0x02c);
iounmap(devid);
if(is7100)
{
*pd = platform_data;
*nr_platform_devices = N_ELEMENTS (platform_data);
hotplug_pio = stpio_request_pin(2,2,"HDMI Hotplug",STPIO_BIDIR_Z1);
if(!hotplug_pio)
{
printk(KERN_WARNING "stmcore-display: Hotplug PIO already in use (by SSC driver?)\n");
printk(KERN_WARNING "stmcore-display: HDMI will not work in this board configuration\n");
}
return 0;
}
}
static int __init device_init(void)
{
stx7111_configure_pci(&pci_config);
stx7111_configure_pwm(&pwm_private_info);
stx7111_configure_ssc(&ssc_private_info);
stx7111_configure_usb(1); /* Enable inverter */
stx7111_configure_ethernet(1, 0, 0, 0);
stx7111_configure_lirc(&lirc_scd);
vpp_pio = stpio_request_pin(3,4, "VPP", STPIO_OUT);
#ifdef CONFIG_SND
i2c_register_board_info(1, &mb618_scart_audio, 1);
#endif
#ifndef FLASH_NOR
stx7111_configure_nand(&mb618_nand_config);
/* The MTD NAND code doesn't understand the concept of VPP,
* (or hardware write protect) so permanently enable it.
*/
stpio_set_pin(vpp_pio, 1);
#endif
return platform_add_devices(mb618_devices, ARRAY_SIZE(mb618_devices));
}
static void serial3_init (void)
{
/* Configure the PIO pins */
stpio_request_pin(5, 0, tx_pio_name, STPIO_ALT_OUT); /* Tx */
stpio_request_pin(5, 1, rx_pio_name, STPIO_IN); /* Rx */
*(unsigned int*)(PIO5BaseAddress + PIO_CLR_PnC0) = 0x07;
*(unsigned int*)(PIO5BaseAddress + PIO_CLR_PnC1) = 0x06;
*(unsigned int*)(PIO5BaseAddress + PIO_SET_PnC1) = 0x01;
*(unsigned int*)(PIO5BaseAddress + PIO_SET_PnC2) = 0x07;
*(unsigned int*)(ASC3BaseAddress + ASC_INT_EN) = 0x00000000;
*(unsigned int*)(ASC3BaseAddress + ASC_CTRL) = 0x00001589;
*(unsigned int*)(ASC3BaseAddress + ASC_TIMEOUT) = 0x00000010;
*(unsigned int*)(ASC3BaseAddress + ASC_BAUDRATE) = 100; //0x000000c9; FIXME: may be switch to mode 0?
*(unsigned int*)(ASC3BaseAddress + ASC_TX_RST) = 0;
*(unsigned int*)(ASC3BaseAddress + ASC_RX_RST) = 0;
}
static int __init hms1_device_init(void)
{
stx7100_configure_sata();
stx7100_configure_pwm(&pwm_private_info);
stx7100_configure_ssc(&ssc_private_info);
stx7100_configure_usb();
stx7100_configure_pata(3, 1, IRL1_IRQ);
stx7100_configure_lirc(NULL);
vpp_pio = stpio_request_pin(2,5, "VPP", STPIO_OUT);
return platform_add_devices(hms1_devices, ARRAY_SIZE(hms1_devices));
}
YW_ErrorType_T YWGPIO_Open(YWGPIO_Handle_T *pGpioHandle,
YWGPIO_OpenParams_T *GpioOpenParams)
{
struct stpio_pin *pPio = NULL;
pPio = stpio_request_pin(GpioOpenParams->GpioIndex / PIO_BITS,
GpioOpenParams->GpioIndex % PIO_BITS,
"LED", STPIO_OUT);
//printk("pPio = 0x%x\n", (int)pPio);
if (pPio)
{
(*pGpioHandle) = (YWGPIO_Handle_T)pPio;
}
return YW_NO_ERROR;
}
static void ufs910led_red_set(struct led_classdev *led_cdev,
enum led_brightness value)
{
dprintk("[LED] ufs910led_red_set\n");
if (ledred == NULL) {
dprintk("[LED] ledred is NULL, requesting pin\n");
ledred = stpio_request_pin(0, 2, "LED", STPIO_OUT);
}
if (value) {
dprintk("[LED] ufs910led_red_set ON\n");
stpio_set_pin(ledred, 0);
}
else {
dprintk("[LED] ufs910led_red_set OFF\n");
stpio_set_pin(ledred, 1);
}
}
int cic_init_hw(void)
{
struct ufs9xx_cic_state *state = &ci_state;
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_LCK, 0x00);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_GEN_CFG, 0x18);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA0, 0x04f446d9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA1, 0xfd44ffff);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA2, 0xfd88ffff);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA3, 0x00000000);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA0, 0x04f446d9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA1, 0xfd44ffff);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA2, 0xfd88ffff);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA3, 0x00000000);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_LCK, 0x1f);
state->module_status[0] = SLOTSTATUS_NONE;
state->module_status[1] = SLOTSTATUS_NONE;
/* will be set to one if a module is present in slot a/b.
*/
state->module_ready_pin[0] = state->slot_status[0] = stpio_request_pin (6, 0, "SLOT_A_STA", STPIO_IN);
state->module_ready_pin[1] = state->slot_status[1] = stpio_request_pin (6, 1, "SLOT_B_STA", STPIO_IN);
/* these one will set and then cleared if a module is presented
* or for reset purpose. in our case its ok todo this only
* in reset function because it will be called after a module
* is inserted (in e2 case, if other applications does not do
* this we must set and clear it also in the poll function).
*/
/* fixme: not sure here */
state->slot_reset[0] = stpio_request_pin (6, 2, "SLOT_A", STPIO_OUT);
state->slot_reset[1] = stpio_request_pin (6, 3, "SLOT_B", STPIO_OUT);
/* must be cleared when a module is present and vice versa
*/
state->slot_enable[0] = stpio_request_pin (6, 4, "SLOT_A_EN", STPIO_OUT);
state->slot_enable[1] = stpio_request_pin (6, 5, "SLOT_B_EN", STPIO_OUT);
stpio_set_pin(state->slot_enable[0], 0);
mdelay(50);
stpio_set_pin(state->slot_enable[0], 1);
stpio_set_pin(state->slot_enable[1], 0);
mdelay(50);
stpio_set_pin(state->slot_enable[1], 1);
return 0;
}
static int __init init_fan_module(void)
{
install_e2_procs(e2_procs[0].name, e2_procs[0].read_proc, e2_procs[0].write_proc, NULL);
fan_registers = (unsigned long) ioremap(0x18010000, 0x100);
printk("fan_registers = 0x%.8lx\n\t", fan_registers);
fan_pin = stpio_request_pin (4, 7, "fan ctrl", STPIO_ALT_OUT);
stpio_set_pin(fan_pin, 1);
printk("fan pin %p\n", fan_pin);
//not sure if first one is necessary
ctrl_outl(0x200, fan_registers + 0x50);
//set a default speed, because default is zero
ctrl_outl(0xaa, fan_registers + 0x4);
return 0;
}
int stv6418_init(struct i2c_client *client)
{
regs[0] = 0x00;
regs[1] = 0x40; /* 0x40 */
regs[2] = 0x09; /* 0x09 */
regs[3] = 0x11;
regs[4] = 0x84;
regs[5] = 0x84;
regs[6] = 0x25;
regs[7] = 0x08;
regs[8] = 0x21;
regs[9] = 0xc0;
regs[10]= 0x00;
#if !defined(IPBOX9900) && !defined(IPBOX99) && !defined(ATEVIO7500) && !defined(CUBEREVO_3000HD)
eMute= stpio_request_pin (2, 2, "AVS_MUTE", STPIO_OUT);
if (eMute == NULL)
{
dprintk("[AVS]: request mute bin failed!\n");
return -EIO;
}
#endif
return stv6418_set(client);
}
static int __init tfswitch_init_module(void)
{
printk("Loading TF7700 switch driver\n");
/* create a proc entry and set the read function */
pEntry = create_proc_entry(PROC_ENTRY_NAME, 0, NULL);
if(pEntry == NULL)
{
printk("TF7700 switch driver: cannot allocate proc entry\n");
return 1;
}
pEntry->read_proc = tfswitch_read_proc;
/* allocate the I/O pin */
pPin = stpio_request_pin(4, 4, "rear switch", STPIO_IN);
if(pEntry == NULL)
{
printk("TF7700 switch driver: cannot allocate pin\n");
remove_proc_entry(PROC_ENTRY_NAME, pEntry->parent);
return 1;
}
return 0;
}
void fe_core_register_frontend(struct dvb_adapter *dvb_adap)
{
int i = 0;
int vLoop = 0;
printk (KERN_INFO "%s: stv090x DVB: 0.11 \n", __FUNCTION__);
if(pin_rx_diseq==NULL) pin_rx_diseq = stpio_request_pin (5, 4, "pin_rx_diseq", STPIO_IN);
if(pin_rx_diseq==NULL) {printk("Error DiseqC PIO\n");return;}
printk("DiseqC OK\n");
core[i] = (struct core*) kmalloc(sizeof(struct core),GFP_KERNEL);
if (!core[i])
return;
memset(core[i], 0, sizeof(struct core));
core[i]->dvb_adapter = dvb_adap;
dvb_adap->priv = core[i];
printk("tuner = %d\n", ARRAY_SIZE(tuner_resources));
for (vLoop = 0; vLoop < ARRAY_SIZE(tuner_resources); vLoop++)
{
if (core[i]->frontend[vLoop] == NULL)
{
printk("%s: init tuner %d\n", __FUNCTION__, vLoop);
core[i]->frontend[vLoop] =
init_fe_device (core[i]->dvb_adapter, &tuner_resources[vLoop], vLoop);
}
}
printk (KERN_INFO "%s: <\n", __FUNCTION__);
return;
}
/*
* Probe for the NAND device.
*/
static int __init stm_nand_emi_probe(struct platform_device *pdev)
{
struct platform_nand_data *pdata = pdev->dev.platform_data;
struct plat_stmnand_data *stmdata = pdata->ctrl.priv;
struct stm_nand_emi *data;
struct nand_timing_data *tm;
int res = 0;
/* Allocate memory for the driver structure (and zero it) */
data = kzalloc(sizeof(struct stm_nand_emi), GFP_KERNEL);
if (!data) {
printk(KERN_ERR NAME
": Failed to allocate device structure.\n");
return -ENOMEM;
}
/* Get EMI Bank base address */
data->emi_bank = pdev->id;
data->emi_base = emi_bank_base(data->emi_bank) +
stmdata->emi_withinbankoffset;
data->emi_size = (1 << 18) + 1;
/* Configure EMI Bank */
if (nand_config_emi(data->emi_bank, stmdata->timing_data) != 0) {
printk(KERN_ERR NAME ": Failed to configure EMI bank "
"for NAND device\n");
goto out1;
}
/* Request IO Memory */
if (!request_mem_region(data->emi_base, data->emi_size, pdev->name)) {
printk(KERN_ERR NAME ": Request mem 0x%x region failed\n",
data->emi_base);
res = -ENODEV;
goto out1;
}
/* Map base address */
data->io_base = ioremap_nocache(data->emi_base, 4096);
if (!data->io_base) {
printk(KERN_ERR NAME ": ioremap failed for io_base 0x%08x\n",
data->emi_base);
res = -ENODEV;
goto out2;
}
#ifdef CONFIG_STM_NAND_EMI_CACHED
/* Map data address through cache line */
data->io_data = ioremap_cache(data->emi_base + 4096, 4096);
if (!data->io_data) {
printk(KERN_ERR NAME ": ioremap failed for io_data 0x%08x\n",
data->emi_base + 4096);
res = -ENOMEM;
goto out3;
}
#else
data->io_data = data->io_base;
#endif
/* Map cmd and addr addresses (emi_addr_17 and emi_addr_18) */
data->io_cmd = ioremap_nocache(data->emi_base | (1 << 17), 1);
if (!data->io_cmd) {
printk(KERN_ERR NAME ": ioremap failed for io_cmd 0x%08x\n",
data->emi_base | (1 << 17));
res = -ENOMEM;
goto out4;
}
data->io_addr = ioremap_nocache(data->emi_base | (1 << 18), 1);
if (!data->io_addr) {
printk(KERN_ERR NAME ": ioremap failed for io_addr 0x%08x\n",
data->emi_base | (1 << 18));
res = -ENOMEM;
goto out5;
}
data->chip.priv = data;
data->mtd.priv = &data->chip;
data->mtd.owner = THIS_MODULE;
/* Assign more sensible name (default is string from nand_ids.c!) */
data->mtd.name = pdev->dev.bus_id;
tm = stmdata->timing_data;
data->chip.IO_ADDR_R = data->io_base;
data->chip.IO_ADDR_W = data->io_base;
data->chip.chip_delay = tm->chip_delay;
data->chip.cmd_ctrl = nand_cmd_ctrl_emi;
/* Do we have access to NAND_RBn? */
if (stmdata->rbn_port >= 0) {
data->rbn = stpio_request_pin(stmdata->rbn_port,
stmdata->rbn_pin,
"nand_RBn", STPIO_IN);
if (data->rbn) {
data->chip.dev_ready = nand_device_ready;
} else {
printk(KERN_INFO NAME ": nand_rbn unavailable. "
"Falling back to chip_delay\n");
/* Set a default delay if not previosuly specified */
if (data->chip.chip_delay == 0)
data->chip.chip_delay = 30;
}
}
/* Set IO routines for acessing NAND pages */
#if defined(CONFIG_STM_NAND_EMI_FDMA)
data->chip.read_buf = nand_read_buf_dma;
data->chip.write_buf = nand_write_buf_dma;
data->dma_chan = -1;
data->init_fdma_jiffies = 0;
init_fdma_nand_ratelimit(data);
data->nand_phys_addr = data->emi_base;
#elif defined(CONFIG_STM_NAND_EMI_LONGSL)
data->chip.read_buf = nand_readsl_buf;
data->chip.write_buf = nand_writesl_buf;
#elif defined(CONFIG_STM_NAND_EMI_CACHED)
data->chip.read_buf = nand_read_buf_cached_block;
data->chip.write_buf = nand_write_buf_cached_block;
#elif defined(CONFIG_STM_NAND_EMI_BYTE)
/* Default byte orientated routines */
#else
#error "Must specify CONFIG_STM_NAND_EMI_xxxx mode"
#endif
data->chip.ecc.mode = NAND_ECC_SOFT;
/* Copy chip options from platform data */
data->chip.options = pdata->chip.options;
platform_set_drvdata(pdev, data);
/* Scan to find existance of the device */
if (nand_scan(&data->mtd, 1)) {
printk(KERN_ERR NAME ": nand_scan failed\n");
res = -ENXIO;
goto out6;
}
#ifdef CONFIG_MTD_PARTITIONS
res = parse_mtd_partitions(&data->mtd, part_probes, &data->parts, 0);
if (res > 0) {
add_mtd_partitions(&data->mtd, data->parts, res);
return 0;
}
if (pdata->chip.partitions) {
data->parts = pdata->chip.partitions;
res = add_mtd_partitions(&data->mtd, data->parts,
pdata->chip.nr_partitions);
} else
#endif
res = add_mtd_device(&data->mtd);
if (!res)
return res;
/* Release resources on error */
out6:
nand_release(&data->mtd);
if (data->rbn)
stpio_free_pin(data->rbn);
platform_set_drvdata(pdev, NULL);
iounmap(data->io_addr);
out5:
iounmap(data->io_cmd);
out4:
#ifdef CONFIG_STM_NAND_EMI_CACHED
iounmap(data->io_data);
out3:
#endif
iounmap(data->io_base);
out2:
release_mem_region(data->emi_base, data->emi_size);
out1:
kfree(data);
return res;
}
int cic_init_hw(void)
{
struct stpio_pin* enable_pin;
struct ufs9xx_cic_state *state = &ci_state;
ufs9xx_write_register_u32_map(0x19213000, 0x0000c0de);
ufs9xx_write_register_u32_map(0x19213038, 0x0000000b);
ufs9xx_write_register_u32_map(0x19213088, 0x00000001);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_LCK, 0x0);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_GEN_CFG, 0x00000018);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_FLASH_CLK_SEL, 0x2);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_CLK_EN, 0x1);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA0, 0x04f446d9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA1, 0xfd44ffff);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA2, 0xfd88ffff);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA3, 0x00000000);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA0, 0x04f446d9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA1, 0xfd44ffff);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA2, 0xfd88ffff);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA3, 0x00000000);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank4 + EMI_CFG_DATA0, 0x04f47ed1);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank4 + EMI_CFG_DATA1, 0x9e113f3f);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank4 + EMI_CFG_DATA2, 0x98339999);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank4 + EMI_CFG_DATA3, 0x00000000);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_LCK, 0x1F);
state->module_status[0] = SLOTSTATUS_NONE;
state->module_status[1] = SLOTSTATUS_NONE;
/* enables the ci controller itself */
state->ci_reset = enable_pin = stpio_request_pin (3, 4, "CI_enable", STPIO_OUT);
state->module_ready_pin[0] = stpio_request_pin (0, 1, "MOD_A_RDY", STPIO_IN);
state->module_ready_pin[1] = stpio_request_pin (0, 2, "MOD_B_RDY", STPIO_IN);
/* will be set to one if a module is present in slot a/b.
*/
state->slot_status[0] = stpio_request_pin (0, 0, "SLOT_A_STA", STPIO_IN);
state->slot_status[1] = stpio_request_pin (2, 6, "SLOT_B_STA", STPIO_IN);
/* these one will set and then cleared if a module is presented
* or for reset purpose. in our case its ok todo this only
* in reset function because it will be called after a module
* is inserted (in e2 case, if other applications does not do
* this we must set and clear it also in the poll function).
*/
state->slot_reset[0] = stpio_request_pin (5, 4, "SLOT_A", STPIO_OUT);
state->slot_reset[1] = stpio_request_pin (5, 5, "SLOT_B", STPIO_OUT);
/* must be cleared when a module is present and vice versa
* ->setting this bit during runtime gives output from maruapp
* isBusy ...
*/
state->slot_enable[0] = stpio_request_pin (5, 2, "SLOT_A_EN", STPIO_OUT);
state->slot_enable[1] = stpio_request_pin (5, 3, "SLOT_B_EN", STPIO_OUT);
//reset fpga charon
dprintk(1, "reset fpga charon\n");
stpio_set_pin(enable_pin, 0);
mdelay(50); //necessary?
stpio_set_pin(enable_pin, 1);
set_ts_path(TUNER_1_VIEW);
set_cam_path(TUNER_1_VIEW);
return 0;
}
int cic_init_hw(void)
{
struct ufs9xx_cic_state *state = &ci_state;
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_LCK, 0x00);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA0, 0x048637f9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA1, 0xbc66f9f9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA2, 0xbc66f9f9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank2 + EMI_CFG_DATA3, 0x00000000);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA0, 0x048637f9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA1, 0xbc66f9f9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA2, 0xbc66f9f9);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMIBank3 + EMI_CFG_DATA3, 0x00000000);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_LCK, 0x1f);
ufs9xx_write_register_u32_map(EMIConfigBaseAddress + EMI_GEN_CFG, 0x00000019);
state->module_status[0] = SLOTSTATUS_NONE;
state->module_status[1] = SLOTSTATUS_NONE;
state->ci_reset = stpio_request_pin (1, 6, "CI_RESET", STPIO_OUT);
/* necessary for accessing i2c-1 */
ufs9xx_write_register_u32_map(0xfe000010, 0x0000c0de);
ufs9xx_write_register_u32_map(0xfe0000b4, 0x00000008);
ufs9xx_write_register_u32_map(0xfe000010, 0x0000c1a0);
ufs9xx_write_register_u32_map(0xfe001160, 0x0000001c);
stpio_set_pin(state->ci_reset, 0);
msleep(250);
stpio_set_pin(state->ci_reset, 1);
ufs9xx_cic_writereg(state, 0x00, 0x23);
/* will be set to one if a module is present in slot a/b.
*/
state->slot_status[0] = stpio_request_pin (11, 4, "SLOT_A_STA", STPIO_IN);
state->slot_status[1] = stpio_request_pin (11, 5, "SLOT_B_STA", STPIO_IN);
dprintk(1,"status %p, %p\n", state->slot_status[0], state->slot_status[1]);
state->module_ready_pin[0] = stpio_request_pin (5, 5, "MOD_A_RDY", STPIO_IN);
state->module_ready_pin[1] = stpio_request_pin (5, 4, "MOD_B_RDY", STPIO_IN);
state->slot_reset[0] = stpio_request_pin (11, 6, "SLOT_A", STPIO_OUT);
state->slot_reset[1] = stpio_request_pin (11, 7, "SLOT_B", STPIO_OUT);
dprintk(1,"reset %p, %p\n", state->slot_reset[0], state->slot_reset[1]);
/* must be cleared when a module is present and vice versa
*/
state->slot_enable[0] = stpio_request_pin (11, 0, "SLOT_A_EN", STPIO_OUT);
state->slot_enable[1] = stpio_request_pin (11, 2, "SLOT_B_EN", STPIO_OUT);
dprintk(1, "enable %p, %p\n", state->slot_enable[0], state->slot_enable[1]);
stpio_set_pin(state->slot_enable[0], 0);
stpio_set_pin(state->slot_enable[1], 0);
return 0;
}
static int __init spi_probe(struct platform_device *pdev)
{
struct ssc_pio_t *pio_info =
(struct ssc_pio_t *)pdev->dev.platform_data;
struct spi_master *master;
struct spi_stm_gpio *st_bitbang;
dgb_print("\n");
master = spi_alloc_master(&pdev->dev, sizeof(struct spi_stm_gpio));
if (!master)
return -1;
st_bitbang = spi_master_get_devdata(master);
if (!st_bitbang)
return -1;
platform_set_drvdata(pdev, st_bitbang);
st_bitbang->bitbang.master = master;
st_bitbang->bitbang.master->setup = spi_stmpio_setup;
st_bitbang->bitbang.setup_transfer = spi_stmpio_setup_transfer;
st_bitbang->bitbang.chipselect = spi_stpio_chipselect;
st_bitbang->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_mode0;
st_bitbang->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_mode1;
st_bitbang->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_mode2;
st_bitbang->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_mode3;
if (pio_info->chipselect)
st_bitbang->bitbang.chipselect = (void (*)
(struct spi_device *, int))
(pio_info->chipselect);
else
st_bitbang->bitbang.chipselect = spi_stpio_chipselect;
master->num_chipselect = SPI_NO_CHIPSELECT + 1;
master->bus_num = pdev->id;
st_bitbang->max_speed_hz = SPI_STMPIO_MAX_SPEED_HZ;
pio_info->clk = stpio_request_pin(pio_info->pio[0].pio_port,
pio_info->pio[0].pio_pin,
"SPI Clock", STPIO_OUT);
if (!pio_info->clk) {
printk(KERN_ERR NAME " Faild to clk pin allocation PIO%d[%d]\n",
pio_info->pio[0].pio_port, pio_info->pio[0].pio_pin);
return -1;
}
pio_info->sdout = stpio_request_pin(pio_info->pio[1].pio_port,
pio_info->pio[1].pio_pin,
"SPI Data Out", STPIO_OUT);
if (!pio_info->sdout) {
printk(KERN_ERR NAME " Faild to sda pin allocation PIO%d[%d]\n",
pio_info->pio[1].pio_port, pio_info->pio[1].pio_pin);
return -1;
}
pio_info->sdin = stpio_request_pin(pio_info->pio[2].pio_port,
pio_info->pio[2].pio_pin,
"SPI Data In", STPIO_IN);
if (!pio_info->sdin) {
printk(KERN_ERR NAME " Faild to sdo pin allocation PIO%d[%d]\n",
pio_info->pio[1].pio_port, pio_info->pio[1].pio_pin);
return -1;
}
stpio_set_pin(pio_info->clk, 0);
stpio_set_pin(pio_info->sdout, 0);
stpio_set_pin(pio_info->sdin, 0);
if (spi_bitbang_start(&st_bitbang->bitbang)) {
printk(KERN_ERR NAME
"The SPI Core refuses the spi_stm_gpio adapter\n");
return -1;
}
printk(KERN_INFO NAME ": Registered SPI Bus %d: "
"SCL [%d,%d], SDO [%d,%d], SDI [%d, %d]\n",
master->bus_num,
pio_info->pio[0].pio_port, pio_info->pio[0].pio_pin,
pio_info->pio[1].pio_port, pio_info->pio[1].pio_pin,
pio_info->pio[2].pio_port, pio_info->pio[2].pio_pin);
return 0;
}
int proc_video_switch_write(struct file* file, const char __user* buf, unsigned long count, void* data)
{
char* page;
char* myString;
ssize_t ret = -ENOMEM;
unsigned long mlen;
printk("%s %ld - ", __FUNCTION__, count);
mutex_lock(&(ProcDeviceContext->DvbContext->Lock));
page = (char*)__get_free_page(GFP_KERNEL);
if (page)
{
ret = -EFAULT;
if (copy_from_user(page, buf, count))
goto out;
myString = (char*) kmalloc(count + 1, GFP_KERNEL);
strncpy(myString, page, count);
myString[count] = '\0';
mlen = count;
if ((count > 0) && (myString[count - 1] == '\n'))
{
myString[count - 1] = '\0';
count--;
}
printk("proc_video_switch_write >> %s\n", myString);
if (video_switch_type == 0)
{
if (fms6403_in2_sel_pin == NULL)
fms6403_in2_sel_pin = stpio_request_pin(5, 3, "fms6403_in2_sel_pin", STPIO_OUT);
if (fms6403_fsel0_pin == NULL)
fms6403_fsel0_pin = stpio_request_pin(4, 6, "fms6403_fsel0_pin", STPIO_OUT);
if (fms6403_fsel1_pin == NULL)
fms6403_fsel1_pin = stpio_request_pin(3, 5, "fms6403_fsel1_pin", STPIO_OUT);
if (strncmp("scart", myString, count) == 0)
{
stpio_set_pin(fms6403_in2_sel_pin, 0); //0=rgb 1=yvu
printk("!!!!!!!!!!!!! SET PAL !!!!!!!!!!!!!!\n");
video_switch = 0;
}
else if (strncmp("component1080p", myString, count) == 0)
{
stpio_set_pin(fms6403_in2_sel_pin, 1); //0=rgb 1=yvu
stpio_set_pin(fms6403_fsel0_pin, 1); //1080p50
stpio_set_pin(fms6403_fsel1_pin, 1);
printk("!!!!!!!!!!!!! SET Filter Bypass !!!!!!!!!!!!!!\n");
video_switch = 1;
}
else if (strncmp("component1080i", myString, count) == 0)
{
stpio_set_pin(fms6403_in2_sel_pin, 1); //0=rgb 1=yvu
stpio_set_pin(fms6403_fsel0_pin, 0); //720p/1080i
stpio_set_pin(fms6403_fsel1_pin, 1);
printk("!!!!!!!!!!!!! SET Filter FMS6403 32Mhz !!!!!!!!!!!!!!\n");
video_switch = 2;
}
else if (strncmp("component720p", myString, count) == 0)
{
stpio_set_pin(fms6403_in2_sel_pin, 1); //0=rgb 1=yvu
stpio_set_pin(fms6403_fsel0_pin, 0); //720p/1080i
stpio_set_pin(fms6403_fsel1_pin, 1);
printk("!!!!!!!!!!!!! SET Filter FMS6403 32Mhz !!!!!!!!!!!!!!\n");
video_switch = 3;
}
else if (strncmp("component576p", myString, count) == 0)
{
stpio_set_pin(fms6403_in2_sel_pin, 1); //0=rgb 1=yvu
stpio_set_pin(fms6403_fsel0_pin, 1); //576p
stpio_set_pin(fms6403_fsel1_pin, 0);
printk("!!!!!!!!!!!!! SET Filter FMS6403 15Mhz !!!!!!!!!!!!!!\n");
video_switch = 4;
}
else if (strncmp("component576i", myString, count) == 0)
{
stpio_set_pin(fms6403_in2_sel_pin, 1); //0=rgb 1=yvu
stpio_set_pin(fms6403_fsel0_pin, 1); //576p
stpio_set_pin(fms6403_fsel1_pin, 0);
printk("!!!!!!!!!!!!! SET Filter FMS6403 15Mhz !!!!!!!!!!!!!!\n");
video_switch = 5;
}
} //switch type
if (video_switch_type == 1) //bxzb
{
if (pin02 == NULL)
pin02 = stpio_request_pin(0, 2, "pin02", STPIO_OUT);
if (pin06 == NULL)
pin06 = stpio_request_pin(0, 6, "pin06", STPIO_OUT);
if (pin24 == NULL)
pin24 = stpio_request_pin(2, 4, "pin23", STPIO_OUT);
//0 0 1 - jest rgb
//0 0 0 - jest rgb
stpio_set_pin(pin02, 0); //pin6 - E
stpio_set_pin(pin06, 0);
stpio_set_pin(pin24, 1); //1-rgb
}
/* always return count to avoid endless loop */
//ret = count;
ret = mlen;
kfree(myString);
}
out:
free_page((unsigned long)page);
mutex_unlock(&(ProcDeviceContext->DvbContext->Lock));
return ret;
}
/* For SSC SPI as MASTER, TX/RX is handled as follows:
1. Fill the TX_FIFO with up to (SSC_TXFIFO_SIZE - 1) words, and enable
TX_FIFO_EMPTY interrupts.
2. When the last word of TX_FIFO is copied to the shift register,
a TX_FIFO_EMPTY interrupt is issued, and the last word will *start* being
shifted out/in.
3. On receiving a TX_FIFO_EMPTY interrupt, copy all *available* received
words from the RX_FIFO. Note, depending on the time taken to shift out/in
the 'last' word compared to the IRQ latency, the 'last' word may not be
available yet in the RX_FIFO.
4. If there are more bytes to TX, refill the TX_FIFO. Since the 'last' word
from the previous iteration may still be (or about to be) in the RX_FIFO,
only add up to (SSC_TXFIFO_SIZE - 1) words. If all bytes have been
transmitted, disable TX and set completion.
5. If we are interested in the received data, check to see if the 'last' word
has been received. If not, then wait the period of shifting 1 word, then
read the 'last' word from the RX_FIFO.
*/
static void spi_stmssc_fill_tx_fifo(struct spi_stm_ssc *st_ssc)
{
union {
u8 bytes[4];
u32 dword;
} tmp = {.dword = 0,};
int i;
for (i = 0;
i < SSC_TXFIFO_SIZE - 1 && st_ssc->tx_bytes_pending > 0; i++) {
if (st_ssc->bits_per_word > 8) {
if (st_ssc->tx_ptr) {
tmp.bytes[1] = *st_ssc->tx_ptr++;
tmp.bytes[0] = *st_ssc->tx_ptr++;
} else {
tmp.bytes[1] = 0;
tmp.bytes[0] = 0;
}
st_ssc->tx_bytes_pending -= 2;
} else {
if (st_ssc->tx_ptr)
tmp.bytes[0] = *st_ssc->tx_ptr++;
else
tmp.bytes[0] = 0;
st_ssc->tx_bytes_pending--;
}
ssc_store32(st_ssc, SSC_TBUF, tmp.dword);
}
}
static int spi_stmssc_rx_mopup(struct spi_stm_ssc *st_ssc)
{
unsigned long word_period_ns;
u32 rx_fifo_status;
union {
u8 bytes[4];
u32 dword;
} tmp = {.dword = 0,};
dgb_print("\n");
word_period_ns = 1000000000 / st_ssc->baud;
word_period_ns *= st_ssc->bits_per_word;
/* delay for period equivalent to shifting 1 complete word
out of and into shift register */
ndelay(word_period_ns);
/* Check 'last' word is actually there! */
rx_fifo_status = ssc_load32(st_ssc, SSC_RX_FSTAT);
if (rx_fifo_status == 1) {
tmp.dword = ssc_load32(st_ssc, SSC_RBUF);
if (st_ssc->bits_per_word > 8) {
if (st_ssc->rx_ptr) {
*st_ssc->rx_ptr++ = tmp.bytes[1];
*st_ssc->rx_ptr++ = tmp.bytes[0];
}
st_ssc->rx_bytes_pending -= 2;
} else {
if (st_ssc->rx_ptr)
*st_ssc->rx_ptr++ = tmp.bytes[0];
st_ssc->rx_bytes_pending--;
}
} else {
dgb_print("should only be one word in RX_FIFO"
"(rx_fifo_status = %d)\n", rx_fifo_status);
}
return 0;
}
static int spi_stmssc_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
{
struct spi_stm_ssc *st_ssc;
dgb_print("\n");
st_ssc = spi_master_get_devdata(spi->master);
st_ssc->tx_ptr = t->tx_buf;
st_ssc->rx_ptr = t->rx_buf;
st_ssc->tx_bytes_pending = t->len;
st_ssc->rx_bytes_pending = t->len;
INIT_COMPLETION(st_ssc->done);
/* fill TX_FIFO */
spi_stmssc_fill_tx_fifo(st_ssc);
/* enable TX_FIFO_EMPTY interrupts */
ssc_store32(st_ssc, SSC_IEN, SSC_IEN_TIEN);
/* wait for all bytes to be transmitted*/
wait_for_completion(&st_ssc->done);
/* check 'last' byte has been received */
/* NOTE: need to read rxbuf, even if ignoring the result! */
if (st_ssc->rx_bytes_pending)
spi_stmssc_rx_mopup(st_ssc);
/* disable ints */
ssc_store32(st_ssc, SSC_IEN, 0x0);
return t->len - st_ssc->tx_bytes_pending;
}
static irqreturn_t spi_stmssc_irq(int irq, void *dev_id)
{
struct spi_stm_ssc *st_ssc = (struct spi_stm_ssc *)dev_id;
unsigned int rx_fifo_status;
u32 ssc_status;
union {
u8 bytes[4];
u32 dword;
} tmp = {.dword = 0,};
ssc_status = ssc_load32(st_ssc, SSC_STA);
/* FIFO_TX_EMPTY */
if (ssc_status & SSC_STA_TIR) {
/* Find number of words available in RX_FIFO: 8 if RX_FIFO_FULL,
else SSC_RX_FSTAT (0-7)
*/
rx_fifo_status = (ssc_status & SSC_STA_RIR) ? 8 :
ssc_load32(st_ssc, SSC_RX_FSTAT);
/* Read all available words from RX_FIFO */
while (rx_fifo_status) {
tmp.dword = ssc_load32(st_ssc, SSC_RBUF);
if (st_ssc->bits_per_word > 8) {
if (st_ssc->rx_ptr) {
*st_ssc->rx_ptr++ = tmp.bytes[1];
*st_ssc->rx_ptr++ = tmp.bytes[0];
}
st_ssc->rx_bytes_pending -= 2;
} else {
if (st_ssc->rx_ptr)
*st_ssc->rx_ptr++ = tmp.bytes[0];
st_ssc->rx_bytes_pending--;
}
rx_fifo_status = ssc_load32(st_ssc, SSC_RX_FSTAT);
}
/* See if there is more data to send */
if (st_ssc->tx_bytes_pending > 0)
spi_stmssc_fill_tx_fifo(st_ssc);
else {
/* No more data to send */
ssc_store32(st_ssc, SSC_IEN, 0x0);
complete(&st_ssc->done);
}
}
return IRQ_HANDLED;
}
static int __init spi_stm_probe(struct platform_device *pdev)
{
struct ssc_pio_t *pio_info =
(struct ssc_pio_t *)pdev->dev.platform_data;
struct spi_master *master;
struct resource *res;
struct spi_stm_ssc *st_ssc;
u32 reg;
master = spi_alloc_master(&pdev->dev, sizeof(struct spi_stm_ssc));
if (!master)
return -ENOMEM;
platform_set_drvdata(pdev, master);
st_ssc = spi_master_get_devdata(master);
st_ssc->bitbang.master = spi_master_get(master);
st_ssc->bitbang.setup_transfer = spi_stmssc_setup_transfer;
st_ssc->bitbang.txrx_bufs = spi_stmssc_txrx_bufs;
st_ssc->bitbang.master->setup = spi_stmssc_setup;
if (pio_info->chipselect)
st_ssc->bitbang.chipselect = (void (*)
(struct spi_device *, int))
pio_info->chipselect;
else
st_ssc->bitbang.chipselect = spi_stpio_chipselect;
master->num_chipselect = SPI_NO_CHIPSELECT + 1;
master->bus_num = pdev->id;
init_completion(&st_ssc->done);
/* Get resources */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
if (!devm_request_mem_region(&pdev->dev, res->start,
res->end - res->start, "spi")) {
printk(KERN_ERR NAME " Request mem 0x%x region failed\n",
res->start);
return -ENOMEM;
}
st_ssc->base =
(unsigned long) devm_ioremap_nocache(&pdev->dev, res->start,
res->end - res->start);
if (!st_ssc->base) {
printk(KERN_ERR NAME " Request iomem 0x%x region failed\n",
res->start);
return -ENOMEM;
}
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
printk(KERN_ERR NAME " Request irq %d failed\n", res->start);
return -ENODEV;
}
if (devm_request_irq(&pdev->dev, res->start, spi_stmssc_irq,
IRQF_DISABLED, "stspi", st_ssc) < 0) {
printk(KERN_ERR NAME " Request irq failed\n");
return -ENODEV;
}
/* Check for hard wired SSC which doesn't use PIO pins */
if (pio_info->pio[0].pio_port == SSC_NO_PIO)
goto ssc_hard_wired;
/* Get PIO pins */
pio_info->clk = stpio_request_set_pin(pio_info->pio[0].pio_port,
pio_info->pio[0].pio_pin,
"SPI Clock", STPIO_BIDIR, 0);
if (!pio_info->clk) {
printk(KERN_ERR NAME
" Failed to allocate clk pin (PIO%d[%d])\n",
pio_info->pio[0].pio_port, pio_info->pio[0].pio_pin);
return -ENODEV;
}
pio_info->sdout = stpio_request_set_pin(pio_info->pio[1].pio_port,
pio_info->pio[1].pio_pin,
"SPI Data out", STPIO_BIDIR, 0);
if (!pio_info->sdout) {
printk(KERN_ERR NAME
" Failed to allocate sdo pin (PIO%d[%d])\n",
pio_info->pio[1].pio_port, pio_info->pio[1].pio_pin);
return -ENODEV;
}
pio_info->sdin = stpio_request_pin(pio_info->pio[2].pio_port,
pio_info->pio[2].pio_pin,
"SPI Data in", STPIO_IN);
if (!pio_info->sdin) {
printk(KERN_ERR NAME
" Failed to allocate sdi pin (PIO%d[%d])\n",
pio_info->pio[2].pio_port, pio_info->pio[2].pio_pin);
return -ENODEV;
}
ssc_hard_wired:
/* Disable I2C and Reset SSC */
ssc_store32(st_ssc, SSC_I2C, 0x0);
reg = ssc_load16(st_ssc, SSC_CTL);
reg |= SSC_CTL_SR;
ssc_store32(st_ssc, SSC_CTL, reg);
udelay(1);
reg = ssc_load32(st_ssc, SSC_CTL);
reg &= ~SSC_CTL_SR;
ssc_store32(st_ssc, SSC_CTL, reg);
/* Set SSC into slave mode before reconfiguring PIO pins */
reg = ssc_load32(st_ssc, SSC_CTL);
reg &= ~SSC_CTL_MS;
ssc_store32(st_ssc, SSC_CTL, reg);
if (pio_info->pio[0].pio_port == SSC_NO_PIO)
goto ssc_hard_wired2;
#ifdef CONFIG_CPU_SUBTYPE_STX7141
stpio_configure_pin(pio_info->clk, STPIO_OUT);
stpio_configure_pin(pio_info->sdout, STPIO_OUT);
stpio_configure_pin(pio_info->sdin, STPIO_IN);
#else
stpio_configure_pin(pio_info->clk, STPIO_ALT_OUT);
stpio_configure_pin(pio_info->sdout, STPIO_ALT_OUT);
stpio_configure_pin(pio_info->sdin, STPIO_IN);
#endif
ssc_hard_wired2:
st_ssc->fcomms = clk_get_rate(clk_get(NULL, "comms_clk"));;
/* Start bitbang worker */
if (spi_bitbang_start(&st_ssc->bitbang)) {
printk(KERN_ERR NAME
" The SPI Core refuses the spi_stm_ssc adapter\n");
return -1;
}
printk(KERN_INFO NAME ": Registered SPI Bus %d: "
"CLK[%d,%d] SDOUT[%d, %d] SDIN[%d, %d]\n", master->bus_num,
pio_info->pio[0].pio_port, pio_info->pio[0].pio_pin,
pio_info->pio[1].pio_port, pio_info->pio[1].pio_pin,
pio_info->pio[2].pio_port, pio_info->pio[2].pio_pin);
return 0;
}
static int spi_stm_remove(struct platform_device *pdev)
{
struct spi_stm_ssc *st_ssc;
struct spi_master *master;
struct ssc_pio_t *pio_info =
(struct ssc_pio_t *)pdev->dev.platform_data;
master = platform_get_drvdata(pdev);
st_ssc = spi_master_get_devdata(master);
spi_bitbang_stop(&st_ssc->bitbang);
if (pio_info->sdin) {
stpio_free_pin(pio_info->sdin);
stpio_free_pin(pio_info->clk);
stpio_free_pin(pio_info->sdout);
}
return 0;
}
static struct platform_driver spi_hw_driver = {
.driver.name = "spi_st_ssc",
.driver.owner = THIS_MODULE,
.probe = spi_stm_probe,
.remove = spi_stm_remove,
};
static int __init spi_stm_ssc_init(void)
{
printk(KERN_INFO NAME ": SSC SPI Driver\n");
return platform_driver_register(&spi_hw_driver);
}
static void __exit spi_stm_ssc_exit(void)
{
dgb_print("\n");
platform_driver_unregister(&spi_hw_driver);
}
module_init(spi_stm_ssc_init);
module_exit(spi_stm_ssc_exit);
MODULE_AUTHOR("STMicroelectronics <www.st.com>");
MODULE_DESCRIPTION("STM SSC SPI driver");
MODULE_LICENSE("GPL");
static struct dvb_frontend *
init_stv090x_device (struct dvb_adapter *adapter,
struct plat_tuner_config *tuner_cfg, int i)
{
struct dvb_frontend *frontend;
struct core_config *cfg;
printk ("> (bus = %d) %s\n", tuner_cfg->i2c_bus,__FUNCTION__);
cfg = kmalloc (sizeof (struct core_config), GFP_KERNEL);
if (cfg == NULL)
{
printk ("stv090x: kmalloc failed\n");
return NULL;
}
/* initialize the config data */
cfg->tuner_enable_pin = NULL;
cfg->i2c_adap = i2c_get_adapter (tuner_cfg->i2c_bus);
printk("i2c adapter = 0x%0x\n", cfg->i2c_adap);
cfg->i2c_addr = tuner_cfg->i2c_addr;
printk("i2c addr = %02x\n", cfg->i2c_addr);
#if !defined(SPARK)
printk("tuner enable = %d.%d\n", tuner_cfg->tuner_enable[0], tuner_cfg->tuner_enable[1]);
cfg->tuner_enable_pin = stpio_request_pin (tuner_cfg->tuner_enable[0],
tuner_cfg->tuner_enable[1],
"tuner enabl", STPIO_OUT);
if (cfg->tuner_enable_pin == NULL)
{
printk ("[stv090x] failed to allocate resources (tuner enable pin)\n");
goto error;
}
#endif
if (cfg->i2c_adap == NULL)
{
printk ("[stv090x] failed to allocate resources (i2c adapter)\n");
goto error;
}
cfg->tuner_enable_act = tuner_cfg->tuner_enable[2];
if (cfg->tuner_enable_pin != NULL)
{
stpio_set_pin (cfg->tuner_enable_pin, !cfg->tuner_enable_act);
stpio_set_pin (cfg->tuner_enable_pin, cfg->tuner_enable_act);
#if defined(UFS912) || defined(HS7810A) || defined(HS7110) || defined(WHITEBOX)
/* give the tuner some time to power up. trial fix for tuner
* not available after boot on some boxes.
*
*/
msleep(250);
#endif
}
frontend = frontend_init(cfg, i);
if (frontend == NULL)
{
printk ("[stv090x] frontend init failed!\n");
goto error;
}
printk (KERN_INFO "%s: Call dvb_register_frontend (adapter = 0x%x)\n",
__FUNCTION__, (unsigned int) adapter);
if (dvb_register_frontend (adapter, frontend))
{
printk ("[stv090x] frontend registration failed !\n");
if (frontend->ops.release)
frontend->ops.release (frontend);
goto error;
}
return frontend;
error:
if(cfg->tuner_enable_pin != NULL)
{
printk("[stv090x] freeing tuner enable pin\n");
stpio_free_pin (cfg->tuner_enable_pin);
}
kfree(cfg);
return NULL;
}
/*=============================================================================
Function : kfront_init
Description :
Input :
Output :
Return :
=============================================================================*/
int kfront_init(void)
{
void *data;
int rv = -1;
int i;
printk("FP driver for abip 55hd\nVersion %d.%02d (c) 2010 Sysifos\n", FP55_MODULE_VERSION / 100, FP55_MODULE_VERSION % 100);
printk("Built %s %s\n", __DATE__, __TIME__);
sema_init(&sem, 0);
sema_init(&sem_lock, 1);
/* alloc key buffer */
data = vmalloc(KEY_BUF_SIZE);
if (!data)
return -ENOMEM;
dvb_ringbuffer_init(&ci_rbuffer, data, KEY_BUF_SIZE);
kfront = vmalloc(sizeof(struct kfront_tag));
if (!kfront)
return -ENOMEM;
/* open pio */
kfront->clk = stpio_request_pin(PIO_CLOCK_PORT, PIO_CLOCK_BIT, "clock", STPIO_OUT);
kfront->data = stpio_request_pin(PIO_DATA_PORT, PIO_DATA_BIT, "data", STPIO_BIDIR/*STPIO_OUT*/);
kfront->stb = stpio_request_pin(PIO_STB_PORT, PIO_STB_BIT, "stb", STPIO_OUT);
if (!kfront->clk || !kfront->data || !kfront->stb)
{
dprintk("%s: kfront->clk=%p, kfront->data=%p kfront->stb=%p open error\n", __func__, kfront->clk, kfront->data, kfront->stb);
goto error1;
}
/* initialize */
initial();
/* start task */
kfront->bQuit = 0;
kfront->th = kthread_create(kfront_thread, kfront, "kfront");
if (IS_ERR(kfront->th))
{
dprintk("%s: unable to start task\n", __func__);
goto error2;
}
else
{
wake_up_process(kfront->th);
}
/* register device */
if (register_chrdev(KFRONT_MAJOR, "kfront0", &kfront_fops))
{
dprintk("%s:: Unable to register driver\n", __func__);
goto error3;
}
// input device init
fp_button_dev = input_allocate_device();
if (!fp_button_dev)
{
printk("FP: ERR: Not enough memory\n");
rv = -ENOMEM;
goto error3;
}
printk("FP: register key events:");
set_bit(EV_KEY, fp_button_dev->evbit);
memset(fp_button_dev->keybit, 0, sizeof(fp_button_dev->keybit));
for (i = 0; i < FP_KEYS_MAX; i++)
if (fp_keys[i].key)
{
set_bit(fp_keys[i].key, fp_button_dev->keybit);
printk(" [%s]", fp_keys[i].name);
}
printk("\n");
fp_button_dev->name = "Frontpanel";
if (input_register_device(fp_button_dev))
{
printk("FP: ERR: Failed to register input device\n");
rv = -ENOMEM;
goto error3;
}
return 0; // all is ok
error3:
if (kfront->th)
{
kfront->bQuit = 1;
kthread_stop(kfront->th);
}
error2:
if (kfront->clk)
stpio_free_pin(kfront->clk);
if (kfront->data)
stpio_free_pin(kfront->data);
if (kfront->stb)
stpio_free_pin(kfront->stb);
error1:
if (kfront)
{
vfree(kfront);
kfront = NULL;
}
if (data)
vfree(data);
return -1;
}
int avs_pio_init(void)
{
#if defined(SPARK7162)
avs_mode = stpio_request_pin (11, 5, "avs_mode", STPIO_OUT);
avs_format = stpio_request_pin (11, 4, "avs_format", STPIO_OUT);
avs_standby = stpio_request_pin (11, 3, "avs_standby", STPIO_OUT);
avs_mute = stpio_request_pin (11, 2, "avs_mute", STPIO_OUT);
avs_src = NULL;
#elif defined(SPARK)
avs_mode = stpio_request_pin (6, 0, "avs_mode", STPIO_OUT);
avs_format = stpio_request_pin (6, 2, "avs_format", STPIO_OUT);
avs_standby = stpio_request_pin (6, 1, "avs_standby", STPIO_OUT);
avs_mute = stpio_request_pin (2, 4, "avs_mute", STPIO_OUT);
avs_src = NULL;
#elif defined(HS7420) || defined(HS7429) || defined(HS7810A) || defined(HS7819)
avs_format = stpio_request_pin (6, 5, "avs0", STPIO_OUT);
avs_standby = stpio_request_pin (6, 6, "avs1", STPIO_OUT);
avs_mode = stpio_request_pin (6, 4, "avs2", STPIO_OUT);
avs_mute = NULL;
avs_src = NULL;
#else
return 0;
#endif
if ((avs_mode == NULL) || (avs_format == NULL) || (avs_standby == NULL))
{
if(avs_mode != NULL)
stpio_free_pin(avs_mode);
else
dprintk("[AVS]: avs_mode error\n");
if(avs_format != NULL)
stpio_free_pin (avs_format);
else
dprintk("[AVS]: avs_format error\n");
if(avs_standby != NULL)
stpio_free_pin(avs_standby);
else
dprintk("[AVS]: avs_standby error\n");
return -1;
}
#if defined(SPARK) || defined(SPARK7162)
if (avs_mute == NULL)
{
dprintk("[AVS]: avs_mute error\n");
return -1;
}
#endif
dprintk("[AVS-PIO]: init success\n");
return 0;
}
int lnb_pio_init(void)
{
lnb_power = NULL;
lnb_13_18 = NULL;
lnb_14_19 = NULL;
#if defined(SPARK)
lnb_power = stpio_request_pin (6, 5, "lnb_power", STPIO_OUT);
lnb_13_18 = stpio_request_pin (6, 6, "lnb_13/18", STPIO_OUT);
lnb_14_19 = stpio_request_pin (5, 5, "lnb_14/19", STPIO_OUT);
if ((lnb_power == NULL) || (lnb_13_18 == NULL) || (lnb_14_19 == NULL))
{
if(lnb_power != NULL)
stpio_free_pin(lnb_power);
else
dprintk("[LNB] error requesting lnb power pin\n");
if(lnb_13_18 != NULL)
stpio_free_pin (lnb_13_18);
else
dprintk("[LNB] error requesting lnb 13/18 pin\n");
if(lnb_14_19 != NULL)
stpio_free_pin(lnb_14_19);
else
dprintk("[LNB] error requesting lnb 14/19 pin\n");
return -EIO;
}
#elif defined(ATEMIO520)
lnb_power = stpio_request_pin (6, 2, "lnb_power", STPIO_OUT);
lnb_13_18 = stpio_request_pin (6, 3, "lnb_13/18", STPIO_OUT);
if ((lnb_power == NULL) || (lnb_13_18 == NULL))
{
if(lnb_power != NULL)
stpio_free_pin(lnb_power);
else
dprintk("[LNB:ATEMIO520] error requesting lnb power pin\n");
if(lnb_13_18 != NULL)
stpio_free_pin (lnb_13_18);
else
dprintk("[LNB:ATEMIO520] error requesting lnb 13/18 pin\n");
return -EIO;
}
#elif defined(ATEMIO530)
lnb_power = stpio_request_pin (6, 2, "lnb_power", STPIO_OUT);
lnb_13_18 = stpio_request_pin (6, 3, "lnb_13/18", STPIO_OUT);
if ((lnb_power == NULL) || (lnb_13_18 == NULL))
{
if(lnb_power != NULL)
stpio_free_pin(lnb_power);
else
dprintk("[LNB:ATEMIO530] error requesting lnb power pin\n");
if(lnb_13_18 != NULL)
stpio_free_pin (lnb_13_18);
else
dprintk("[LNB:ATEMIO530] error requesting lnb 13/18 pin\n");
return -EIO;
}
#endif
stpio_set_pin(lnb_power, 0); // set power off
dprintk("[LNB-PIO] init success...\n");
return 0;
}
