static int bcm47xx_get_invariants(struct ssb_bus *bus,
struct ssb_init_invariants *iv)
{
char buf[100];
/* Fill boardinfo structure */
memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo));
if (cfe_getenv("boardvendor", buf, sizeof(buf)) >= 0)
iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
if (cfe_getenv("boardtype", buf, sizeof(buf)) >= 0)
iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
if (cfe_getenv("boardrev", buf, sizeof(buf)) >= 0)
iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
/* Fill sprom structure */
memset(&(iv->sprom), 0, sizeof(struct ssb_sprom));
iv->sprom.revision = 3;
if (cfe_getenv("et0macaddr", buf, sizeof(buf)) >= 0)
str2eaddr(buf, iv->sprom.et0mac);
if (cfe_getenv("et1macaddr", buf, sizeof(buf)) >= 0)
str2eaddr(buf, iv->sprom.et1mac);
if (cfe_getenv("et0phyaddr", buf, sizeof(buf)) >= 0)
iv->sprom.et0phyaddr = simple_strtoul(buf, NULL, 10);
if (cfe_getenv("et1phyaddr", buf, sizeof(buf)) >= 0)
iv->sprom.et1phyaddr = simple_strtoul(buf, NULL, 10);
if (cfe_getenv("et0mdcport", buf, sizeof(buf)) >= 0)
iv->sprom.et0mdcport = simple_strtoul(buf, NULL, 10);
if (cfe_getenv("et1mdcport", buf, sizeof(buf)) >= 0)
iv->sprom.et1mdcport = simple_strtoul(buf, NULL, 10);
return 0;
}
void __init plat_mem_setup(void)
{
board_be_init = ip32_be_init;
#ifdef CONFIG_SGI_O2MACE_ETH
{
char *mac = ArcGetEnvironmentVariable("eaddr");
str2eaddr(o2meth_eaddr, mac);
}
#endif
#if defined(CONFIG_SERIAL_CORE_CONSOLE)
{
char* con = ArcGetEnvironmentVariable("console");
if (con && *con == 'd') {
static char options[8] __initdata;
char *baud = ArcGetEnvironmentVariable("dbaud");
if (baud)
strcpy(options, baud);
add_preferred_console("ttyS", *(con + 1) == '2' ? 1 : 0,
baud ? options : NULL);
}
}
#endif
}
static int __init ethernet_addr_setup(char *str)
{
if (!str) {
printk("ethaddr not set in command line\n");
return -1;
}
ethaddr_cmd = 1;
str2eaddr(ethaddr_hex, str);
return 0;
}
int get_ethernet_addr(char *ethernet_addr)
{
char *ethaddr_str;
ethaddr_str = prom_getenv("ethaddr");
if (!ethaddr_str) {
printk("ethaddr not set in boot prom\n");
return -1;
}
str2eaddr(ethernet_addr, ethaddr_str);
return 0;
}
int __init prom_get_ethernet_addr(char *ethernet_addr)
{
char *ethaddr_str;
/* Check the environment variables first */
ethaddr_str = prom_getenv("ethaddr");
if (!ethaddr_str) {
/* Check command line */
ethaddr_str = strstr(arcs_cmdline, "ethaddr=");
if (!ethaddr_str)
return -1;
ethaddr_str += strlen("ethaddr=");
}
str2eaddr(ethernet_addr, ethaddr_str);
return 0;
}
int get_ethernet_addr(char *ethernet_addr)
{
char *ethaddr_str;
ethaddr_str = prom_getenv("ethaddr");
if (!ethaddr_str) {
printk("ethaddr not set in boot prom\n");
return -1;
}
str2eaddr(ethernet_addr, ethaddr_str);
if (init_debug > 1) {
int i;
printk("get_ethernet_addr: ");
for (i=0; i<5; i++)
printk("%02x:", (unsigned char)*(ethernet_addr+i));
printk("%02x\n", *(ethernet_addr+i));
}
return 0;
}
static int __init
au1000_probe1(struct net_device *dev, long ioaddr, int irq, int port_num)
{
static unsigned version_printed = 0;
struct au1000_private *aup = NULL;
int i, retval = 0;
db_dest_t *pDB, *pDBfree;
char *pmac, *argptr;
char ethaddr[6];
if (!request_region(ioaddr, MAC_IOSIZE, "Au1000 ENET")) {
return -ENODEV;
}
if (version_printed++ == 0) printk(version);
if (!dev) {
dev = init_etherdev(0, sizeof(struct au1000_private));
}
if (!dev) {
printk (KERN_ERR "au1000 eth: init_etherdev failed\n");
return -ENODEV;
}
printk("%s: Au1xxx ethernet found at 0x%lx, irq %d\n",
dev->name, ioaddr, irq);
/* Initialize our private structure */
if (dev->priv == NULL) {
aup = (struct au1000_private *)
kmalloc(sizeof(*aup), GFP_KERNEL);
if (aup == NULL) {
retval = -ENOMEM;
goto free_region;
}
dev->priv = aup;
}
aup = dev->priv;
memset(aup, 0, sizeof(*aup));
/* Allocate the data buffers */
aup->vaddr = (u32)dma_alloc(MAX_BUF_SIZE *
(NUM_TX_BUFFS+NUM_RX_BUFFS), &aup->dma_addr);
if (!aup->vaddr) {
retval = -ENOMEM;
goto free_region;
}
/* aup->mac is the base address of the MAC's registers */
aup->mac = (volatile mac_reg_t *)((unsigned long)ioaddr);
/* Setup some variables for quick register address access */
switch (ioaddr) {
case AU1000_ETH0_BASE:
case AU1500_ETH0_BASE:
/* check env variables first */
if (!get_ethernet_addr(ethaddr)) {
memcpy(au1000_mac_addr, ethaddr, sizeof(dev->dev_addr));
} else {
/* Check command line */
argptr = prom_getcmdline();
if ((pmac = strstr(argptr, "ethaddr=")) == NULL) {
printk(KERN_INFO "%s: No mac address found\n",
dev->name);
/* use the hard coded mac addresses */
} else {
str2eaddr(ethaddr, pmac + strlen("ethaddr="));
memcpy(au1000_mac_addr, ethaddr,
sizeof(dev->dev_addr));
}
}
if (ioaddr == AU1000_ETH0_BASE)
aup->enable = (volatile u32 *)
((unsigned long)AU1000_MAC0_ENABLE);
else
aup->enable = (volatile u32 *)
((unsigned long)AU1500_MAC0_ENABLE);
memcpy(dev->dev_addr, au1000_mac_addr, sizeof(dev->dev_addr));
setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
break;
case AU1000_ETH1_BASE:
case AU1500_ETH1_BASE:
if (ioaddr == AU1000_ETH1_BASE)
aup->enable = (volatile u32 *)
((unsigned long)AU1000_MAC1_ENABLE);
else
aup->enable = (volatile u32 *)
((unsigned long)AU1500_MAC1_ENABLE);
memcpy(dev->dev_addr, au1000_mac_addr, sizeof(dev->dev_addr));
dev->dev_addr[4] += 0x10;
setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
break;
default:
printk(KERN_ERR "%s: bad ioaddr\n", dev->name);
break;
}
aup->phy_addr = PHY_ADDRESS;
/* bring the device out of reset, otherwise probing the mii
* will hang */
*aup->enable = MAC_EN_CLOCK_ENABLE;
au_sync_delay(2);
*aup->enable = MAC_EN_RESET0 | MAC_EN_RESET1 |
MAC_EN_RESET2 | MAC_EN_CLOCK_ENABLE;
au_sync_delay(2);
if (mii_probe(dev) != 0) {
goto free_region;
}
pDBfree = NULL;
/* setup the data buffer descriptors and attach a buffer to each one */
pDB = aup->db;
for (i=0; i<(NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
pDB->pnext = pDBfree;
pDBfree = pDB;
pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
pDB++;
}
aup->pDBfree = pDBfree;
for (i=0; i<NUM_RX_DMA; i++) {
pDB = GetFreeDB(aup);
if (!pDB) goto free_region;
aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
aup->rx_db_inuse[i] = pDB;
}
for (i=0; i<NUM_TX_DMA; i++) {
pDB = GetFreeDB(aup);
if (!pDB) goto free_region;
aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
aup->tx_dma_ring[i]->len = 0;
aup->tx_db_inuse[i] = pDB;
}
spin_lock_init(&aup->lock);
dev->base_addr = ioaddr;
dev->irq = irq;
dev->open = au1000_open;
dev->hard_start_xmit = au1000_tx;
dev->stop = au1000_close;
dev->get_stats = au1000_get_stats;
dev->set_multicast_list = &set_rx_mode;
dev->do_ioctl = &au1000_ioctl;
dev->set_config = &au1000_set_config;
dev->tx_timeout = au1000_tx_timeout;
dev->watchdog_timeo = ETH_TX_TIMEOUT;
/* Fill in the fields of the device structure with ethernet values. */
ether_setup(dev);
/*
* The boot code uses the ethernet controller, so reset it to start
* fresh. au1000_init() expects that the device is in reset state.
*/
reset_mac(dev);
return 0;
free_region:
release_region(ioaddr, MAC_IOSIZE);
unregister_netdev(dev);
if (aup->vaddr)
dma_free((void *)aup->vaddr,
MAX_BUF_SIZE * (NUM_TX_BUFFS+NUM_RX_BUFFS));
if (dev->priv != NULL)
kfree(dev->priv);
printk(KERN_ERR "%s: au1000_probe1 failed. Returns %d\n",
dev->name, retval);
kfree(dev);
return retval;
}
static struct net_device *
au1000_probe(u32 ioaddr, int irq, int port_num)
{
static unsigned version_printed = 0;
struct au1000_private *aup = NULL;
struct net_device *dev = NULL;
db_dest_t *pDB, *pDBfree;
char *pmac, *argptr;
char ethaddr[6];
int i, err;
if (!request_region(ioaddr, MAC_IOSIZE, "Au1x00 ENET"))
return NULL;
if (version_printed++ == 0)
printk(version);
dev = alloc_etherdev(sizeof(struct au1000_private));
if (!dev) {
printk (KERN_ERR "au1000 eth: alloc_etherdev failed\n");
return NULL;
}
if ((err = register_netdev(dev))) {
printk(KERN_ERR "Au1x_eth Cannot register net device err %d\n",
err);
kfree(dev);
return NULL;
}
printk("%s: Au1x Ethernet found at 0x%x, irq %d\n",
dev->name, ioaddr, irq);
aup = dev->priv;
/* Allocate the data buffers */
aup->vaddr = (u32)dma_alloc(MAX_BUF_SIZE *
(NUM_TX_BUFFS+NUM_RX_BUFFS), &aup->dma_addr);
if (!aup->vaddr) {
kfree(dev);
release_region(ioaddr, MAC_IOSIZE);
return NULL;
}
/* aup->mac is the base address of the MAC's registers */
aup->mac = (volatile mac_reg_t *)((unsigned long)ioaddr);
/* Setup some variables for quick register address access */
if (ioaddr == iflist[0].base_addr)
{
/* check env variables first */
if (!get_ethernet_addr(ethaddr)) {
memcpy(au1000_mac_addr, ethaddr, sizeof(dev->dev_addr));
} else {
/* Check command line */
argptr = prom_getcmdline();
if ((pmac = strstr(argptr, "ethaddr=")) == NULL) {
printk(KERN_INFO "%s: No mac address found\n",
dev->name);
/* use the hard coded mac addresses */
} else {
str2eaddr(ethaddr, pmac + strlen("ethaddr="));
memcpy(au1000_mac_addr, ethaddr,
sizeof(dev->dev_addr));
}
}
aup->enable = (volatile u32 *)
((unsigned long)iflist[0].macen_addr);
memcpy(dev->dev_addr, au1000_mac_addr, sizeof(dev->dev_addr));
setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
aup->mac_id = 0;
au_macs[0] = aup;
}
else
if (ioaddr == iflist[1].base_addr)
{
aup->enable = (volatile u32 *)
((unsigned long)iflist[1].macen_addr);
memcpy(dev->dev_addr, au1000_mac_addr, sizeof(dev->dev_addr));
dev->dev_addr[4] += 0x10;
setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
aup->mac_id = 1;
au_macs[1] = aup;
}
else
{
printk(KERN_ERR "%s: bad ioaddr\n", dev->name);
}
/* bring the device out of reset, otherwise probing the mii
* will hang */
*aup->enable = MAC_EN_CLOCK_ENABLE;
au_sync_delay(2);
*aup->enable = MAC_EN_RESET0 | MAC_EN_RESET1 |
MAC_EN_RESET2 | MAC_EN_CLOCK_ENABLE;
au_sync_delay(2);
aup->mii = kmalloc(sizeof(struct mii_phy), GFP_KERNEL);
if (!aup->mii) {
printk(KERN_ERR "%s: out of memory\n", dev->name);
goto err_out;
}
aup->mii->mii_control_reg = 0;
aup->mii->mii_data_reg = 0;
if (mii_probe(dev) != 0) {
goto err_out;
}
pDBfree = NULL;
/* setup the data buffer descriptors and attach a buffer to each one */
pDB = aup->db;
for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
pDB->pnext = pDBfree;
pDBfree = pDB;
pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
pDB++;
}
aup->pDBfree = pDBfree;
for (i = 0; i < NUM_RX_DMA; i++) {
pDB = GetFreeDB(aup);
if (!pDB) {
goto err_out;
}
aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
aup->rx_db_inuse[i] = pDB;
}
for (i = 0; i < NUM_TX_DMA; i++) {
pDB = GetFreeDB(aup);
if (!pDB) {
goto err_out;
}
aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
aup->tx_dma_ring[i]->len = 0;
aup->tx_db_inuse[i] = pDB;
}
spin_lock_init(&aup->lock);
dev->base_addr = ioaddr;
dev->irq = irq;
dev->open = au1000_open;
dev->hard_start_xmit = au1000_tx;
dev->stop = au1000_close;
dev->get_stats = au1000_get_stats;
dev->set_multicast_list = &set_rx_mode;
dev->do_ioctl = &au1000_ioctl;
dev->set_config = &au1000_set_config;
dev->tx_timeout = au1000_tx_timeout;
dev->watchdog_timeo = ETH_TX_TIMEOUT;
/*
* The boot code uses the ethernet controller, so reset it to start
* fresh. au1000_init() expects that the device is in reset state.
*/
reset_mac(dev);
return dev;
err_out:
/* here we should have a valid dev plus aup-> register addresses
* so we can reset the mac properly.*/
reset_mac(dev);
if (aup->mii)
kfree(aup->mii);
for (i = 0; i < NUM_RX_DMA; i++) {
if (aup->rx_db_inuse[i])
ReleaseDB(aup, aup->rx_db_inuse[i]);
}
for (i = 0; i < NUM_TX_DMA; i++) {
if (aup->tx_db_inuse[i])
ReleaseDB(aup, aup->tx_db_inuse[i]);
}
dma_free((void *)aup->vaddr, MAX_BUF_SIZE *
(NUM_TX_BUFFS+NUM_RX_BUFFS));
unregister_netdev(dev);
kfree(dev);
release_region(ioaddr, MAC_IOSIZE);
return NULL;
}
static struct net_device * au1000_probe(int port_num)
{
static unsigned version_printed = 0;
struct au1000_private *aup = NULL;
struct net_device *dev = NULL;
db_dest_t *pDB, *pDBfree;
char *pmac, *argptr;
char ethaddr[6];
int irq, i, err;
u32 base, macen;
if (port_num >= NUM_ETH_INTERFACES)
return NULL;
base = CPHYSADDR(iflist[port_num].base_addr );
macen = CPHYSADDR(iflist[port_num].macen_addr);
irq = iflist[port_num].irq;
if (!request_mem_region( base, MAC_IOSIZE, "Au1x00 ENET") ||
!request_mem_region(macen, 4, "Au1x00 ENET"))
return NULL;
if (version_printed++ == 0)
printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
dev = alloc_etherdev(sizeof(struct au1000_private));
if (!dev) {
printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME);
return NULL;
}
if ((err = register_netdev(dev)) != 0) {
printk(KERN_ERR "%s: Cannot register net device, error %d\n",
DRV_NAME, err);
free_netdev(dev);
return NULL;
}
printk("%s: Au1xx0 Ethernet found at 0x%x, irq %d\n",
dev->name, base, irq);
aup = dev->priv;
/* Allocate the data buffers */
/* Snooping works fine with eth on all au1xxx */
aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
(NUM_TX_BUFFS + NUM_RX_BUFFS),
&aup->dma_addr, 0);
if (!aup->vaddr) {
free_netdev(dev);
release_mem_region( base, MAC_IOSIZE);
release_mem_region(macen, 4);
return NULL;
}
/* aup->mac is the base address of the MAC's registers */
aup->mac = (volatile mac_reg_t *)iflist[port_num].base_addr;
/* Setup some variables for quick register address access */
aup->enable = (volatile u32 *)iflist[port_num].macen_addr;
aup->mac_id = port_num;
au_macs[port_num] = aup;
if (port_num == 0) {
/* Check the environment variables first */
if (get_ethernet_addr(ethaddr) == 0)
memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr));
else {
/* Check command line */
argptr = prom_getcmdline();
if ((pmac = strstr(argptr, "ethaddr=")) == NULL)
printk(KERN_INFO "%s: No MAC address found\n",
dev->name);
/* Use the hard coded MAC addresses */
else {
str2eaddr(ethaddr, pmac + strlen("ethaddr="));
memcpy(au1000_mac_addr, ethaddr,
sizeof(au1000_mac_addr));
}
}
setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
} else if (port_num == 1)
setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
/*
* Assign to the Ethernet ports two consecutive MAC addresses
* to match those that are printed on their stickers
*/
memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr));
dev->dev_addr[5] += port_num;
*aup->enable = 0;
aup->mac_enabled = 0;
aup->mii_bus.priv = dev;
aup->mii_bus.read = mdiobus_read;
aup->mii_bus.write = mdiobus_write;
aup->mii_bus.reset = mdiobus_reset;
aup->mii_bus.name = "au1000_eth_mii";
aup->mii_bus.id = aup->mac_id;
aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
for(i = 0; i < PHY_MAX_ADDR; ++i)
aup->mii_bus.irq[i] = PHY_POLL;
/* if known, set corresponding PHY IRQs */
#if defined(AU1XXX_PHY_STATIC_CONFIG)
# if defined(AU1XXX_PHY0_IRQ)
if (AU1XXX_PHY0_BUSID == aup->mii_bus.id)
aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ;
# endif
# if defined(AU1XXX_PHY1_IRQ)
if (AU1XXX_PHY1_BUSID == aup->mii_bus.id)
aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ;
# endif
#endif
mdiobus_register(&aup->mii_bus);
if (mii_probe(dev) != 0) {
goto err_out;
}
pDBfree = NULL;
/* setup the data buffer descriptors and attach a buffer to each one */
pDB = aup->db;
for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
pDB->pnext = pDBfree;
pDBfree = pDB;
pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
pDB++;
}
aup->pDBfree = pDBfree;
for (i = 0; i < NUM_RX_DMA; i++) {
pDB = GetFreeDB(aup);
if (!pDB) {
goto err_out;
}
aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
aup->rx_db_inuse[i] = pDB;
}
for (i = 0; i < NUM_TX_DMA; i++) {
pDB = GetFreeDB(aup);
if (!pDB) {
goto err_out;
}
aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
aup->tx_dma_ring[i]->len = 0;
aup->tx_db_inuse[i] = pDB;
}
spin_lock_init(&aup->lock);
dev->base_addr = base;
dev->irq = irq;
dev->open = au1000_open;
dev->hard_start_xmit = au1000_tx;
dev->stop = au1000_close;
dev->get_stats = au1000_get_stats;
dev->set_multicast_list = &set_rx_mode;
dev->do_ioctl = &au1000_ioctl;
SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
dev->tx_timeout = au1000_tx_timeout;
dev->watchdog_timeo = ETH_TX_TIMEOUT;
/*
* The boot code uses the ethernet controller, so reset it to start
* fresh. au1000_init() expects that the device is in reset state.
*/
reset_mac(dev);
return dev;
err_out:
/* here we should have a valid dev plus aup-> register addresses
* so we can reset the mac properly.*/
reset_mac(dev);
for (i = 0; i < NUM_RX_DMA; i++) {
if (aup->rx_db_inuse[i])
ReleaseDB(aup, aup->rx_db_inuse[i]);
}
for (i = 0; i < NUM_TX_DMA; i++) {
if (aup->tx_db_inuse[i])
ReleaseDB(aup, aup->tx_db_inuse[i]);
}
dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
(void *)aup->vaddr, aup->dma_addr);
unregister_netdev(dev);
free_netdev(dev);
release_mem_region( base, MAC_IOSIZE);
release_mem_region(macen, 4);
return NULL;
}
void __init plat_setup(void)
{
board_be_init = ip32_be_init;
rtc_mips_get_time = mc146818_get_cmos_time;
rtc_mips_set_mmss = mc146818_set_rtc_mmss;
board_time_init = ip32_time_init;
board_timer_setup = ip32_timer_setup;
#ifdef CONFIG_SERIAL_8250
{
static struct uart_port o2_serial[2];
memset(o2_serial, 0, sizeof(o2_serial));
o2_serial[0].type = PORT_16550A;
o2_serial[0].line = 0;
o2_serial[0].irq = MACEISA_SERIAL1_IRQ;
o2_serial[0].flags = UPF_SKIP_TEST;
o2_serial[0].uartclk = 1843200;
o2_serial[0].iotype = UPIO_MEM;
o2_serial[0].membase = (char *)&mace->isa.serial1;
o2_serial[0].fifosize = 14;
/* How much to shift register offset by. Each UART register
* is replicated over 256 byte space */
o2_serial[0].regshift = 8;
o2_serial[1].type = PORT_16550A;
o2_serial[1].line = 1;
o2_serial[1].irq = MACEISA_SERIAL2_IRQ;
o2_serial[1].flags = UPF_SKIP_TEST;
o2_serial[1].uartclk = 1843200;
o2_serial[1].iotype = UPIO_MEM;
o2_serial[1].membase = (char *)&mace->isa.serial2;
o2_serial[1].fifosize = 14;
o2_serial[1].regshift = 8;
early_serial_setup(&o2_serial[0]);
early_serial_setup(&o2_serial[1]);
}
#endif
#ifdef CONFIG_SGI_O2MACE_ETH
{
char *mac = ArcGetEnvironmentVariable("eaddr");
str2eaddr(o2meth_eaddr, mac);
}
#endif
#if defined(CONFIG_SERIAL_CORE_CONSOLE)
{
char* con = ArcGetEnvironmentVariable("console");
if (con && *con == 'd') {
static char options[8];
char *baud = ArcGetEnvironmentVariable("dbaud");
if (baud)
strcpy(options, baud);
add_preferred_console("ttyS", *(con + 1) == '2' ? 1 : 0,
baud ? options : NULL);
}
}
#endif
}
