/** * \brief Enable an analog comparator channel * * \param ac Pointer to the analog comparator (AC) base address * \param channel Number of analog comparator (AC) channel to enable */ void ac_enable(AC_t *ac, uint8_t channel) { irqflags_t iflags = cpu_irq_save(); #ifdef ACA if ((uintptr_t)ac == (uintptr_t)&ACA) { if (!ac_aca_opened) { sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_AC); } ac_aca_opened++; } else #endif #ifdef ACB if ((uintptr_t)ac == (uintptr_t)&ACB) { if (!ac_acb_opened) { sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_AC); } ac_acb_opened++; } else #endif { cpu_irq_restore(iflags); return; } sleepmgr_lock_mode(SLEEPMGR_IDLE); if (channel == 0) { ac->AC0CTRL |= AC_ENABLE_bm; } else { ac->AC1CTRL |= AC_ENABLE_bm; } cpu_irq_restore(iflags); }
static void tc_init(void) { // Configure PWM output on the TC's CCB, with 50% duty cycle. sysclk_enable_module(TC_SYSCLK_PORT, SYSCLK_TC0); sysclk_enable_module(TC_SYSCLK_PORT, SYSCLK_HIRES); LED_TC.CTRLB = TC_WGMODE_SS_gc | TC0_CCBEN_bm; LED_TC.PER = 0xffff; LED_TC.CCB = 0x8000; LED_TC.CTRLA = TC_CLKSEL_DIV1_gc; }
/** * \brief Enable the system clock to an USART module. * * This function will enable the system clock to the provided \arg usart * module. * * \brief usart Pointer to an USART module. */ static inline void usart_enable_module_clock(USART_t *usart) { #ifdef USARTA0 if ((uintptr_t)usart == (uintptr_t)&UCSR0A) { sysclk_enable_module(POWER_RED_REG0, PRUSART0_bm); } #endif #ifdef USARTA1 if ((uintptr_t)usart == (uintptr_t)&UCSR1A) { sysclk_enable_module(POWER_RED_REG1, PRUSART1_bm); } #endif }
/** * \brief Main function. * * Initializes the board, and runs the application in an infinite loop. */ int main(void) { /* hardware initialization */ sysclk_init(); board_init(); pmic_init(); timer_init(); rs485_init(); led_init(); adc_init(); #ifdef CONF_BOARD_ENABLE_RS485_XPLAINED // Enable display backlight gpio_set_pin_high(NHD_C12832A1Z_BACKLIGHT); #endif // Workaround for known issue: Enable RTC32 sysclk sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_RTC); while (RTC32.SYNCCTRL & RTC32_SYNCBUSY_bm) { // Wait for RTC32 sysclk to become stable } cpu_irq_enable(); /* application initialization */ rs485_baud_rate_set(38400); bacnet_init(); /* run forever - timed tasks */ timer_callback(bacnet_task_timed, 5); for (;;) { bacnet_task(); led_task(); } }
/** * \brief Test physical loop-back with some characters in sunc mode. * * This function sends a character over USART on loop back to verify that init * and sending/receiving works. A jumper is connected on the USART. * * \param test Current test case. */ static void run_loopback_syncmode_test(const struct test_case *test) { uint8_t out_c = 'c'; uint8_t in_c = 0; port_pin_t sck_pin; sysclk_enable_module(POWER_RED_REG0, PRUSART0_bm); usart_set_mode(&CONF_UNIT_USART, USART_CMODE_SYNCHRONOUS_gc); sck_pin = IOPORT_CREATE_PIN(PORTE, 2); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH ); usart_spi_set_baudrate(&CONF_UNIT_USART, CONF_UNIT_BAUDRATE, sysclk_get_source_clock_hz()); usart_tx_enable(&CONF_UNIT_USART); usart_rx_enable(&CONF_UNIT_USART); usart_putchar(&CONF_UNIT_USART, out_c); in_c = usart_getchar(&CONF_UNIT_USART); test_assert_true(test, in_c == out_c, "Read character through sync mode is not correct: %d != %d", in_c, out_c); }
/** * @brief Initialization of SAL. * * This functions initializes the SAL. */ void sal_init(void) { /* Enable the AES clock. */ sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_AES); /* reset AES unit - only a precaution */ AES_CTRL = COMP_SR(AES_RESET, 1); }
/*! \brief Initialize the SPI in slave mode and enable the spi interrupt. */ static void spi_slave_init(volatile void *spi, uint8_t mode) { /* Enable Clock for SPI module */ sysclk_enable_module(POWER_RED_REG0, PRSPI_bm); /* Configure SPI pins for slave */ /* Set MISO as output high, and set MOSI, SS , SCK as input */ gpio_configure_pin(SPI_SCK, IOPORT_DIR_INPUT); gpio_configure_pin(SPI_MOSI, IOPORT_DIR_INPUT); gpio_configure_pin(SPI_SS, IOPORT_DIR_INPUT); gpio_configure_pin(SPI_MISO, IOPORT_INIT_HIGH | IOPORT_DIR_OUTPUT); /* Set the clock mode */ spi_set_clock_mode(spi, mode); /* Enable SPI as slave */ spi_enable_slave_mode(spi); /* Set the interrupt call back */ spi_set_interrupt_callback(spi_interrupt_callback); /* Enable SPI interrupt */ spi_enable_interrupt(spi); }
void uart_config(uint8_t port, usb_cdc_line_coding_t * cfg) { uint8_t reg_ctrlc; uint16_t bsel; reg_ctrlc = USART_CMODE_ASYNCHRONOUS_gc; switch(cfg->bCharFormat) { case CDC_STOP_BITS_2: reg_ctrlc |= USART_SBMODE_bm; break; case CDC_STOP_BITS_1: default: // Default stop bit = 1 stop bit break; } switch(cfg->bParityType) { case CDC_PAR_EVEN: reg_ctrlc |= USART_PMODE_EVEN_gc; break; case CDC_PAR_ODD: reg_ctrlc |= USART_PMODE_ODD_gc; break; default: case CDC_PAR_NONE: reg_ctrlc |= USART_PMODE_DISABLED_gc; break; } switch(cfg->bDataBits) { case 5: reg_ctrlc |= USART_CHSIZE_5BIT_gc; break; case 6: reg_ctrlc |= USART_CHSIZE_6BIT_gc; break; case 7: reg_ctrlc |= USART_CHSIZE_7BIT_gc; break; default: case 8: reg_ctrlc |= USART_CHSIZE_8BIT_gc; break; case 9: reg_ctrlc |= USART_CHSIZE_9BIT_gc; break; } sysclk_enable_module(USART_PORT_SYSCLK, USART_SYSCLK); // Set configuration USART.CTRLC = reg_ctrlc; // Update baudrate //usart_set_baudrate(&USART, cfg->dwDTERate, sysclk_get_cpu_hz()); usart_set_baudrate(&USART, 115200, sysclk_get_cpu_hz()); }
/** * \brief Enable clock for the USB module * * \pre CONFIG_USBCLK_SOURCE must be defined. * * \param freq The required USB clock frequency in MHz: * \arg \c 6 for 6 MHz * \arg \c 48 for 48 MHz */ void sysclk_enable_usb_opt(uint8_t freq) { Assert(freq == 48); sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_USB); ccp_write_io((uint8_t *)&CLK.USBCTRL, 0 | CLK_USBSRC_RC32M_gc | CLK_USBSEN_bm); }
int main(void) { // prepare the i/o for LEDs ioport_init(); ioport_set_pin_dir(RED, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(YELLOW, IOPORT_DIR_OUTPUT); // clock init & enable system clock to all peripheral modules sysclk_init(); sysclk_enable_module(SYSCLK_PORT_GEN, 0xff); sysclk_enable_module(SYSCLK_PORT_A, 0xff); sysclk_enable_module(SYSCLK_PORT_B, 0xff); sysclk_enable_module(SYSCLK_PORT_C, 0xff); sysclk_enable_module(SYSCLK_PORT_D, 0xff); sysclk_enable_module(SYSCLK_PORT_E, 0xff); sysclk_enable_module(SYSCLK_PORT_F, 0xff); // start tasks xTaskCreate(blink1, (signed char*) "blink1", 1024, NULL, 2, NULL); xTaskCreate(blink2, (signed char*) "blink2", 1024, NULL, 2, NULL); xTaskCreate(uartLoopBack, (signed char*) "uart1", 1024, NULL, 2, NULL); xTaskCreate(twi_example, (signed char*) "twi", 1024, NULL, 2, NULL); vTaskStartScheduler(); return 0; }
//! \brief Set up and run test suite int main(void) { /* USART init values */ const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; /* Start services */ pmic_init(); sysclk_init(); board_init(); sleepmgr_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Enable the clock for the AES module */ sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_AES); /* Enable global interrupts */ cpu_irq_enable(); // Set callback for AES module aes_set_callback(&int_callback_aes); /* Define test cases */ DEFINE_TEST_CASE(aes_get_set_test, NULL, run_aes_set_and_get_key_test, NULL, "Get and set functions"); DEFINE_TEST_CASE(aes_state_interface_test, NULL, run_aes_state_interface_test, NULL, "Test of AES state functions"); DEFINE_TEST_CASE(aes_encryption_test, NULL, run_aes_encryption_test, NULL, "Encryption with known result"); DEFINE_TEST_CASE(aes_decryption_test, NULL, run_aes_decryption_test, NULL, "Decryption function known result"); DEFINE_TEST_CASE(aes_enc_dec_test, NULL, run_aes_encrypt_and_decrypt_test, NULL, "Encryption and decryption with interrupt and auto mode"); DEFINE_TEST_ARRAY(aes_tests) = { &aes_get_set_test, &aes_state_interface_test, &aes_encryption_test, &aes_decryption_test, &aes_enc_dec_test }; DEFINE_TEST_SUITE(aes_suite, aes_tests, "XMEGA AES driver test suite"); /* Run all test in the suite */ test_suite_run(&aes_suite); while (1) { /* Intentionally left blank */ } }
/** * \brief Enable DMA controller * * \note This function will do a soft reset of the DMA controller, clearing all * previous configuration. */ void dma_enable(void) { sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_DMA); sleepmgr_lock_mode(SLEEPMGR_IDLE); /* Reset DMA controller just to make sure everything is from scratch */ DMA.CTRL = DMA_RESET_bm; DMA.CTRL = DMA_ENABLE_bm; }
/** * \brief Enable clock for the USB module * * \pre CONFIG_USBCLK_SOURCE must be defined. * * \param frequency The required USB clock frequency in MHz: * \arg \c 6 for 6 MHz * \arg \c 48 for 48 MHz */ void sysclk_enable_usb(uint8_t frequency) { uint8_t prescaler; Assert((frequency == 6) || (frequency == 48)); /* * Enable or disable prescaler depending on if the USB frequency is 6 * MHz or 48 MHz. Only 6 MHz USB frequency requires prescaling. */ if (frequency == 6) { prescaler = CLK_USBPSDIV_8_gc; } else { prescaler = 0; } /* * Switch to the system clock selected by the user. */ switch (CONFIG_USBCLK_SOURCE) { case USBCLK_SRC_RCOSC: if (!osc_is_ready(OSC_ID_RC32MHZ)) { osc_enable(OSC_ID_RC32MHZ); osc_wait_ready(OSC_ID_RC32MHZ); #ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC if (CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC != OSC_ID_USBSOF) { osc_enable(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); osc_wait_ready(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); } osc_enable_autocalibration(OSC_ID_RC32MHZ, CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC); #endif } ccp_write_io((uint8_t *)&CLK.USBCTRL, (prescaler) | CLK_USBSRC_RC32M_gc | CLK_USBSEN_bm); break; #ifdef CONFIG_PLL0_SOURCE case USBCLK_SRC_PLL: pll_enable_config_defaults(0); ccp_write_io((uint8_t *)&CLK.USBCTRL, (prescaler) | CLK_USBSRC_PLL_gc | CLK_USBSEN_bm); break; #endif default: Assert(false); break; } sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_USB); }
/** * \brief Enable EDMA controller * * \note Before enabling the EDMA controller, this function will do a soft * reset, clearing all previous configurations. * * \param channelmode Channel configuration mode given by a EDMA_CHMODE_t type */ void edma_enable(EDMA_CHMODE_t channelmode) { sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_EDMA); sleepmgr_lock_mode(SLEEPMGR_IDLE); /* Reset DMA controller just to make sure everything is from scratch */ EDMA.CTRL = EDMA_RESET_bm; EDMA.CTRL = EDMA_ENABLE_bm | channelmode; }
void ext_uart_init(void) { static usart_rs232_options_t EXT_USART_SERIAL_OPTIONS = { .baudrate = EXT_USART_SERIAL_BAUDRATE, .charlength = EXT_USART_SERIAL_CHAR_LENGTH, .paritytype = EXT_USART_SERIAL_PARITY, .stopbits = EXT_USART_SERIAL_STOP_BIT }; sysclk_enable_module(SYSCLK_PORT_E, PR_USART0_bm); usart_init_rs232(EXT_USART_SERIAL, &EXT_USART_SERIAL_OPTIONS); }
void HAL_TimerInit(void) { sysclk_enable_module(SYSTIMER_PORT_SYSCLK, SYSTIMER_SYSCLOCK); halTimerIrqCount = 0; SYSTIMER.PER = ((F_CPU / 1000ul) / TIMER_PRESCALER) * HAL_TIMER_INTERVAL; SYSTIMER.CTRLB = TC_WGMODE_NORMAL_gc; SYSTIMER.CTRLA = TC_CLKSEL_DIV8_gc; SYSTIMER.INTCTRLA = TC_OVFINTLVL_LO_gc; }
/** * \brief Initialize the RTC * * Start up the RTC and start counting from 0 * * \note The RTC clock source used by the RTC module should be set up before * calling this function. */ void rtc_init(void) { sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_RTC); RTC.PER = 0xffff; RTC.CNT = 0; /* Since overflow interrupt is needed all the time we limit sleep to * power-save. */ sleepmgr_lock_mode(SLEEPMGR_PSAVE); RTC.INTCTRL = RTC_OVERFLOW_INT_LEVEL; RTC.CTRL = CONFIG_RTC_PRESCALER; }
void uart_open(uint8_t port) { sysclk_enable_module(USART_PORT_SYSCLK, USART_SYSCLK); // Open UART communication USART_PORT.DIRSET = USART_PORT_PIN_TX; // TX as output. USART_PORT.DIRCLR = USART_PORT_PIN_RX; // RX as input. // Enable both RX and TX USART.CTRLB = USART_RXEN_bm | USART_TXEN_bm | USART_CLK2X_bm; // Enable interrupt with priority higher than USB USART.CTRLA = (register8_t) USART_RXCINTLVL_HI_gc | (register8_t) USART_DREINTLVL_OFF_gc; }
/** * \brief Enable TC45 * * Enables the TC45. * * \param tc Pointer to TC45 module * * \note * unmask TC45 clock (sysclk), but does not configure the TC45 clock source. */ void tc45_enable(volatile void *tc) { irqflags_t iflags = cpu_irq_save(); #ifdef TCC4 if ((uintptr_t)tc == (uintptr_t)&TCC4) { sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC4); sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_HIRES); } else #endif #ifdef TCC5 if ((uintptr_t)tc == (uintptr_t)&TCC5) { sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC5); sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_HIRES); } else #endif #ifdef TCD5 if ((uintptr_t)tc == (uintptr_t)&TCD5) { sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_TC5); sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_HIRES); } else #endif { cpu_irq_restore(iflags); return; } sleepmgr_lock_mode(SLEEPMGR_IDLE); cpu_irq_restore(iflags); }
/*! \brief Initializes the SPI in master mode. * * \param spi Base address of the SPI instance. * */ void spi_master_init(SPI_t *spi) { #ifdef SPIA if((uint16_t)spi == (uint16_t)&SPIA) { sysclk_enable_module(SYSCLK_PORT_A,PR_SPI_bm); } #endif #ifdef SPIB if((uint16_t)spi == (uint16_t)&SPIB) { sysclk_enable_module(SYSCLK_PORT_B,PR_SPI_bm); } #endif #ifdef SPIC if((uint16_t)spi == (uint16_t)&SPIC) { sysclk_enable_module(SYSCLK_PORT_C,PR_SPI_bm); } #endif #ifdef SPID if((uint16_t)spi == (uint16_t)&SPID) { sysclk_enable_module(SYSCLK_PORT_D,PR_SPI_bm); } #endif #ifdef SPIE if((uint16_t)spi == (uint16_t)&SPIE) { sysclk_enable_module(SYSCLK_PORT_E,PR_SPI_bm); } #endif #ifdef SPIF if((uint16_t)spi == (uint16_t)&SPIF) { sysclk_enable_module(SYSCLK_PORT_F,PR_SPI_bm); } #endif spi_enable_master_mode(spi); }
void usart_spi_init(USART_t *usart) { #ifdef USARTC0 if((uint16_t)usart == (uint16_t)&USARTC0) { sysclk_enable_module(SYSCLK_PORT_C,PR_USART0_bm); } #endif #ifdef USARTC1 else if((uint16_t)usart == (uint16_t)&USARTC1) { sysclk_enable_module(SYSCLK_PORT_C,PR_USART1_bm); } #endif #ifdef USARTD0 else if((uint16_t)usart == (uint16_t)&USARTD0) { sysclk_enable_module(SYSCLK_PORT_D,PR_USART0_bm); } #endif #ifdef USARTD1 else if((uint16_t)usart == (uint16_t)&USARTD1) { sysclk_enable_module(SYSCLK_PORT_D,PR_USART1_bm); } #endif #ifdef USARTE0 else if((uint16_t)usart == (uint16_t)&USARTE0) { sysclk_enable_module(SYSCLK_PORT_E,PR_USART0_bm); } #endif #ifdef USARTE1 else if((uint16_t)usart == (uint16_t)&USARTE1) { sysclk_enable_module(SYSCLK_PORT_E,PR_USART1_bm); } #endif #ifdef USARTF0 else if((uint16_t)usart == (uint16_t)&USARTF0) { sysclk_enable_module(SYSCLK_PORT_F,PR_USART0_bm); } #endif #ifdef USARTF1 else if((uint16_t)usart == (uint16_t)&USARTF1) { sysclk_enable_module(SYSCLK_PORT_F,PR_USART1_bm); } #endif }
// setup the board instead of board_init() as recommended by ASF.. because christmas lights, that's why. void init (void) { static usart_serial_options_t usart_options = { .baudrate = USART_SERIAL_BAUDRATE, .charlength = USART_SERIAL_CHAR_LENGTH, .paritytype = USART_SERIAL_PARITY, .stopbits = USART_SERIAL_STOP_BIT }; // initialize ASF stuff board_init(); sysclk_init(); ioport_init(); pmic_init(); pmic_set_scheduling(PMIC_SCH_FIXED_PRIORITY); // remap, enable TX, and configure USART on PORT C PORTC.REMAP |= PR_USART0_bm; PORTC.DIR |= (1 << PIN7_bp); sysclk_enable_module(SYSCLK_PORT_C, PR_USART0_bm); usart_init_rs232(USART_SERIAL, &usart_options); // setup timer for PWM tc45_enable(&TCC4); tc45_set_overflow_interrupt_callback(&TCC4, pwm_callback); tc45_set_wgm(&TCC4, TC45_WG_NORMAL); tc45_write_period(&TCC4, 256); tc45_set_overflow_interrupt_level(&TCC4, TC45_INT_LVL_MED); // enable all channels and turn off (high) ioport_set_port_dir(IOPORT_PORTA, PORTA_MASK, IOPORT_DIR_OUTPUT); ioport_set_port_dir(IOPORT_PORTD, PORTD_MASK, IOPORT_DIR_OUTPUT); ioport_set_port_dir(IOPORT_PORTR, PORTR_MASK, IOPORT_DIR_OUTPUT); ioport_set_port_level(IOPORT_PORTA, PORTA_MASK, 0xFF); ioport_set_port_level(IOPORT_PORTD, PORTD_MASK, 0xFF); ioport_set_port_level(IOPORT_PORTR, PORTR_MASK, 0xFF); for (uint8_t i=0; i<NUM_CHANNELS; i++) { compare[i] = 0; compbuff[i] = 0; } // enable status LEDs and turn off ioport_set_pin_dir(LED_STATUS, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(LED_DATA, IOPORT_DIR_OUTPUT); ioport_set_pin_level(LED_STATUS, 1); ioport_set_pin_level(LED_DATA, 1); // enable interrupts and start timer for PWM cpu_irq_enable(); tc45_write_clock_source(&TCC4, TC45_CLKSEL_DIV2_gc); }
void ntx2b_uart_init(void) { static usart_rs232_options_t NTX2B_USART_SERIAL_OPTIONS = { .baudrate = NTX2B_USART_SERIAL_BAUDRATE, .charlength = NTX2B_USART_SERIAL_CHAR_LENGTH, .paritytype = NTX2B_USART_SERIAL_PARITY, .stopbits = NTX2B_USART_SERIAL_STOP_BIT }; sysclk_enable_module(SYSCLK_PORT_D, PR_USART0_bm); usart_init_rs232(NTX2B_USART_SERIAL, &NTX2B_USART_SERIAL_OPTIONS); usart_rx_disable(NTX2B_USART_SERIAL); // we don't use the receiver ioport_set_pin_mode(GPIO_NTX2B_EN, IOPORT_MODE_TOTEM | IOPORT_MODE_INVERT_PIN ); // set enable low }
/** * \internal * \brief Enable peripheral clock for DAC * * Enables the peripheral clock for the specified DAC, unless it is already * enabled. * * \param dac Pointer to DAC module. */ static void dac_enable_clock(DAC_t *dac) { #if defined(DACA) if ((uintptr_t)dac == (uintptr_t)&DACA) { if (!daca_enable_count++) { sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_DAC); } } else #endif #if defined(DACB) if ((uintptr_t)dac == (uintptr_t)&DACB) { if (!dacb_enable_count++) { sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_DAC); } } else #endif { Assert(0); return; } }
/** * \brief This function Initializes the Sleep functions */ void sm_init(void) { // Set the sleep mode to initially lock. enum sleepmgr_mode mode = SLEEPMGR_PSAVE; sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_RTC); RTC32_Initialize(0xffffffff, 0, 0); RTC32.INTCTRL |= RTC32_COMPINTLVL_LO_gc ; // Initialize the sleep manager, lock initial mode. sleepmgr_init(); sleepmgr_lock_mode(mode); }
void adc_enable_clock(ADC_t *adc) { #ifdef ADCA if ((uintptr_t)adc == (uintptr_t)(&ADCA)) { Assert(adca_enable_count < 0xff); if (!adca_enable_count++) { sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC); } } else #endif #ifdef ADCB if ((uintptr_t)adc == (uintptr_t)(&ADCB)) { Assert(adcb_enable_count < 0xff); if (!adcb_enable_count++) { sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_ADC); } } else #endif { Assert(0); } }
int main (void) { board_init(); //Board definition and selection sysclk_init(); //System clock init usart_init_rs232(USART_SERIAL_RFID, &usart_options_RFID); //UART init usart_init_rs232(USART_SERIAL_Monitor, &usart_options_Monitor); gfx_mono_init(); //LCD init PORTE.OUTSET=PIN4_bm; //LCD Back light on //RTC Init sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_RTC); while (RTC32.SYNCCTRL & RTC32_SYNCBUSY_bm); if (rtc_vbat_system_check(false) != VBAT_STATUS_OK) rtc_init(); PORTE.DIRCLR=PIN5_bm; while(1) { if(Receive()) { card_no=Check(); if(card_no) { PORTR.OUTCLR=PIN0_bm; gfx_mono_draw_string("Card Detected",0,0,&sysfont); gfx_mono_draw_string("Welcome",0,10,&sysfont); gfx_mono_draw_string(names[card_no-1],55,10,&sysfont); rtc_timestamp=rtc_get_time(); calendar_timestamp_to_date_tz(rtc_timestamp,5,30,&get_date); gfx_mono_draw_string(display_time(get_date,arr),0,20,&sysfont); delay_s(1); gfx_mono_init(); PORTR.OUTSET=PIN0_bm; } else { PORTR.OUTCLR=PIN1_bm; gfx_mono_draw_string("Invalid Card",0,0,&sysfont); delay_s(1); gfx_mono_init(); PORTR.OUTSET=PIN1_bm; } } } }
void board_init(void) { /* This function is meant to contain board-specific initialization code * for, e.g., the I/O pins. The initialization can rely on application- * specific board configuration, found in conf_board.h. */ ioport_init(); #ifdef BOARD_REV_A // USART PORTD_REMAP = USARTD_REMAP; PORTD_DIRSET = PIN7_bm; //LEDs ioport_set_pin_dir(LED_GREEN, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(LED_RED, IOPORT_DIR_OUTPUT); #endif #ifdef BOARD_REV_B // USART PORTD_REMAP = USARTD_REMAP; PORTD_DIRSET = PIN7_bm; //Button ioport_set_pin_dir(BUT_1, IOPORT_DIR_INPUT); //LEDs ioport_set_pin_dir(LED_GREEN, IOPORT_DIR_OUTPUT); ioport_set_pin_dir(LED_RED, IOPORT_DIR_OUTPUT); #endif #ifdef ENABLE_USART // startup USART static usart_rs232_options_t usart_serial_options = { .baudrate = USART_SERIAL_BAUDRATE, .charlength = USART_SERIAL_CHAR_LENGTH, .paritytype = USART_SERIAL_PARITY, .stopbits = USART_SERIAL_STOP_BIT }; sysclk_enable_module(SYSCLK_PORT_D, PR_USART0_bm); //usart_init_rs232(USART_SERIAL, &usart_serial_options); stdio_serial_init(USART_SERIAL, &usart_serial_options); #endif }
/** * \brief Enable the system clock to an USART module. * * This function will enable the system clock to the provided \arg usart * module. * * \brief usart Pointer to an USART module. */ static inline void usart_enable_module_clock(USART_t *usart) { #ifdef USARTC0 if ((uintptr_t)usart == (uintptr_t)&USARTC0) { sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART0); } #endif #ifdef USARTC1 if ((uintptr_t)usart == (uintptr_t)&USARTC1) { sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_USART1); } #endif #ifdef USARTD0 if ((uintptr_t)usart == (uintptr_t)&USARTD0) { sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART0); } #endif #ifdef USARTD1 if ((uintptr_t)usart == (uintptr_t)&USARTD1) { sysclk_enable_module(SYSCLK_PORT_D, SYSCLK_USART1); } #endif #ifdef USARTE0 if ((uintptr_t)usart == (uintptr_t)&USARTE0) { sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART0); } #endif #ifdef USARTE1 if ((uintptr_t)usart == (uintptr_t)&USARTE1) { sysclk_enable_module(SYSCLK_PORT_E, SYSCLK_USART1); } #endif #ifdef USARTF0 if ((uintptr_t)usart == (uintptr_t)&USARTF0) { sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART0); } #endif #ifdef USARTF1 if ((uintptr_t)usart == (uintptr_t)&USARTF1) { sysclk_enable_module(SYSCLK_PORT_F, SYSCLK_USART1); } #endif }
int main(void) { board_init(); sysclk_init(); /* Turn off LEDs to start with */ LED_Off(LED0_GPIO); LED_Off(LED1_GPIO); LED_Off(LED2_GPIO); /* Enable all three interrupt levels of the PMIC. * Alternatively, use pmic_init() to achieve the same. */ pmic_enable_level(PMIC_LVL_LOW | PMIC_LVL_MEDIUM | PMIC_LVL_HIGH); /* Enable the timer/counter's clock. */ sysclk_enable_module(SYSCLK_PORT_C, SYSCLK_TC4); /* Initialize count, period and compare registers of the timer/counter. */ TCC4.CNT = 0x0000; TCC4.PER = 0xffff; TCC4.CCA = 0x5555; TCC4.CCB = 0xaaaa; /* Set up timer/counter in normal mode with two compare channels. */ TCC4.CTRLB |= TC45_WGMODE_NORMAL_gc; TCC4.CTRLE = TC45_CCAMODE_COMP_gc | TC45_CCBMODE_COMP_gc; /* Set levels for overflow and compare channel interrupts. */ TCC4.INTCTRLA = TC45_OVFINTLVL_HI_gc; TCC4.INTCTRLB = TC45_CCAINTLVL_LO_gc | TC45_CCBINTLVL_MED_gc; /* Start the timer/counter and enable interrupts. */ TCC4.CTRLA = TC45_CLKSEL_DIV64_gc; cpu_irq_enable(); while (1) { /* Do nothing - LED toggling is managed by interrupts. */ /* NOP to allow for debug pauses. */ asm("nop"); } }