void uart_open(uint8_t port) { UNUSED(port); // IO is initialized in board init // Enable interrupt with priority higher than USB NVIC_SetPriority(USART_INT_IRQn, USART_INT_LEVEL); NVIC_EnableIRQ(USART_INT_IRQn); // Initialize it in RS232 mode. USART_PERIPH_CLK_ENABLE(); if (usart_init_rs232(USART_BASE, &usart_options, sysclk_get_peripheral_bus_hz(USART_BASE))) { return; } // Enable USART USART_ENABLE(); // Enable both RX and TX usart_enable_tx(USART_BASE); usart_enable_rx(USART_BASE); // Enable interrupts usart_enable_interrupt(USART_BASE, US_IER_RXRDY | US_IER_TXRDY); }
/*! \brief to initialiaze hw timer */ uint8_t tmr_init(void) { uint8_t timer_multiplier; /* Options for waveform generation. */ tc_waveform_opt_t waveform_opt = { .channel = TIMER_CHANNEL_ID, /* Channel selection. */ .bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect * on TIOB. */ .beevt = TC_EVT_EFFECT_NOOP, /* External event effect * on TIOB. */ .bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on * TIOB. */ .bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on * TIOB. */ .aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect * on TIOA. */ .aeevt = TC_EVT_EFFECT_NOOP, /* External event effect * on TIOA. */ .acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on * TIOA */ .acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on * TIOA */ .wavsel = TC_WAVEFORM_SEL_UP_MODE, /* Waveform selection: Up * mode without automatic * trigger on RC compare. **/ .enetrg = false, /* External event trigger * enable. */ .eevt = TC_EXT_EVENT_SEL_TIOB_INPUT, /* External event * selection. */ .eevtedg = TC_SEL_NO_EDGE, /* External event edge * selection. */ .cpcdis = false, /* Counter disable when RC * compare. */ .cpcstop = false, /* Counter clock stopped * with RC compare. */ .burst = TC_BURST_NOT_GATED, /* Burst signal selection. **/ .clki = TC_CLOCK_RISING_EDGE, /* Clock inversion. */ .tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock * 3, connected to fPBA / * 8. */ }; sysclk_enable_peripheral_clock(TIMER); /* Initialize the timer/counter. */ tc_init_waveform(TIMER, &waveform_opt); /* calculate how faster the timer with current clk freq compared to * timer with 1Mhz */ timer_multiplier = sysclk_get_peripheral_bus_hz(TIMER) / DEF_1MHZ; /* */ timer_multiplier = timer_multiplier >> 1; configure_irq_handler(); tmr_enable_ovf_interrupt(); tmr_disable_cc_interrupt(); tc_start(TIMER, TIMER_CHANNEL_ID); return timer_multiplier; } /*! \brief to disable compare interrupt */ void tmr_disable_cc_interrupt(void) { tc_interrupt.cpcs = 0; tc_configure_interrupts(TIMER, TIMER_CHANNEL_ID, &tc_interrupt); }
/** * \brief Application entry point for tc_capture_waveform example. * * \return Unused (ANSI-C compatibility). */ int main(void) { uint8_t key; uint16_t frequence, dutycycle; /* Initialize the SAM system */ sysclk_init(); board_init(); /* Initialize the console uart */ configure_console(); /* Output example information */ printf("-- TC capture waveform Example --\r\n"); printf("-- %s\n\r", BOARD_NAME); printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__); /* Configure PIO Pins for TC */ #if (SAM4L || SAM4E) ioport_set_pin_mode(PIN_TC_WAVEFORM, PIN_TC_WAVEFORM_FLAGS); ioport_disable_pin(PIN_TC_WAVEFORM); // Disable IO (but enable peripheral mode) ioport_set_pin_mode(PIN_TC_CAPTURE, PIN_TC_CAPTURE_FLAGS); ioport_disable_pin(PIN_TC_CAPTURE); // Disable IO (but enable peripheral mode) #else gpio_configure_pin(PIN_TC_WAVEFORM, PIN_TC_WAVEFORM_FLAGS); gpio_configure_pin(PIN_TC_CAPTURE, PIN_TC_CAPTURE_FLAGS); #endif /* Configure TC TC_CHANNEL_WAVEFORM as waveform operating mode */ printf("Configure TC%d channel %d as waveform operating mode \n\r", TC_PERIPHERAL, TC_CHANNEL_WAVEFORM); tc_waveform_initialize(); /* Configure TC TC_CHANNEL_CAPTURE as capture operating mode */ printf("Configure TC%d channel %d as capture operating mode \n\r", TC_PERIPHERAL, TC_CHANNEL_CAPTURE); tc_capture_initialize(); /* Configure TC interrupts for TC TC_CHANNEL_CAPTURE only */ NVIC_DisableIRQ(TC_IRQn); NVIC_ClearPendingIRQ(TC_IRQn); NVIC_SetPriority(TC_IRQn, 0); NVIC_EnableIRQ(TC_IRQn); /* Display menu */ display_menu(); while (1) { scanf("%c", (char *)&key); switch (key) { case 'h': display_menu(); break; case 's': if (gs_ul_captured_pulses) { tc_disable_interrupt(TC, TC_CHANNEL_CAPTURE, TC_IDR_LDRBS); printf("Captured %u pulses from TC%d channel %d, RA = %u, RB = %u \n\r", gs_ul_captured_pulses, TC_PERIPHERAL, TC_CHANNEL_CAPTURE, gs_ul_captured_ra, gs_ul_captured_rb); #if (SAM4L) frequence = (sysclk_get_peripheral_bus_hz(TC) / divisors[TC_CAPTURE_TIMER_SELECTION]) / gs_ul_captured_rb; #else frequence = (sysclk_get_peripheral_hz() / divisors[TC_CAPTURE_TIMER_SELECTION]) / gs_ul_captured_rb; #endif dutycycle = (gs_ul_captured_rb - gs_ul_captured_ra) * 100 / gs_ul_captured_rb; printf("Captured wave frequency = %d Hz, Duty cycle = %d%% \n\r", frequence, dutycycle); gs_ul_captured_pulses = 0; gs_ul_captured_ra = 0; gs_ul_captured_rb = 0; } else { puts("No waveform has been captured\r"); } puts("\n\rPress 'h' to display menu\r"); break; case 'c': puts("Start capture, press 's' to stop \r"); tc_enable_interrupt(TC, TC_CHANNEL_CAPTURE, TC_IER_LDRBS); /* Start the timer counter on TC TC_CHANNEL_CAPTURE */ tc_start(TC, TC_CHANNEL_CAPTURE); break; default: /* Set waveform configuration #n */ if ((key >= '0') && (key <= ('0' + gc_uc_nbconfig - 1))) { if (!gs_ul_captured_pulses) { gs_uc_configuration = key - '0'; tc_waveform_initialize(); } else { puts("Capturing ... , press 's' to stop capture first \r"); } } break; } } }
void serial_init(serial_t *obj, PinName tx, PinName rx) { /* Sanity check arguments */ MBED_ASSERT(obj); int clockid = NC, flexcom = NC; /*To determine the uart peripheral associated with pins*/ UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx); MBED_ASSERT(uart != (UARTName)NC); if (g_sys_init == 0) { sysclk_init(); system_board_init(); g_sys_init = 1; } pUSART_S(obj) = uart; pSERIAL_S(obj)->uart_serial_options.baudrate = (9600UL); pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_8_BIT; pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_NO; pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_1_BIT; pSERIAL_S(obj)->actrec = false; pSERIAL_S(obj)->acttra = false; /* Configure UART pins */ if(tx != NC) { pin_function(tx, pinmap_find_function(tx, PinMap_UART_TX)); ioport_disable_pin(tx); } if(rx != NC) { pin_function(rx, pinmap_find_function(rx, PinMap_UART_RX)); ioport_disable_pin(rx); } clockid = get_usart_clock_id(uart); if (clockid != NC) { sysclk_enable_peripheral_clock(clockid); } flexcom = (int)get_flexcom_id(uart); #if (!SAM4L) #if (SAMG55) /* Configure flexcom for usart */ flexcom_enable((Flexcom* )flexcom); flexcom_set_opmode((Flexcom* )flexcom, FLEXCOM_USART); #else sysclk_enable_peripheral_clock(clockid); #endif /* Configure USART */ usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options), sysclk_get_peripheral_hz()); #endif #if (SAM4L) sysclk_enable_peripheral_clock(clockid); /* Configure USART */ usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options, sysclk_get_peripheral_bus_hz((Usart*)uart)); #endif /* Disable rx and tx in case 1 line only required to be configured for usart */ usart_disable_tx((Usart*)uart); usart_disable_rx((Usart*)uart); /* Enable the receiver and transmitter. */ if(tx != NC) { usart_enable_tx((Usart*)uart); } if(rx != NC) { usart_enable_rx((Usart*)uart); } if(uart == STDIO_UART) { stdio_uart_inited = 1; memcpy(&stdio_uart, obj, sizeof(serial_t)); } }
void board_init(void) { ioport_init(); //SPI interface initialization #ifdef CONF_SPI //MISO ioport_set_pin_peripheral_mode(PIN_PA21, IOPORT_MODE_MUX_A); //MOSI ioport_set_pin_peripheral_mode(PIN_PA22, IOPORT_MODE_MUX_A); //SCK ioport_set_pin_peripheral_mode(PIN_PA23, IOPORT_MODE_MUX_A); //CS0 ioport_set_pin_peripheral_mode(PIN_PA24, IOPORT_MODE_MUX_A); //CS1 ioport_set_pin_peripheral_mode(PIN_PA13, IOPORT_MODE_MUX_C); //CS2 ioport_set_pin_peripheral_mode(PIN_PA14, IOPORT_MODE_MUX_C); //CS3 ioport_set_pin_peripheral_mode(PIN_PB12, IOPORT_MODE_MUX_B); spi_enable_clock(SPI); spi_disable(SPI); spi_reset(SPI); spi_set_master_mode(SPI); spi_disable_mode_fault_detect(SPI); spi_disable_loopback(SPI); spi_set_variable_peripheral_select(SPI); spi_disable_peripheral_select_decode(SPI); //spi_set_peripheral_chip_select_value(SPI, SPI_CHSEL); //spi_set_transfer_delay(SPI, 1, 50, 0); //spi_set_delay_between_chip_select(SPI, 0); for(char i = 0; i < 4; i++){ spi_set_bits_per_transfer(SPI, i, 8); //spi_set_baudrate_div(SPI, i, spi_calc_baudrate_div(1000000, sysclk_get_cpu_hz())); spi_set_baudrate_div(SPI, i, (sysclk_get_cpu_hz() / 500000)); spi_configure_cs_behavior(SPI, i, SPI_CS_KEEP_LOW); spi_set_clock_polarity(SPI, i, 0); spi_set_clock_phase(SPI, i, 0); } spi_enable(SPI); #endif //USART0 initialization #ifdef CONF_USART0 //USART0 RXD ioport_set_pin_peripheral_mode(PIN_PA11, IOPORT_MODE_MUX_A); #if SAM4L sysclk_enable_peripheral_clock(USART0); #endif //USART0 configuration struct const sam_usart_opt_t usart0_console_settings = { CONF_USART_0_BAUDRATE, CONF_USART_0_CHAR_LENGTH, CONF_USART_0_PARITY, CONF_USART_0_STOP_BITS, US_MR_CHMODE_NORMAL }; usart_init_rs232(USART0, &usart0_console_settings, sysclk_get_main_hz()); usart_enable_tx(USART0); usart_enable_rx(USART0); usart_enable_interrupt(USART0, US_IER_RXRDY); NVIC_SetPriority(USART0_IRQn, 10); NVIC_EnableIRQ(USART0_IRQn); #endif //USART1 initialization #ifdef CONF_USART1 //USART1 TXD ioport_set_pin_peripheral_mode(PIN_PA16, IOPORT_MODE_MUX_A); //USART1 RXD ioport_set_pin_peripheral_mode(PIN_PA15, IOPORT_MODE_MUX_A); #if SAM4L sysclk_enable_peripheral_clock(USART1); #endif //USART1 configuration struct const sam_usart_opt_t usart1_console_settings = { CONF_USART_1_BAUDRATE, CONF_USART_1_CHAR_LENGTH, CONF_USART_1_PARITY, CONF_USART_1_STOP_BITS, US_MR_CHMODE_NORMAL }; usart_init_rs232(USART1, &usart1_console_settings, sysclk_get_main_hz()); usart_enable_tx(USART1); usart_enable_rx(USART1); usart_enable_interrupt(USART1, US_IER_RXRDY); //NVIC_SetPriority(USART0_IRQn, 10); NVIC_EnableIRQ(USART1_IRQn); #endif #ifdef CONF_TWIMS1 //SDA ioport_set_pin_peripheral_mode(PIN_PB00, IOPORT_MODE_MUX_A); //SCL ioport_set_pin_peripheral_mode(PIN_PB01, IOPORT_MODE_MUX_A); /* Set TWIM options */ uint32_t cpu_speed = 0; cpu_speed = sysclk_get_peripheral_bus_hz(EXAMPLE_TWIM); struct twim_config opts = { .twim_clk = sysclk_get_cpu_hz(), //Importante .speed = TWIM_MASTER_SPEED, .hsmode_speed = 0, .data_setup_cycles = 0, .hsmode_data_setup_cycles = 0, .smbus = false, .clock_slew_limit = 0, .clock_drive_strength_low = 0, .data_slew_limit = 0, .data_drive_strength_low = 0, .hs_clock_slew_limit = 0, .hs_clock_drive_strength_high = 0, .hs_clock_drive_strength_low = 0, .hs_data_slew_limit = 0, .hs_data_drive_strength_low = 0, }; /* Initialize the TWIM Module */ twim_set_callback(EXAMPLE_TWIM, 0, twim_default_callback, 1); twim_set_config(EXAMPLE_TWIM, &opts); #endif //ADS 1294R initialization #ifdef CONF_ADS ADS_ioconfig(); Soft_Reset_ADS1298(); delay_us(50); Stop_Read_Data_Continuous(); /*Configuration register 1*/ ADS1298_SPI_Address_Byte_Count(WRITE_CONFIG_1_REGISTER , SINGLE_BYTE); ADS1298_SPI_Data(0x06); /*Configuration register 2*/ ADS1298_SPI_Address_Byte_Count(WRITE_CONFIG_2_REGISTER , SINGLE_BYTE); ADS1298_SPI_Data(0x00); /*Configuration register 3*/ ADS1298_SPI_Address_Byte_Count(WRITE_CONFIG_3_REGISTER , SINGLE_BYTE); ADS1298_SPI_Data(0xDC); /*Channel 1 register*/ ADS1298_SPI_Address_Byte_Count(WRITE_CHANNEL_1_SET_REGISTER, SINGLE_BYTE); ADS1298_SPI_Data(0x00); /*Channel 2 register*/ ADS1298_SPI_Address_Byte_Count(WRITE_CHANNEL_2_SET_REGISTER , SINGLE_BYTE); ADS1298_SPI_Data(0x00); /*Channel 3 register*/ ADS1298_SPI_Address_Byte_Count(WRITE_CHANNEL_3_SET_REGISTER , SINGLE_BYTE); ADS1298_SPI_Data(0x00); /*RLD_SENSP register*/ ADS1298_SPI_Address_Byte_Count(WRITE_RIGHT_LEG_DRIVE_SENSE_POSITIVE_REGISTER, SINGLE_BYTE); ADS1298_SPI_Data(0x0F); /*RLD_SENSN register*/ ADS1298_SPI_Address_Byte_Count(WRITE_RIGHT_LEG_DRIVE_SENSE_NEGATIVE_REGISTER, SINGLE_BYTE); ADS1298_SPI_Data(0x0F); /*Respiration control register*/ //Respiration channel not enabled #endif }
void uart_config(uint8_t port, usb_cdc_line_coding_t * cfg) { uint32_t stopbits, parity, databits; uint32_t imr; UNUSED(port); switch (cfg->bCharFormat) { case CDC_STOP_BITS_2: stopbits = US_MR_NBSTOP_2_BIT; break; case CDC_STOP_BITS_1_5: stopbits = US_MR_NBSTOP_1_5_BIT; break; case CDC_STOP_BITS_1: default: // Default stop bit = 1 stop bit stopbits = US_MR_NBSTOP_1_BIT; break; } switch (cfg->bParityType) { case CDC_PAR_EVEN: parity = US_MR_PAR_EVEN; break; case CDC_PAR_ODD: parity = US_MR_PAR_ODD; break; case CDC_PAR_MARK: parity = US_MR_PAR_MARK; break; case CDC_PAR_SPACE: parity = US_MR_PAR_SPACE; break; default: case CDC_PAR_NONE: parity = US_MR_PAR_NO; break; } switch(cfg->bDataBits) { case 5: case 6: case 7: databits = cfg->bDataBits - 5; break; default: case 8: databits = US_MR_CHRL_8_BIT; break; } // Options for USART. usart_options.baudrate = LE32_TO_CPU(cfg->dwDTERate); usart_options.char_length = databits; usart_options.parity_type = parity; usart_options.stop_bits = stopbits; usart_options.channel_mode = US_MR_CHMODE_NORMAL; imr = usart_get_interrupt_mask(USART_BASE); usart_disable_interrupt(USART_BASE, 0xFFFFFFFF); usart_init_rs232(USART_BASE, &usart_options, sysclk_get_peripheral_bus_hz(USART_BASE)); // Restore both RX and TX usart_enable_tx(USART_BASE); usart_enable_rx(USART_BASE); usart_enable_interrupt(USART_BASE, imr); }