/**
****************************************************************************************
* @brief Enable hardware flow control
* @param[in] UART QN_UART0 or QN_UART1
* @description
* Enable specified UART port hardware flow control
*****************************************************************************************
*/
void uart_flow_on(QN_UART_TypeDef *UART)
{
//uart_uart_SetCRWithMask(UART, UART_MASK_CTS_EN|UART_MASK_RTS_EN, MASK_ENABLE);
#if CONFIG_ENABLE_DRIVER_UART0==TRUE
// Switch RTS/CTS back
if(UART == QN_UART0)
{
syscon_SetPMCR0WithMask(QN_SYSCON,
P02_MASK_PIN_CTRL | P01_MASK_PIN_CTRL,
P02_UART0_RTS_PIN_CTRL | P01_UART0_CTS_PIN_CTRL);
}
#endif
#if CONFIG_ENABLE_DRIVER_UART1==TRUE
if(UART == QN_UART1)
{
// NOTE!!!!!
// Assume UART1 used P2.2 and P3.6 as RTS/CTS. Other case this snippet should be modified.
syscon_SetPMCR1WithMask(QN_SYSCON,
P22_MASK_PIN_CTRL | P36_MASK_PIN_CTRL,
P22_UART1_RTS_PIN_CTRL | P36_UART1_CTS_PIN_CTRL);
}
#endif
}
/**
****************************************************************************************
* @brief Configure the SPI GPIO and set RS 、 RST GPIO output,Init them.
* @description
*
****************************************************************************************
*/
void oled_io_config(void)
{
// pin mux
syscon_SetPMCR0WithMask(QN_SYSCON,
P03_MASK_PIN_CTRL |
P07_MASK_PIN_CTRL |
P11_MASK_PIN_CTRL |
P13_MASK_PIN_CTRL,
P03_GPIO_3_PIN_CTRL
| P07_GPIO_7_PIN_CTRL
#if (FB_OLED && FB_SPI_OLED)
| P13_SPI1_CLK_PIN_CTRL //P1.3 spi1 clk
| P11_SPI1_DAT_PIN_CTRL //P1.1 spi1 data out
#else
| P13_GPIO_11_PIN_CTRL
| P11_GPIO_9_PIN_CTRL
#endif
);
//Init Gpio with a callback,it's necessary
//gpio_init(gpio_callback);
//set the LCD_RS_PIN an output
gpio_set_direction(OLED_RS_PIN,GPIO_OUTPUT);
gpio_write_pin(OLED_RS_PIN,GPIO_LOW);
//set the LCD_RS_PIN an output
gpio_set_direction(OLED_RST_PIN,GPIO_OUTPUT);
//prevent it reset the lcd
gpio_write_pin(OLED_RST_PIN,GPIO_HIGH);
#if (FB_OLED && FB_IIC_OLED)
//set the LCD_RS_PIN an output
gpio_set_direction(OLED_SCLK_PIN,GPIO_OUTPUT);
//prevent it reset the lcd
gpio_write_pin(OLED_SCLK_PIN,GPIO_HIGH);
//set the LCD_RS_PIN an output
gpio_set_direction(OLED_SDIN_PIN,GPIO_OUTPUT);
//prevent it reset the lcd
gpio_write_pin(OLED_SDIN_PIN,GPIO_HIGH);
#endif
}
void pwm_io_config(void)
{
uint32_t reg;
uint32_t reg_mask;
/**
* PMCR0 register pin configure
*/
reg = P07_SW_CLK_PIN_CTRL | P06_SW_DAT_PIN_CTRL;
reg_mask = P07_MASK_PIN_CTRL | P06_MASK_PIN_CTRL;
syscon_SetPMCR0WithMask(QN_SYSCON, reg_mask, reg);
/**
* PMCR1 register pin configure
*/
reg = P27_PWM0_PIN_CTRL | P26_PWM1_PIN_CTRL;
reg_mask = P27_MASK_PIN_CTRL | P26_MASK_PIN_CTRL;
syscon_SetPMCR1WithMask(QN_SYSCON, reg_mask, reg);
// pin pull ( 00 : High-Z, 01 : Pull-down, 10 : Pull-up, 11 : Reserved )
syscon_SetPPCR0(QN_SYSCON, 0xAAAA5AAA);
syscon_SetPPCR1(QN_SYSCON, 0x2AAAAAAA);
}
/**
****************************************************************************************
* @brief Disable hardware flow control
* @param[in] UART QN_UART0 or QN_UART1
* @return TRUE
* @description
* Disable specified UART port hardware flow control
*****************************************************************************************
*/
bool uart_flow_off(QN_UART_TypeDef *UART)
{
//uart_uart_SetCRWithMask(UART, UART_MASK_CTS_EN|UART_MASK_RTS_EN, MASK_DISABLE);
//return true;
bool rt = false;
uint32_t int_restore = 0;
// Disable UART interrupt
#if CONFIG_ENABLE_DRIVER_UART0==TRUE
if(UART == QN_UART0)
int_restore = NVIC->ISER[0] & ((1<<UART0_TX_IRQn) | (1<<UART0_RX_IRQn));
#endif
#if CONFIG_ENABLE_DRIVER_UART1==TRUE
if(UART == QN_UART1)
int_restore = NVIC->ISER[0] & ((1<<UART1_TX_IRQn) | (1<<UART1_RX_IRQn));
#endif
NVIC->ICER[0] = int_restore;
do
{
// Check if no tx is ongoing
if(UART_TX_FREE == uart_check_tx_free(UART))
break;
// Disable rx (RTS/CTS -> GPIO high)
#if CONFIG_ENABLE_DRIVER_UART0==TRUE
if(UART == QN_UART0)
{
syscon_SetPMCR0WithMask(QN_SYSCON,
P02_MASK_PIN_CTRL | P01_MASK_PIN_CTRL,
P02_GPIO_2_PIN_CTRL | P01_GPIO_1_PIN_CTRL);
gpio_write_pin(GPIO_P02, GPIO_HIGH);
gpio_write_pin(GPIO_P01, GPIO_HIGH);
}
#endif
#if CONFIG_ENABLE_DRIVER_UART1==TRUE
if(UART == QN_UART1)
{
// NOTE!!!!!
// Assume UART1 used P2.2 and P3.6 as RTS/CTS. Other case this snippet should be modified.
syscon_SetPMCR1WithMask(QN_SYSCON,
P22_MASK_PIN_CTRL | P36_MASK_PIN_CTRL,
P22_GPIO_18_PIN_CTRL | P36_GPIO_30_PIN_CTRL);
gpio_write_pin(GPIO_P22, GPIO_HIGH);
gpio_write_pin(GPIO_P36, GPIO_HIGH);
}
#endif
// Wait for 1 bytes duration to guarantee host has not started a tx at this time.
// Assume buadrate 115200
delay(100);
// Check if data has been received during the waiting time
if(uart_uart_GetIntFlag(UART) & UART_MASK_RX_IF)
{
// Switch RTS/CTS back
#if CONFIG_ENABLE_DRIVER_UART0==TRUE
if(UART == QN_UART0)
{
syscon_SetPMCR0WithMask(QN_SYSCON,
P02_MASK_PIN_CTRL | P01_MASK_PIN_CTRL,
P02_UART0_RTS_PIN_CTRL | P01_UART0_CTS_PIN_CTRL);
}
#endif
#if CONFIG_ENABLE_DRIVER_UART1==TRUE
if(UART == QN_UART1)
{
// NOTE!!!!!
// Assume UART1 used P2.2 and P3.6 as RTS/CTS. Other case this snippet should be modified.
syscon_SetPMCR1WithMask(QN_SYSCON,
P22_MASK_PIN_CTRL | P36_MASK_PIN_CTRL,
P22_UART1_RTS_PIN_CTRL | P36_UART1_CTS_PIN_CTRL);
}
#endif
// failed.
break;
}
// success.
rt = true;
}
while(false);
// Restore uart interrupt status
NVIC->ISER[0] = int_restore;
return rt;
}
