static unsigned routes_max(void) {
static thread_local unsigned cached = 0;
_cleanup_free_ char *s4 = NULL, *s6 = NULL;
unsigned val4 = ROUTES_DEFAULT_MAX_PER_FAMILY, val6 = ROUTES_DEFAULT_MAX_PER_FAMILY;
if (cached > 0)
return cached;
if (sysctl_read("net/ipv4/route/max_size", &s4) >= 0) {
truncate_nl(s4);
if (safe_atou(s4, &val4) >= 0 &&
val4 == 2147483647U)
/* This is the default "no limit" value in the kernel */
val4 = ROUTES_DEFAULT_MAX_PER_FAMILY;
}
if (sysctl_read("net/ipv6/route/max_size", &s6) >= 0) {
truncate_nl(s6);
(void) safe_atou(s6, &val6);
}
cached = MAX(ROUTES_DEFAULT_MAX_PER_FAMILY, val4) +
MAX(ROUTES_DEFAULT_MAX_PER_FAMILY, val6);
return cached;
}
void
ralink_com_early(int silent)
{
struct com_regs regs;
uint32_t r;
int error;
/* reset */
r = sysctl_read(RA_SYSCTL_RST);
r |= RST_UARTL;
sysctl_write(RA_SYSCTL_RST, r);
r ^= RST_UARTL;
sysctl_write(RA_SYSCTL_RST, r);
if (silent) {
/*
* put us in PIO mode,
* effectively tri-stating the UARTL block
*/
r = sysctl_read(RA_SYSCTL_GPIOMODE);
r |= GPIOMODE_UARTL;
sysctl_write(RA_SYSCTL_GPIOMODE, r);
} else {
/* make sure we are in UART mode */
r = sysctl_read(RA_SYSCTL_GPIOMODE);
r &= ~GPIOMODE_UARTL;
sysctl_write(RA_SYSCTL_GPIOMODE, r);
}
uart_write(RA_UART_IER, 0); /* disable interrupts */
uart_write(RA_UART_FCR, 0); /* disable fifos */
/* set baud rate */
uart_write(RA_UART_LCR,
UART_LCR_WLS0 | UART_LCR_WLS1 | UART_LCR_DLAB);
uart_write(RA_UART_DLL,
(RA_UART_FREQ / RA_SERIAL_CLKDIV / RA_BAUDRATE)
& 0xffff);
uart_write(RA_UART_LCR,
UART_LCR_WLS0 | UART_LCR_WLS1);
regs.cr_iot = &ra_bus_memt;
regs.cr_iobase = RA_UART_LITE_BASE;
regs.cr_nports = 0x1000;
ralink_com_initmap(®s);
if ((error = bus_space_map(regs.cr_iot, regs.cr_iobase, regs.cr_nports,
0, ®s.cr_ioh)) != 0) {
return;
}
/* Ralink UART has a 16-bit rate latch (like the AU1x00) */
comcnattach1(®s, RA_BAUDRATE, RA_UART_FREQ,
COM_TYPE_AU1x00, CONMODE);
}
static int iptNetflowSysctl_handler(
netsnmp_mib_handler *handler,
netsnmp_handler_registration *reginfo,
netsnmp_agent_request_info *reqinfo,
netsnmp_request_info *request)
{
struct snmp_vars *sys;
oid obj;
obj = request->requestvb->name[request->requestvb->name_length - 2];
switch (reqinfo->mode) {
case MODE_GET:
return sysctl_read(request, obj);
case MODE_SET_RESERVE1:
sys = find_varinfo(sysctls, obj);
if (request->requestvb->type != sys->type)
netsnmp_request_set_error(request, SNMP_ERR_WRONGTYPE);
if (!sysctl_access_ok(sys->name))
netsnmp_request_set_error(request, SNMP_ERR_NOSUCHNAME);
break;
case MODE_SET_RESERVE2:
case MODE_SET_FREE:
case MODE_SET_UNDO:
case MODE_SET_COMMIT:
return SNMP_ERR_NOERROR;
case MODE_SET_ACTION:
return sysctl_write(request, obj);
default:
return SNMP_ERR_GENERR;
}
return SNMP_ERR_NOERROR;
}
int
ra_check_memo_reg(int key)
{
uint32_t magic;
/*
* These registers may be overwritten. Keep the value around in case
* it is used later. Bitmask 1 == security, 2 = serial
*/
static int keyvalue;
switch (key) {
case NO_SECURITY:
magic = sysctl_read(RA_SYSCTL_MEMO0);
if ((NO_SECURITY_MAGIC == magic) || ((keyvalue & 1) != 0)) {
keyvalue |= 1;
return 1;
}
return 0;
break;
case SERIAL_CONSOLE:
magic = sysctl_read(RA_SYSCTL_MEMO1);
if (magic == 0
|| (SERIAL_MAGIC & magic) != 0
|| (keyvalue & 2) != 0) {
keyvalue |= 2;
return 1;
}
return 0;
break;
default:
return 0;
}
}
static bool promote_secondaries_enabled(const char *ifname) {
_cleanup_free_ char *promote_secondaries_sysctl = NULL;
char *promote_secondaries_path;
int r;
promote_secondaries_path = strjoina("net/ipv4/conf/", ifname, "/promote_secondaries");
r = sysctl_read(promote_secondaries_path, &promote_secondaries_sysctl);
if (r < 0) {
log_debug_errno(r, "Cannot read sysctl %s", promote_secondaries_path);
return false;
}
truncate_nl(promote_secondaries_sysctl);
r = parse_boolean(promote_secondaries_sysctl);
if (r < 0)
log_warning_errno(r, "Cannot parse sysctl %s with content %s as boolean", promote_secondaries_path, promote_secondaries_sysctl);
return r > 0;
}
void
mach_init(void)
{
vaddr_t kernend;
psize_t memsize;
extern char kernel_text[];
extern char edata[], end[]; /* From Linker */
/* clear the BSS segment */
kernend = mips_round_page(end);
memset(edata, 0, kernend - (vaddr_t)edata);
#ifdef RALINK_CONSOLE_EARLY
/*
* set up early console
* cannot printf until sometime (?) in mips_vector_init
* meanwhile can use the ra_console_putc primitive if necessary
*/
ralink_console_early();
#endif
/* set CPU model info for sysctl_hw */
uint32_t tmp1, tmp2;
char id1[5], id2[5];
tmp1 = sysctl_read(RA_SYSCTL_ID0);
memcpy(id1, &tmp1, sizeof(tmp1));
tmp2 = sysctl_read(RA_SYSCTL_ID1);
memcpy(id2, &tmp2, sizeof(tmp2));
id2[4] = id1[4] = '\0';
if (id2[2] == ' ') {
id2[2] = '\0';
} else if (id2[3] == ' ') {
id2[3] = '\0';
} else {
id2[4] = '\0';
}
cpu_setmodel("%s%s", id1, id2);
/*
* Set up the exception vectors and CPU-specific function
* vectors early on. We need the wbflush() vector set up
* before comcnattach() is called (or at least before the
* first printf() after that is called).
* Sets up mips_cpu_flags that may be queried by other
* functions called during startup.
* Also clears the I+D caches.
*/
mips_vector_init(NULL, false);
/*
* Calibrate timers.
*/
cal_timer();
/*
* Set the VM page size.
*/
uvm_setpagesize();
/*
* Look at arguments passed to us and compute boothowto.
*/
boothowto = RB_AUTOBOOT;
#ifdef KADB
boothowto |= RB_KDB;
#endif
/*
* Determine the memory size.
*/
#if defined(MT7620)
memsize = 128 << 20;
#else
memsize = *(volatile uint32_t *)
MIPS_PHYS_TO_KSEG1(RA_SYSCTL_BASE + RA_SYSCTL_CFG0);
memsize = __SHIFTOUT(memsize, SYSCTL_CFG0_DRAM_SIZE);
if (__predict_false(memsize == 0)) {
memsize = 2 << 20;
} else {
memsize = 4 << (20 + memsize);
}
#endif
physmem = btoc(memsize);
mem_clusters[mem_cluster_cnt].start = 0;
mem_clusters[mem_cluster_cnt].size = memsize;
mem_cluster_cnt++;
/*
* Load the memory into the VM system
*/
mips_page_physload((vaddr_t)kernel_text, kernend,
mem_clusters, mem_cluster_cnt,
NULL, 0);
/*
* Initialize message buffer (at end of core).
*/
mips_init_msgbuf();
/*
* Initialize the virtual memory system.
*/
pmap_bootstrap();
/*
* Init mapping for u page(s) for proc0.
*/
mips_init_lwp0_uarea();
/*
* Initialize busses.
*/
ra_bus_init();
#ifdef DDB
if (boothowto & RB_KDB)
Debugger();
#endif
}
