Nios2CPU *cpu_nios2_init(const char *cpu_model)
{
Nios2CPU *cpu;
int i;
cpu = NIOS2_CPU(object_new(TYPE_NIOS2_CPU));
cpu->env.reset_addr = RESET_ADDRESS;
cpu->env.exception_addr = EXCEPTION_ADDRESS;
cpu->env.fast_tlb_miss_addr = FAST_TLB_MISS_ADDRESS;
cpu_reset(CPU(cpu));
qemu_init_vcpu(&cpu->env);
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
for (i = 0; i < NUM_CORE_REGS; i++) {
cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUNios2State, regs[i]),
regnames[i]);
}
#define GEN_HELPER 2
#include "helper.h"
return cpu;
}
/* initialize TCG globals. */
void srp_translate_init(void) {
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
for (i = 0; i < SRP_REGS; i++) {
cpu_R [i] = tcg_global_mem_new_i32(TCG_AREG0,
offsetof(CPUState, regs[i]),
regnames[i]);
}
cpu_R[60]= tcg_global_mem_new_i32(TCG_AREG0,
offsetof(CPUState, irq),
regnames[60]);
cpu_R[61]= tcg_global_mem_new_i32(TCG_AREG0,
offsetof(CPUState, psw),
regnames[61]);
cpu_R[62]= tcg_global_mem_new_i32(TCG_AREG0,
offsetof(CPUState, sp),
regnames[62]);
cpu_R[63]= tcg_global_mem_new_i32(TCG_AREG0,
offsetof(CPUState, pc),
regnames[63]);
//num_socket = 0;
}
void lm32_translate_init(void)
{
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
tcg_ctx.tcg_env = cpu_env;
for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
cpu_R[i] = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, regs[i]),
regnames[i]);
}
for (i = 0; i < ARRAY_SIZE(cpu_bp); i++) {
cpu_bp[i] = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, bp[i]),
regnames[32+i]);
}
for (i = 0; i < ARRAY_SIZE(cpu_wp); i++) {
cpu_wp[i] = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, wp[i]),
regnames[36+i]);
}
cpu_pc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, pc),
"pc");
cpu_ie = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, ie),
"ie");
cpu_icc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, icc),
"icc");
cpu_dcc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, dcc),
"dcc");
cpu_cc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, cc),
"cc");
cpu_cfg = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, cfg),
"cfg");
cpu_eba = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, eba),
"eba");
cpu_dc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, dc),
"dc");
cpu_deba = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, deba),
"deba");
}
static CPUCRISState *cpu_crisv10_init (CPUCRISState *env)
{
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
cc_x = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_x), "cc_x");
cc_src = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_src), "cc_src");
cc_dest = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_dest),
"cc_dest");
cc_result = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_result),
"cc_result");
cc_op = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_op), "cc_op");
cc_size = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_size),
"cc_size");
cc_mask = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_mask),
"cc_mask");
env_pc = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, pc),
"pc");
env_btarget = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, btarget),
"btarget");
env_btaken = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, btaken),
"btaken");
for (i = 0; i < 16; i++) {
cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, regs[i]),
regnames_v10[i]);
}
for (i = 0; i < 16; i++) {
cpu_PR[i] = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, pregs[i]),
pregnames_v10[i]);
}
return env;
}