static int pluto_nct1008_init(void)
{
	int nct1008_port;
	int ret = 0;

	if (board_info.board_id == BOARD_E1580 ||
	    board_info.board_id == BOARD_E1575 ||
	    board_info.board_id == BOARD_E1577) {
		nct1008_port = TEGRA_GPIO_PX6;
	} else {
		nct1008_port = TEGRA_GPIO_PX6;
		pr_err("Warning: nct alert port assumed TEGRA_GPIO_PX6 for unknown pluto board id E%d\n",
			board_info.board_id);
	}

	tegra_add_all_vmin_trips(pluto_nct1008_pdata.trips,
				&pluto_nct1008_pdata.num_trips);

	pluto_i2c4_nct1008_board_info[0].irq =
		gpio_to_irq(nct1008_port);
	pr_info("%s: pluto nct1008 irq %d",
			__func__, pluto_i2c4_nct1008_board_info[0].irq);

	ret = gpio_request(nct1008_port, "temp_alert");
	if (ret < 0)
		return ret;

	ret = gpio_direction_input(nct1008_port);
	if (ret < 0) {
		pr_info("%s: calling gpio_free(nct1008_port)", __func__);
		gpio_free(nct1008_port);
	}

	/* pluto has thermal sensor on GEN1-I2C i.e. instance 0 */
	i2c_register_board_info(0, pluto_i2c4_nct1008_board_info,
		ARRAY_SIZE(pluto_i2c4_nct1008_board_info));

	return ret;
}
static int flounder_nct72_init(void)
{
	s32 base_cp, shft_cp;
	u32 base_ft, shft_ft;
	int nct72_port = TEGRA_GPIO_PI6;
	int ret = 0;
	int i;
	struct thermal_trip_info *trip_state;

	/* raise NCT's thresholds if soctherm CP,FT fuses are ok */
	if ((tegra_fuse_calib_base_get_cp(&base_cp, &shft_cp) >= 0) &&
	    (tegra_fuse_calib_base_get_ft(&base_ft, &shft_ft) >= 0)) {
		flounder_nct72_pdata.sensors[EXT].shutdown_limit += 20;
		for (i = 0; i < flounder_nct72_pdata.sensors[EXT].num_trips;
			 i++) {
			trip_state = &flounder_nct72_pdata.sensors[EXT].trips[i];
			if (!strncmp(trip_state->cdev_type, "cpu-balanced",
					THERMAL_NAME_LENGTH)) {
				trip_state->cdev_type = "_none_";
				break;
			}
		}
	} else {
		tegra_platform_edp_init(
			flounder_nct72_pdata.sensors[EXT].trips,
			&flounder_nct72_pdata.sensors[EXT].num_trips,
					12000); /* edp temperature margin */
		tegra_add_cpu_vmax_trips(
			flounder_nct72_pdata.sensors[EXT].trips,
			&flounder_nct72_pdata.sensors[EXT].num_trips);
		tegra_add_tgpu_trips(
			flounder_nct72_pdata.sensors[EXT].trips,
			&flounder_nct72_pdata.sensors[EXT].num_trips);
		tegra_add_vc_trips(
			flounder_nct72_pdata.sensors[EXT].trips,
			&flounder_nct72_pdata.sensors[EXT].num_trips);
		tegra_add_core_vmax_trips(
			flounder_nct72_pdata.sensors[EXT].trips,
			&flounder_nct72_pdata.sensors[EXT].num_trips);
	}

	tegra_add_all_vmin_trips(flounder_nct72_pdata.sensors[EXT].trips,
		&flounder_nct72_pdata.sensors[EXT].num_trips);

	flounder_i2c_nct72_board_info[0].irq = gpio_to_irq(nct72_port);

	ret = gpio_request(nct72_port, "temp_alert");
	if (ret < 0)
		return ret;

	ret = gpio_direction_input(nct72_port);
	if (ret < 0) {
		pr_info("%s: calling gpio_free(nct72_port)", __func__);
		gpio_free(nct72_port);
	}

	i2c_register_board_info(0, flounder_i2c_nct72_board_info,
	ARRAY_SIZE(flounder_i2c_nct72_board_info));

	return ret;
}
static int ardbeg_nct72_init(void)
{
	s32 base_cp, shft_cp;
	u32 base_ft, shft_ft;
	int nct72_port = TEGRA_GPIO_PI6;
	int ret = 0;
	int i;
	struct thermal_trip_info *trip_state;
	struct board_info board_info;

	tegra_get_board_info(&board_info);
	/* raise NCT's thresholds if soctherm CP,FT fuses are ok */
	if ((tegra_fuse_calib_base_get_cp(&base_cp, &shft_cp) >= 0) &&
	    (tegra_fuse_calib_base_get_ft(&base_ft, &shft_ft) >= 0)) {
		ardbeg_nct72_pdata.shutdown_ext_limit += 20;
		for (i = 0; i < ardbeg_nct72_pdata.num_trips; i++) {
			trip_state = &ardbeg_nct72_pdata.trips[i];
			if (!strncmp(trip_state->cdev_type, "cpu-balanced",
					THERMAL_NAME_LENGTH)) {
				trip_state->cdev_type = "_none_";
				break;
			}
		}
	} else {
		tegra_platform_edp_init(ardbeg_nct72_pdata.trips,
					&ardbeg_nct72_pdata.num_trips,
					12000); /* edp temperature margin */
		tegra_add_cpu_vmax_trips(ardbeg_nct72_pdata.trips,
				&ardbeg_nct72_pdata.num_trips);
		tegra_add_tgpu_trips(ardbeg_nct72_pdata.trips,
				     &ardbeg_nct72_pdata.num_trips);
		tegra_add_vc_trips(ardbeg_nct72_pdata.trips,
				     &ardbeg_nct72_pdata.num_trips);
		tegra_add_core_vmax_trips(ardbeg_nct72_pdata.trips,
				     &ardbeg_nct72_pdata.num_trips);
	}

	tegra_add_all_vmin_trips(ardbeg_nct72_pdata.trips,
				&ardbeg_nct72_pdata.num_trips);

	ardbeg_i2c_nct72_board_info[0].irq = gpio_to_irq(nct72_port);

	ret = gpio_request(nct72_port, "temp_alert");
	if (ret < 0)
		return ret;

	ret = gpio_direction_input(nct72_port);
	if (ret < 0) {
		pr_info("%s: calling gpio_free(nct72_port)", __func__);
		gpio_free(nct72_port);
	}

	/* ardbeg has thermal sensor on GEN2-I2C i.e. instance 1 */
	if (board_info.board_id == BOARD_PM358 ||
			board_info.board_id == BOARD_PM359 ||
			board_info.board_id == BOARD_PM370 ||
			board_info.board_id == BOARD_PM374 ||
			board_info.board_id == BOARD_PM363)
		i2c_register_board_info(1, laguna_i2c_nct72_board_info,
		ARRAY_SIZE(laguna_i2c_nct72_board_info));
	else if (board_info.board_id == BOARD_PM375 ||
			board_info.board_id == BOARD_PM377)
		i2c_register_board_info(0, laguna_i2c_nct72_board_info,
				ARRAY_SIZE(laguna_i2c_nct72_board_info));
	else
		i2c_register_board_info(1, ardbeg_i2c_nct72_board_info,
		ARRAY_SIZE(ardbeg_i2c_nct72_board_info));

	return ret;
}