static void tegra_dc_set_out(struct tegra_dc *dc, struct tegra_dc_out *out) { struct tegra_dc_mode *mode; dc->out = out; mode = tegra_dc_get_override_mode(dc); if (mode) tegra_dc_set_mode(dc, mode); else if (out->n_modes > 0) tegra_dc_set_mode(dc, &dc->out->modes[0]); switch (out->type) { case TEGRA_DC_OUT_RGB: dc->out_ops = &tegra_dc_rgb_ops; break; case TEGRA_DC_OUT_HDMI: dc->out_ops = &tegra_dc_hdmi_ops; break; case TEGRA_DC_OUT_DSI: dc->out_ops = &tegra_dc_dsi_ops; break; default: dc->out_ops = NULL; break; } if (dc->out_ops && dc->out_ops->init) dc->out_ops->init(dc); }
static void tegra_dc_set_out(struct tegra_dc *dc, struct tegra_dc_out *out) { dc->out = out; if (out->n_modes > 0) tegra_dc_set_mode(dc, &dc->out->modes[0]); switch (out->type) { case TEGRA_DC_OUT_RGB: dc->out_ops = &tegra_dc_rgb_ops; break; case TEGRA_DC_OUT_HDMI: dc->out_ops = &tegra_dc_hdmi_ops; break; default: dc->out_ops = NULL; break; } if (dc->out_ops && dc->out_ops->init) dc->out_ops->init(dc); }
int tegra_dc_set_fb_mode(struct tegra_dc *dc, const struct fb_videomode *fbmode, bool stereo_mode) { struct tegra_dc_mode mode; if (!fbmode->pixclock) return -EINVAL; mode.pclk = PICOS2KHZ(fbmode->pixclock) * 1000; mode.h_sync_width = fbmode->hsync_len; mode.v_sync_width = fbmode->vsync_len; mode.h_back_porch = fbmode->left_margin; mode.v_back_porch = fbmode->upper_margin; mode.h_active = fbmode->xres; mode.v_active = fbmode->yres; mode.h_front_porch = fbmode->right_margin; mode.v_front_porch = fbmode->lower_margin; mode.stereo_mode = stereo_mode; if (dc->out->type == TEGRA_DC_OUT_HDMI) { /* HDMI controller requires h_ref=1, v_ref=1 */ mode.h_ref_to_sync = 1; mode.v_ref_to_sync = 1; } else { calc_ref_to_sync(&mode); } if (!check_ref_to_sync(&mode)) { dev_err(&dc->ndev->dev, "Display timing doesn't meet restrictions.\n"); return -EINVAL; } dev_dbg(&dc->ndev->dev, "Using mode %dx%d pclk=%d href=%d vref=%d\n", mode.h_active, mode.v_active, mode.pclk, mode.h_ref_to_sync, mode.v_ref_to_sync ); #ifndef CONFIG_TEGRA_HDMI_74MHZ_LIMIT /* Double the pixel clock and update v_active only for * frame packed mode */ if (mode.stereo_mode) { mode.pclk *= 2; /* total v_active = yres*2 + activespace */ mode.v_active = fbmode->yres * 2 + fbmode->vsync_len + fbmode->upper_margin + fbmode->lower_margin; } #endif mode.flags = 0; if (!(fbmode->sync & FB_SYNC_HOR_HIGH_ACT)) mode.flags |= TEGRA_DC_MODE_FLAG_NEG_H_SYNC; if (!(fbmode->sync & FB_SYNC_VERT_HIGH_ACT)) mode.flags |= TEGRA_DC_MODE_FLAG_NEG_V_SYNC; return tegra_dc_set_mode(dc, &mode); }