static void __init uart_debug_init(void)
{
unsigned long rate;
struct clk *c;
tegra_init_debug_uart_rate();
/* UARTD is the debug port. */
pr_info("Selecting UARTD as the debug console\n");
enterprise_uart_devices[3] = &debug_uartd_device;
debug_uart_port_base = ((struct plat_serial8250_port *)(
debug_uartd_device.dev.platform_data))->mapbase;
debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
/* Clock enable for the debug channel */
if (!IS_ERR_OR_NULL(debug_uart_clk)) {
rate = ((struct plat_serial8250_port *)(
debug_uartd_device.dev.platform_data))->uartclk;
pr_info("The debug console clock name is %s\n",
debug_uart_clk->name);
c = tegra_get_clock_by_name("pll_p");
if (IS_ERR_OR_NULL(c))
pr_err("Not getting the parent clock pll_p\n");
else
clk_set_parent(debug_uart_clk, c);
clk_enable(debug_uart_clk);
clk_set_rate(debug_uart_clk, rate);
} else {
pr_err("Not getting the clock %s for debug console\n",
debug_uart_clk->name);
}
}
void __init tegra_init_early(void)
{
#ifndef CONFIG_SMP
/* For SMP system, initializing the reset handler here is too
late. For non-SMP systems, the function that calls the reset
handler initializer is not called, so do it here for non-SMP. */
tegra_cpu_reset_handler_init();
#endif
tegra_init_fuse();
tegra_gpio_resume_init();
tegra_init_clock();
tegra_init_pinmux();
tegra_clk_init_from_table(common_clk_init_table);
tegra_init_power();
tegra_init_cache(true);
tegra_init_ahb_gizmo_settings();
tegra_init_debug_uart_rate();
}
static void __init uart_debug_init(void)
{
struct board_info board_info;
int debug_port_id;
tegra_get_board_info(&board_info);
debug_port_id = get_tegra_uart_debug_port_id();
if (debug_port_id < 0) {
debug_port_id = 0;
/* UARTB is debug port
* for SLT - E1186/E1187/PM269
* for E1256/E1257
*/
if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
((board_info.board_id == BOARD_E1186) ||
(board_info.board_id == BOARD_E1187) ||
(board_info.board_id == BOARD_PM269))) ||
(board_info.board_id == BOARD_E1256) ||
(board_info.board_id == BOARD_E1257))
debug_port_id = 1;
}
tegra_init_debug_uart_rate();
switch (debug_port_id) {
case 0:
/* UARTA is the debug port. */
pr_info("Selecting UARTA as the debug console\n");
cardhu_uart_devices[0] = &debug_uarta_device;
debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
debug_uart_port_base = ((struct plat_serial8250_port *)(
debug_uarta_device.dev.platform_data))->mapbase;
break;
case 1:
/* UARTB is the debug port. */
pr_info("Selecting UARTB as the debug console\n");
cardhu_uart_devices[1] = &debug_uartb_device;
debug_uart_clk = clk_get_sys("serial8250.0", "uartb");
debug_uart_port_base = ((struct plat_serial8250_port *)(
debug_uartb_device.dev.platform_data))->mapbase;
break;
case 2:
/* UARTC is the debug port. */
pr_info("Selecting UARTC as the debug console\n");
cardhu_uart_devices[2] = &debug_uartc_device;
debug_uart_clk = clk_get_sys("serial8250.0", "uartc");
debug_uart_port_base = ((struct plat_serial8250_port *)(
debug_uartc_device.dev.platform_data))->mapbase;
break;
case 3:
/* UARTD is the debug port. */
pr_info("Selecting UARTD as the debug console\n");
cardhu_uart_devices[3] = &debug_uartd_device;
debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
debug_uart_port_base = ((struct plat_serial8250_port *)(
debug_uartd_device.dev.platform_data))->mapbase;
break;
case 4:
/* UARTE is the debug port. */
pr_info("Selecting UARTE as the debug console\n");
cardhu_uart_devices[4] = &debug_uarte_device;
debug_uart_clk = clk_get_sys("serial8250.0", "uarte");
debug_uart_port_base = ((struct plat_serial8250_port *)(
debug_uarte_device.dev.platform_data))->mapbase;
break;
default:
pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
cardhu_uart_devices[0] = &debug_uarta_device;
debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
debug_uart_port_base = ((struct plat_serial8250_port *)(
debug_uarta_device.dev.platform_data))->mapbase;
break;
}
return;
}
