int powergate_module(int id) { if (!pg_ops) { pr_info("This SOC doesn't support powergating\n"); return -EINVAL; } if (id < 0 || id >= pg_ops->num_powerdomains) return -EINVAL; tegra_powergate_mc_flush(id); return tegra_powergate_set(id, false); }
void nvhost_module_reset(struct device *dev, struct nvhost_module *mod) { dev_dbg(dev, "%s: asserting %s module reset (id %d, id2 %d)\n", __func__, mod->name, mod->desc->powergate_ids[0], mod->desc->powergate_ids[1]); /* assert module and mc client reset */ if (mod->desc->powergate_ids[0] != -1) { tegra_powergate_mc_disable(mod->desc->powergate_ids[0]); tegra_periph_reset_assert(mod->clk[0]); tegra_powergate_mc_flush(mod->desc->powergate_ids[0]); } if (mod->desc->powergate_ids[1] != -1) { tegra_powergate_mc_disable(mod->desc->powergate_ids[1]); tegra_periph_reset_assert(mod->clk[1]); tegra_powergate_mc_flush(mod->desc->powergate_ids[1]); } udelay(POWERGATE_DELAY); /* deassert reset */ if (mod->desc->powergate_ids[0] != -1) { tegra_powergate_mc_flush_done(mod->desc->powergate_ids[0]); tegra_periph_reset_deassert(mod->clk[0]); tegra_powergate_mc_enable(mod->desc->powergate_ids[0]); } if (mod->desc->powergate_ids[1] != -1) { tegra_powergate_mc_flush_done(mod->desc->powergate_ids[1]); tegra_periph_reset_deassert(mod->clk[1]); tegra_powergate_mc_enable(mod->desc->powergate_ids[1]); } dev_dbg(dev, "%s: module %s out of reset\n", __func__, mod->name); }
static int tegra_camera_reset(struct tegra_camera_dev *dev, uint id) { struct clk *clk; int mc_client = -1; switch (id) { case TEGRA_CAMERA_MODULE_VI: clk = dev->vi_clk; mc_client = TEGRA_POWERGATE_VENC; break; case TEGRA_CAMERA_MODULE_ISP: clk = dev->isp_clk; mc_client = TEGRA_POWERGATE_VENC; break; case TEGRA_CAMERA_MODULE_CSI: clk = dev->csi_clk; break; default: return -EINVAL; } if (mc_client != -1) { tegra_powergate_mc_disable(mc_client); } tegra_periph_reset_assert(clk); if (mc_client != -1) { tegra_powergate_mc_flush(mc_client); } udelay(10); if (mc_client != -1) { tegra_powergate_mc_flush_done(mc_client); } tegra_periph_reset_deassert(clk); if (mc_client != -1) { tegra_powergate_mc_enable(mc_client); } return 0; }
int tegra1xx_powergate(int id, struct powergate_partition_info *pg_info) { int ret; /* If first clk_ptr is null, fill clk info for the partition */ if (!pg_info->clk_info[0].clk_ptr) get_clk_info(pg_info); ret = partition_clk_enable(pg_info); if (ret) WARN(1, "Couldn't enable clock"); udelay(10); tegra_powergate_mc_flush(id); udelay(10); powergate_partition_assert_reset(pg_info); udelay(10); /* Powergating is done only if refcnt of all clks is 0 */ partition_clk_disable(pg_info); udelay(10); ret = tegra_powergate_set(id, false); if (ret) goto err_power_off; return 0; err_power_off: WARN(1, "Could not Powergate Partition %d", id); return ret; }