static void __init tegra_p1852_init(void)
{
tegra_init_board_info();
tegra_clk_init_from_table(p1852_clk_init_table);
tegra_enable_pinmux();
tegra_smmu_init();
tegra_soc_device_init("p1852");
p1852_pinmux_init();
p1852_i2c_init();
p1852_i2s_audio_init();
p1852_gpio_init();
p1852_uart_init();
p1852_usb_init();
tegra_io_dpd_init();
p1852_sdhci_init();
p1852_spi_init();
platform_add_devices(p1852_devices, ARRAY_SIZE(p1852_devices));
#ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
p1852_touch_init();
#endif
p1852_panel_init();
p1852_nor_init();
p1852_pcie_init();
p1852_suspend_init();
tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
}
static void __init tegra_e1853_init(void)
{
tegra_init_board_info();
tegra_clk_init_from_table(e1853_clk_init_table);
tegra_enable_pinmux();
tegra_smmu_init();
tegra_soc_device_init("e1853");
e1853_pinmux_init();
e1853_i2c_init();
e1853_gpio_init();
/* e1853_regulator_init();
e1853_suspend_init(); */
e1853_i2s_audio_init();
e1853_uart_init();
e1853_usb_init();
tegra_io_dpd_init();
e1853_sdhci_init();
e1853_spi_init();
platform_add_devices(e1853_devices, ARRAY_SIZE(e1853_devices));
#ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
e1853_touch_init();
#endif
e1853_panel_init();
e1853_nor_init();
e1853_pcie_init();
}
int tegra_soc_pwr_domain_on_finish(const psci_power_state_t *target_state)
{
int stateid_afflvl2 = target_state->pwr_domain_state[PLAT_MAX_PWR_LVL];
int stateid_afflvl0 = target_state->pwr_domain_state[MPIDR_AFFLVL0];
mce_cstate_info_t cstate_info = { 0 };
/*
* Reset power state info for CPUs when onlining, we set
* deepest power when offlining a core but that may not be
* requested by non-secure sw which controls idle states. It
* will re-init this info from non-secure software when the
* core come online.
*/
if (stateid_afflvl0 == PLAT_MAX_OFF_STATE) {
cstate_info.cluster = TEGRA_ARI_CLUSTER_CC1;
cstate_info.update_wake_mask = 1;
mce_update_cstate_info(&cstate_info);
}
/*
* Check if we are exiting from deep sleep and restore SE
* context if we are.
*/
if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) {
mmio_write_32(TEGRA_SE0_BASE + SE_MUTEX_WATCHDOG_NS_LIMIT,
se_regs[0]);
mmio_write_32(TEGRA_RNG1_BASE + RNG_MUTEX_WATCHDOG_NS_LIMIT,
se_regs[1]);
mmio_write_32(TEGRA_PKA1_BASE + PKA_MUTEX_WATCHDOG_NS_LIMIT,
se_regs[2]);
/* Init SMMU */
tegra_smmu_init();
/*
* Reset power state info for the last core doing SC7
* entry and exit, we set deepest power state as CC7
* and SC7 for SC7 entry which may not be requested by
* non-secure SW which controls idle states.
*/
cstate_info.cluster = TEGRA_ARI_CLUSTER_CC7;
cstate_info.system = TEGRA_ARI_SYSTEM_SC1;
cstate_info.update_wake_mask = 1;
mce_update_cstate_info(&cstate_info);
}
return PSCI_E_SUCCESS;
}
static void __init tegra_kai_init(void)
{
tegra_clk_init_from_table(kai_clk_init_table);
tegra_enable_pinmux();
tegra_smmu_init();
tegra_soc_device_init("kai");
kai_pinmux_init();
kai_i2c_init();
kai_spi_init();
kai_usb_init();
#ifdef CONFIG_TEGRA_EDP_LIMITS
kai_edp_init();
#endif
kai_uart_init();
kai_audio_init();
platform_add_devices(kai_devices, ARRAY_SIZE(kai_devices));
tegra_ram_console_debug_init();
tegra_io_dpd_init();
kai_sdhci_init();
kai_regulator_init();
kai_suspend_init();
kai_touch_init();
kai_keys_init();
kai_panel_init();
kai_tegra_setup_tibluesleep();
kai_bt_st();
kai_sensors_init();
kai_pins_state_init();
kai_emc_init();
tegra_release_bootloader_fb();
kai_modem_init();
#ifdef CONFIG_TEGRA_WDT_RECOVERY
tegra_wdt_recovery_init();
#endif
tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
tegra_register_fuse();
}
static void __init tegra_cardhu_init(void)
{
struct board_info board_info;
tegra_get_board_info(&board_info);
tegra_clk_init_from_table(cardhu_clk_init_table);
tegra_enable_pinmux();
tegra_smmu_init();
tegra_soc_device_init("cardhu");
cardhu_pinmux_init();
cardhu_gpio_init();
cardhu_i2c_init();
cardhu_spi_init();
cardhu_usb_init();
#ifdef CONFIG_TEGRA_EDP_LIMITS
cardhu_edp_init();
#endif
cardhu_uart_init();
platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
switch (board_info.board_id) {
case BOARD_PM315:
platform_add_devices(beaver_audio_devices,
ARRAY_SIZE(beaver_audio_devices));
break;
default:
platform_add_devices(cardhu_audio_devices,
ARRAY_SIZE(cardhu_audio_devices));
break;
}
tegra_ram_console_debug_init();
tegra_io_dpd_init();
cardhu_sdhci_init();
cardhu_regulator_init();
cardhu_dtv_init();
cardhu_suspend_init();
cardhu_touch_init();
cardhu_modem_init();
cardhu_kbc_init();
cardhu_scroll_init();
cardhu_keys_init();
cardhu_panel_init();
cardhu_pmon_init();
cardhu_sensors_init();
#if defined(CONFIG_BT_BLUESLEEP) || defined(CONFIG_BT_BLUESLEEP_MODULE)
cardhu_setup_bluesleep();
#elif defined CONFIG_BLUEDROID_PM
cardhu_setup_bluedroid_pm();
#endif
/*
* if you want to add support for SATA in your board
* then add your board check here like
* board_info.board_id == BOARD_E1186
*/
if (board_info.board_id == BOARD_PM315)
cardhu_sata_init();
cardhu_pins_state_init();
cardhu_emc_init();
tegra_release_bootloader_fb();
cardhu_pci_init();
#ifdef CONFIG_TEGRA_WDT_RECOVERY
tegra_wdt_recovery_init();
#endif
tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
tegra_vibrator_init();
}
