uint8_t u8g_dev_ssd1322_nhd31oled_2x_gr_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev); u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1322_2bit_nhd_312_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_NEXT: { uint8_t i; u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); uint8_t *p = pb->buf; u8g_uint_t cnt; cnt = pb->width; cnt >>= 3; for( i = 0; i < pb->p.page_height; i++ ) { u8g_dev_ssd1322_2bit_prepare_row(u8g, dev, i); /* this will also enable chip select */ #if !defined(U8G_16BIT) u8g_WriteByte(u8g, dev, 0x00); u8g_WriteByte(u8g, dev, 0x00); #endif u8g_WriteSequence4LTo16GrDevice(u8g, dev, cnt, p); #if !defined(U8G_16BIT) u8g_WriteByte(u8g, dev, 0x00); u8g_WriteByte(u8g, dev, 0x00); #endif u8g_SetChipSelect(u8g, dev, 0); p+=cnt; } } break; case U8G_DEV_MSG_CONTRAST: u8g_SetChipSelect(u8g, dev, 1); u8g_SetAddress(u8g, dev, 0); /* instruction mode */ u8g_WriteByte(u8g, dev, 0x081); u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1); u8g_SetChipSelect(u8g, dev, 0); break; case U8G_DEV_MSG_SLEEP_ON: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on); return 1; case U8G_DEV_MSG_SLEEP_OFF: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off); return 1; } return u8g_dev_pb16h2_base_fn(u8g, dev, msg, arg); }
static uint8_t u8g_dev_ssd1325_nhd27oled_gr_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS); u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1325_2bit_nhd_27_12864ucy3_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_NEXT: { uint8_t i; u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); uint8_t *p = pb->buf; u8g_uint_t cnt; cnt = pb->width; cnt >>= 2; for( i = 0; i < pb->p.page_height; i++ ) { u8g_dev_ssd1325_gr_prepare_row(u8g, dev, i); /* this will also enable chip select */ u8g_WriteSequence4LTo16GrDevice(u8g, dev, cnt, p); u8g_SetChipSelect(u8g, dev, 0); p+=cnt; } } break; case U8G_DEV_MSG_CONTRAST: u8g_SetChipSelect(u8g, dev, 1); u8g_SetAddress(u8g, dev, 0); /* instruction mode */ u8g_WriteByte(u8g, dev, 0x081); u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1); u8g_SetChipSelect(u8g, dev, 0); return 1; case U8G_DEV_MSG_SLEEP_ON: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on); return 1; case U8G_DEV_MSG_SLEEP_OFF: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off); return 1; } return u8g_dev_pb8h2_base_fn(u8g, dev, msg, arg); }