/**
* \brief Initialize the USB peripheral and set right role according to ID pin
*
* \return \c true if the ID pin management has been started, otherwise \c false.
*/
bool usb_dual_enable(void)
{
if (_initialized) {
return false; // Dual role already initialized
}
#if USB_ID_EIC
_initialized = true;
struct port_config pin_conf;
port_get_config_defaults(&pin_conf);
/* Set USB ID Pin as inputs */
pin_conf.direction = PORT_PIN_DIR_INPUT;
pin_conf.input_pull = PORT_PIN_PULL_UP;
port_pin_set_config(USB_ID_PIN, &pin_conf);
usb_id_config();
if (_usb_is_id_device()) {
UHC_MODE_CHANGE(false);
udc_start();
} else {
UHC_MODE_CHANGE(true);
uhc_start();
}
/**
* End of host or device startup,
* the current mode selected is already started now
*/
return true; // ID pin management has been enabled
#else
return false; // ID pin management has not been enabled
#endif
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
#if SAMD21 || SAML21
system_init();
#else
sysclk_init();
board_init();
#endif
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the sleep manager
sleepmgr_init();
ui_init();
// Start USB dual mode which will start the correct mode (device or host)
// corresponding at USB ID signal.
uhc_start();
// The main loop manages only the power mode
// because the USB stack is full interrupt driven.
while (true) {
sleepmgr_enter_sleep();
}
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
#if SAMD21 || SAML21 || SAMDA1
system_init();
#else
sysclk_init();
board_init();
#endif
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the sleep manager
sleepmgr_init();
ui_init();
// Start USB host stack
uhc_start();
// The USB management is entirely managed by interrupts.
// As a consequence, the user application does only have to play with the power modes.
while (true) {
sleepmgr_enter_sleep();
}
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
/* Initialize the synchronous clock system to the default configuration
set in conf_clock.h.
\note All non-essential peripheral clocks are initially disabled. */
sysclk_init();
/* Initialize interrupts */
irq_initialize_vectors();
cpu_irq_enable();
/* Initialize the sleep manager, lock initial mode. */
sleepmgr_init();
/* Initialize the resources used by this example to the default
configuration set in conf_board.h */
board_init();
/* Initialize the user interface */
ui_init();
/* Start USB host stack */
uhc_start();
/* The main loop manages only the power mode
because the USB management is done by interrupt */
while (true) {
sleepmgr_enter_sleep();
}
}
static void run_test_start_uhc(const struct test_case *test)
{
// Start USB host stack
uhc_start();
record_events();
CHECK_EVENT_HOST_MODE();
CHECK_EVENT_VBUS_PRESENT();
}
/**
* USB ID pin change handler
*/
static void usb_id_handler(void)
{
extint_chan_disable_callback(USB_ID_EIC_LINE,
EXTINT_CALLBACK_TYPE_DETECT);
if (_usb_is_id_device()) {
uhc_stop(false);
UHC_MODE_CHANGE(false);
udc_start();
} else {
udc_stop();
UHC_MODE_CHANGE(true);
uhc_start();
}
extint_chan_enable_callback(USB_ID_EIC_LINE,
EXTINT_CALLBACK_TYPE_DETECT);
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
#if SAMD21 || SAML21
system_init();
#else
sysclk_init();
board_init();
#endif
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the sleep manager
sleepmgr_init();
ui_init();
// Start USB host stack
uhc_start();
// The USB management is entirely managed by interrupts.
// As a consequence, the user application does only have :
// - to play with the power modes
// - to create a file on each new LUN connected
while (true) {
//sleepmgr_enter_sleep();
if (main_usb_sof_counter > 2000) {
main_usb_sof_counter = 0;
volatile uint8_t lun;
FRESULT res;
for (lun = LUN_ID_USB; (lun < LUN_ID_USB +
uhi_msc_mem_get_lun()) &&
(lun < MAX_DRIVE); lun++) {
// Check if LUN has been already tested
if (TEST_OK == lun_states[lun] ||
TEST_ERROR == lun_states[lun]) {
continue;
}
// Mount drive
memset(&fs, 0, sizeof(FATFS));
res = f_mount(lun, &fs);
if (FR_INVALID_DRIVE == res) {
// LUN is not present
lun_states[lun] = TEST_NO_PRESENT;
continue;
}
// Create a test file on the disk
test_file_name[0] = lun + '0';
res = f_open(&file_object,
(char const *)test_file_name,
FA_CREATE_ALWAYS | FA_WRITE);
if (res == FR_NOT_READY) {
// LUN not ready
lun_states[lun] = TEST_NO_PRESENT;
f_close(&file_object);
continue;
}
if (res != FR_OK) {
// LUN test error
lun_states[lun] = TEST_ERROR;
f_close(&file_object);
continue;
}
// Write to test file
f_puts(MSG_TEST, &file_object);
// LUN test OK
lun_states[lun] = TEST_OK;
f_close(&file_object);
}
if (main_count_states(TEST_NO_PRESENT) == MAX_DRIVE) {
ui_test_finish(false); // Test fail
} else if (MAX_DRIVE != main_count_states(TEST_NULL)) {
if (main_count_states(TEST_ERROR)) {
ui_test_finish(false); // Test fail
} else if (main_count_states(TEST_OK)) {
ui_test_flag_reset();
ui_test_finish(true); // Test OK
}
} else {
ui_test_flag_reset();
}
}
}
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
sysclk_init();
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the sleep manager
sleepmgr_init();
board_init();
ui_init();
// Reset File System
nav_reset();
// Start USB host stack
uhc_start();
// The USB management is entirely managed by interrupts.
// As a consequence, the user application does only have :
// - to play with the power modes
// - to create a file on each new LUN connected
while (true) {
sleepmgr_enter_sleep();
if (main_usb_sof_counter > 2000) {
main_usb_sof_counter = 0;
uint8_t lun;
for (lun = 0; (lun < uhi_msc_mem_get_lun()) && (lun < 8); lun++) {
// Mount drive
nav_drive_set(lun);
if (!nav_partition_mount()) {
if (fs_g_status == FS_ERR_HW_NO_PRESENT) {
// The test can not be done, if LUN is not present
lun_state &= ~(1 << lun); // LUN test reseted
continue;
}
lun_state |= (1 << lun); // LUN test is done.
ui_test_finish(false); // Test fail
continue;
}
// Check if LUN has been already tested
if (lun_state & (1 << lun)) {
continue;
}
// Create a test file on the disk
if (!nav_file_create((FS_STRING) "uhi_msc_test.txt")) {
if (fs_g_status != FS_ERR_FILE_EXIST) {
if (fs_g_status == FS_LUN_WP) {
// Test can be done only on no write protected device
continue;
}
lun_state |= (1 << lun); // LUN test is done.
ui_test_finish(false); // Test fail
continue;
}
}
if (!file_open(FOPEN_MODE_APPEND)) {
if (fs_g_status == FS_LUN_WP) {
// Test can be done only on no write protected device
continue;
}
lun_state |= (1 << lun); // LUN test is done.
ui_test_finish(false); // Test fail
continue;
}
if (!file_write_buf((uint8_t*)MSG_TEST, sizeof(MSG_TEST))) {
lun_state |= (1 << lun); // LUN test is done.
ui_test_finish(false); // Test fail
continue;
}
file_close();
lun_state |= (1 << lun); // LUN test is done.
ui_test_finish(true); // Test pass
}
if ((lun == 0) || (lun_state == 0)) {
ui_test_flag_reset();
}
}
}
}
// initialize application timer
extern void init_tc (void) {
volatile avr32_tc_t *tc = APP_TC;
// waveform options
static const tc_waveform_opt_t waveform_opt = {
.channel = APP_TC_CHANNEL, // channel
.bswtrg = TC_EVT_EFFECT_NOOP, // software trigger action on TIOB
.beevt = TC_EVT_EFFECT_NOOP, // external event action
.bcpc = TC_EVT_EFFECT_NOOP, // rc compare action
.bcpb = TC_EVT_EFFECT_NOOP, // rb compare
.aswtrg = TC_EVT_EFFECT_NOOP, // soft trig on TIOA
.aeevt = TC_EVT_EFFECT_NOOP, // etc
.acpc = TC_EVT_EFFECT_NOOP,
.acpa = TC_EVT_EFFECT_NOOP,
// Waveform selection: Up mode with automatic trigger(reset) on RC compare.
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,
.enetrg = false, // external event trig
.eevt = 0, // extern event select
.eevtedg = TC_SEL_NO_EDGE, // extern event edge
.cpcdis = false, // counter disable when rc compare
.cpcstop = false, // counter stopped when rc compare
.burst = false,
.clki = false,
// Internal source clock 5, connected to fPBA / 128.
.tcclks = TC_CLOCK_SOURCE_TC5
};
// Options for enabling TC interrupts
static const tc_interrupt_t tc_interrupt = {
.etrgs = 0,
.ldrbs = 0,
.ldras = 0,
.cpcs = 1, // Enable interrupt on RC compare alone
.cpbs = 0,
.cpas = 0,
.lovrs = 0,
.covfs = 0
};
// Initialize the timer/counter.
tc_init_waveform(tc, &waveform_opt);
// set timer compare trigger.
// we want it to overflow and generate an interrupt every 1 ms
// so (1 / fPBA / 128) * RC = 0.001
// so RC = fPBA / 128 / 1000
// tc_write_rc(tc, APP_TC_CHANNEL, (FPBA_HZ / 128000));
tc_write_rc(tc, APP_TC_CHANNEL, (FPBA_HZ / 128000));
// configure the timer interrupt
tc_configure_interrupts(tc, APP_TC_CHANNEL, &tc_interrupt);
// Start the timer/counter.
tc_start(tc, APP_TC_CHANNEL);
}
extern void init_spi (void) {
sysclk_enable_pba_module(SYSCLK_SPI);
static const gpio_map_t SPI_GPIO_MAP = {
{SPI_SCK_PIN, SPI_SCK_FUNCTION },
{SPI_MISO_PIN, SPI_MISO_FUNCTION},
{SPI_MOSI_PIN, SPI_MOSI_FUNCTION},
{SPI_NPCS0_PIN, SPI_NPCS0_FUNCTION },
{SPI_NPCS1_PIN, SPI_NPCS1_FUNCTION },
{SPI_NPCS2_PIN, SPI_NPCS2_FUNCTION },
};
// Assign GPIO to SPI.
gpio_enable_module(SPI_GPIO_MAP, sizeof(SPI_GPIO_MAP) / sizeof(SPI_GPIO_MAP[0]));
spi_options_t spiOptions = {
.reg = DAC_SPI,
.baudrate = 2000000,
.bits = 8,
.trans_delay = 0,
.spck_delay = 0,
.stay_act = 1,
.spi_mode = 1,
.modfdis = 1
};
// Initialize as master.
spi_initMaster(SPI, &spiOptions);
// Set SPI selection mode: variable_ps, pcs_decode, delay.
spi_selectionMode(SPI, 0, 0, 0);
// Enable SPI module.
spi_enable(SPI);
// spi_setupChipReg( SPI, &spiOptions, FPBA_HZ );
spi_setupChipReg(SPI, &spiOptions, sysclk_get_pba_hz() );
// add ADC chip register
spiOptions.reg = ADC_SPI;
spiOptions.baudrate = 20000000;
spiOptions.bits = 16;
spiOptions.spi_mode = 2;
spiOptions.spck_delay = 0;
spiOptions.trans_delay = 5;
spiOptions.stay_act = 0;
spiOptions.modfdis = 0;
spi_setupChipReg( SPI, &spiOptions, FPBA_HZ );
// add OLED chip register
spiOptions.reg = OLED_SPI;
spiOptions.baudrate = 40000000;
spiOptions.bits = 8;
spiOptions.spi_mode = 3;
spiOptions.spck_delay = 0;
spiOptions.trans_delay = 0;
spiOptions.stay_act = 1;
spiOptions.modfdis = 1;
spi_setupChipReg( SPI, &spiOptions, FPBA_HZ );
}
// initialize USB host stack
void init_usb_host (void) {
uhc_start();
}
// initialize i2c
void init_i2c_master(void) {
twi_options_t opt;
int status;
static const gpio_map_t TWI_GPIO_MAP = {
{AVR32_TWI_SDA_0_0_PIN, AVR32_TWI_SDA_0_0_FUNCTION},
{AVR32_TWI_SCL_0_0_PIN, AVR32_TWI_SCL_0_0_FUNCTION}
};
gpio_enable_module(TWI_GPIO_MAP, sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0]));
// options settings
opt.pba_hz = FOSC0;
opt.speed = TWI_SPEED;
opt.chip = 0x50;
// initialize TWI driver with options
// status = twi_master_init(&AVR32_TWI, &opt);
status = twi_master_init(TWI, &opt);
/* // check init result
if (status == TWI_SUCCESS)
print_dbg("\r\ni2c init");
else
print_dbg("\r\ni2c init FAIL");
*/
}
void init_i2c_slave(void) {
twi_options_t opt;
twi_slave_fct_t twi_slave_fct;
int status;
static const gpio_map_t TWI_GPIO_MAP = {
{AVR32_TWI_SDA_0_0_PIN, AVR32_TWI_SDA_0_0_FUNCTION},
{AVR32_TWI_SCL_0_0_PIN, AVR32_TWI_SCL_0_0_FUNCTION}
};
gpio_enable_module(TWI_GPIO_MAP, sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0]));
// options settings
opt.pba_hz = FOSC0;
opt.speed = TWI_SPEED;
opt.chip = 0x50;
// initialize TWI driver with options
twi_slave_fct.rx = &twi_slave_rx;
twi_slave_fct.tx = &twi_slave_tx;
twi_slave_fct.stop = &twi_slave_stop;
status = twi_slave_init(&AVR32_TWI, &opt, &twi_slave_fct );
/*
// check init result
if (status == TWI_SUCCESS)
print_dbg("\r\ni2c init");
else
print_dbg("\r\ni2c init FAIL");
*/
}
// initialize application timer
extern void init_tc (volatile avr32_tc_t *tc) {
// waveform options
static const tc_waveform_opt_t waveform_opt = {
.channel = APP_TC_CHANNEL, // channel
.bswtrg = TC_EVT_EFFECT_NOOP, // software trigger action on TIOB
.beevt = TC_EVT_EFFECT_NOOP, // external event action
.bcpc = TC_EVT_EFFECT_NOOP, // rc compare action
.bcpb = TC_EVT_EFFECT_NOOP, // rb compare
.aswtrg = TC_EVT_EFFECT_NOOP, // soft trig on TIOA
.aeevt = TC_EVT_EFFECT_NOOP, // etc
.acpc = TC_EVT_EFFECT_NOOP,
.acpa = TC_EVT_EFFECT_NOOP,
// Waveform selection: Up mode with automatic trigger(reset) on RC compare.
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,
.enetrg = false, // external event trig
.eevt = 0, // extern event select
.eevtedg = TC_SEL_NO_EDGE, // extern event edge
.cpcdis = false, // counter disable when rc compare
.cpcstop = false, // counter stopped when rc compare
.burst = false,
.clki = false,
// Internal source clock 5, connected to fPBA / 128.
.tcclks = TC_CLOCK_SOURCE_TC5
};
// Options for enabling TC interrupts
static const tc_interrupt_t tc_interrupt = {
.etrgs = 0,
.ldrbs = 0,
.ldras = 0,
.cpcs = 1, // Enable interrupt on RC compare alone
.cpbs = 0,
.cpas = 0,
.lovrs = 0,
.covfs = 0
};
// Initialize the timer/counter.
tc_init_waveform(tc, &waveform_opt);
// set timer compare trigger.
// we want it to overflow and generate an interrupt every 1 ms
// so (1 / fPBA / 128) * RC = 0.001
// so RC = fPBA / 128 / 1000
tc_write_rc(tc, APP_TC_CHANNEL, (FPBA_HZ / 128 / 1000));
// configure the timer interrupt
tc_configure_interrupts(tc, APP_TC_CHANNEL, &tc_interrupt);
// Start the timer/counter.
tc_start(tc, APP_TC_CHANNEL);
}
// initialize usb USARTy
void init_ftdi_usart (void) {
// GPIO map for USART.
static const gpio_map_t FTDI_USART_GPIO_MAP = {
{ FTDI_USART_RX_PIN, FTDI_USART_RX_FUNCTION },
{ FTDI_USART_TX_PIN, FTDI_USART_TX_FUNCTION }
};
// Options for USART.
static const usart_options_t FTDI_USART_OPTIONS = {
.baudrate = FTDI_USART_BAUDRATE,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
// Set up GPIO for FTDI_USART
gpio_enable_module(FTDI_USART_GPIO_MAP,
sizeof(FTDI_USART_GPIO_MAP) / sizeof(FTDI_USART_GPIO_MAP[0]));
// Initialize in RS232 mode.
usart_init_rs232(FTDI_USART, &FTDI_USART_OPTIONS, FPBA_HZ);
}
// initialize spi1: OLED, ADC, SD/MMC
extern void init_spi1 (void) {
static const gpio_map_t OLED_SPI_GPIO_MAP = {
{OLED_SPI_SCK_PIN, OLED_SPI_SCK_FUNCTION },
{OLED_SPI_MISO_PIN, OLED_SPI_MISO_FUNCTION},
{OLED_SPI_MOSI_PIN, OLED_SPI_MOSI_FUNCTION},
{OLED_SPI_NPCS0_PIN, OLED_SPI_NPCS0_FUNCTION },
{OLED_SPI_NPCS1_PIN, OLED_SPI_NPCS1_FUNCTION },
{OLED_SPI_NPCS2_PIN, OLED_SPI_NPCS2_FUNCTION },
};
// SPI options for OLED
spi_options_t spiOptions = {
.reg = OLED_SPI_NPCS,
.baudrate = 40000000,
.bits = 8,
.trans_delay = 0,
.spck_delay = 0,
.stay_act = 1,
.spi_mode = 3,
.modfdis = 1
};
// Assign GPIO to SPI.
gpio_enable_module(OLED_SPI_GPIO_MAP,
sizeof(OLED_SPI_GPIO_MAP) / sizeof(OLED_SPI_GPIO_MAP[0]));
// Initialize as master.
spi_initMaster(OLED_SPI, &spiOptions);
// Set SPI selection mode: variable_ps, pcs_decode, delay.
spi_selectionMode(OLED_SPI, 0, 0, 0);
// Enable SPI module.
spi_enable(OLED_SPI);
// setup chip register for OLED
spi_setupChipReg( OLED_SPI, &spiOptions, FPBA_HZ );
// add ADC chip register
spiOptions.reg = ADC_SPI_NPCS;
spiOptions.baudrate = 20000000;
spiOptions.bits = 16;
spiOptions.spi_mode = 2;
spiOptions.spck_delay = 0;
spiOptions.trans_delay = 5;
spiOptions.stay_act = 0;
spiOptions.modfdis = 0;
spi_setupChipReg( ADC_SPI, &spiOptions, FPBA_HZ );
// add SD/MMC chip register
spiOptions.reg = SD_MMC_SPI_NPCS;
spiOptions.baudrate = SD_MMC_SPI_MASTER_SPEED; // Defined in conf_sd_mmc_spi.h;
spiOptions.bits = SD_MMC_SPI_BITS; // Defined in conf_sd_mmc_spi.h;
spiOptions.spck_delay = 0;
spiOptions.trans_delay = 0;
spiOptions.stay_act = 1;
spiOptions.spi_mode = 0;
spiOptions.modfdis = 1;
// Initialize SD/MMC driver with SPI clock (PBA).
sd_mmc_spi_init(spiOptions, FPBA_HZ);
}
// init PDCA (Peripheral DMA Controller A) resources for the SPI transfer and start a dummy transfer
void init_local_pdca(void)
{
// PDCA channel for SPI RX
pdca_channel_options_t pdca_options_SPI_RX ={ // pdca channel options
.addr = (void *)&pdcaRxBuf,
.size = FS_BUF_SIZE, // transfer size
.r_addr = NULL, // next memory address after 1st transfer complete
.r_size = 0, // next transfer counter not used here
.pid = AVR32_PDCA_CHANNEL_USED_RX, // select peripheral ID - SPI1 RX
.transfer_size = PDCA_TRANSFER_SIZE_BYTE // select size of the transfer: 8,16,32 bits
};
// PDCA channel for SPI TX
pdca_channel_options_t pdca_options_SPI_TX ={ // pdca channel options
.addr = (void *)&pdcaTxBuf, // memory address.
.size = FS_BUF_SIZE, // transfer size
.r_addr = NULL, // next memory address after 1st transfer complete
.r_size = 0, // next transfer counter not used here
.pid = AVR32_PDCA_CHANNEL_USED_TX, // select peripheral ID - SPI1 TX
.transfer_size = PDCA_TRANSFER_SIZE_BYTE // select size of the transfer: 8,16,32 bits
};
// Init PDCA transmission channel
pdca_init_channel(AVR32_PDCA_CHANNEL_SPI_TX, &pdca_options_SPI_TX);
// Init PDCA Reception channel
pdca_init_channel(AVR32_PDCA_CHANNEL_SPI_RX, &pdca_options_SPI_RX);
}
// intialize resources for bf533 communication: SPI, GPIO
void init_bfin_resources(void) {
static const gpio_map_t BFIN_SPI_GPIO_MAP = {
{ BFIN_SPI_SCK_PIN, BFIN_SPI_SCK_FUNCTION },
{ BFIN_SPI_MISO_PIN, BFIN_SPI_MISO_FUNCTION },
{ BFIN_SPI_MOSI_PIN, BFIN_SPI_MOSI_FUNCTION },
{ BFIN_SPI_NPCS0_PIN, BFIN_SPI_NPCS0_FUNCTION },
};
spi_options_t spiOptions = {
.reg = BFIN_SPI_NPCS,
//// FIXME:
//// would prefer fast baudrate / lower trans delay during boot,
//// but need multiple registers for boot (fast) and run (slow)
//// investigate if this is possible...
// .baudrate = 20000000,
// .baudrate = 10000000,
// .baudrate = 5000000,
.baudrate = 20000000,
.bits = 8,
.spck_delay = 0,
// .trans_delay = 0,
.trans_delay = 20,
.stay_act = 1,
.spi_mode = 1,
.modfdis = 1
};
// assign pins to SPI.
gpio_enable_module(BFIN_SPI_GPIO_MAP,
sizeof(BFIN_SPI_GPIO_MAP) / sizeof(BFIN_SPI_GPIO_MAP[0]));
// intialize as master
spi_initMaster(BFIN_SPI, &spiOptions);
// set selection mode: variable_ps, pcs_decode, delay.
spi_selectionMode(BFIN_SPI, 0, 0, 0);
// enable SPI.
spi_enable(BFIN_SPI);
// intialize the chip register
spi_setupChipReg(BFIN_SPI, &spiOptions, FPBA_HZ);
// enable pulldown on bfin HWAIT line
//// shit! not implemented...
// gpio_enable_pin_pull_down(BFIN_HWAIT_PIN);
// enable pullup on bfin RESET line
gpio_enable_pin_pull_up(BFIN_RESET_PIN);
}
// intialize two-wire interface
void init_twi(void) {
// TWI/I2C GPIO map
static const gpio_map_t TWI_GPIO_MAP = {
{ TWI_DATA_PIN, TWI_DATA_FUNCTION },
{ TWI_CLOCK_PIN, TWI_CLOCK_FUNCTION }
};
gpio_enable_module(TWI_GPIO_MAP, sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0]));
}
// initialize USB host stack
void init_usb_host (void) {
// pm_configure_usb_clock();
uhc_start();
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
sysclk_init();
irq_initialize_vectors();
cpu_irq_enable();
/* Initialize the sleep manager */
sleepmgr_init();
/* Initialize the SAM board */
board_init();
/* Serial line [UART] initialization */
uart1_init(CONF_UART_BAUDRATE);
#if WITH_SERIAL_LINE_INPUT
/* If SLIP-radio is enabled, the handler is overridden. */
uart1_set_input(serial_line_input_byte);
#endif
while(!uart_is_tx_ready(CONSOLE_UART));
/* PRINT Contiki Entry String */
PRINTF("Starting ");
PRINTF(CONTIKI_VERSION_STRING);
/* Configure sys-tick for 1 ms */
clock_init();
/* Initialize Contiki Process function */
process_init();
/* rtimer and ctimer should be initialized before radio duty cycling layers*/
rtimer_init();
/* etimer_process should be initialized before ctimer */
process_start(&etimer_process, NULL);
/* Initialize the ctimer process */
ctimer_init();
#ifdef WITH_LED_DEBUGGING
configure_led_debug_pins();
#ifdef WITH_AR9170_WIFI_SUPPORT
configure_ar9170_disconnect_pins();
#endif
#endif
/* rtimer initialization */
rtimer_init();
/* Network protocol stack initialization */
netstack_init();
/* Process init initialization */
procinit_init();
/* Initialize energy estimation routines */
energest_init();
/* Initialize watch-dog process */
watchdog_start();
#ifdef WITH_AR9170_WIFI_SUPPORT
#ifdef WITH_USB_SUPPORT
/* Start network-related system processes. */
#if WITH_UIP6
#ifdef WITH_SLIP
#warning SLIP_RADIO enabled!
process_start(&slip_radio_process, NULL);
#endif
#endif
#else
#error USB support must be enabled.
#endif
#endif
#ifdef WITH_USB_SUPPORT
/* Start ARM Cortex-M3 USB Host Stack */
uhc_start();
configure_ar9170_disconnect_pins();
#endif
/* Autostart all declared [not system] processes */
//autostart_start(autostart_processes);
#if UIP_CONF_IPV6
printf("Tentative link-local IPv6 address: ");
{
uip_ds6_addr_t *lladdr;
int i;
lladdr = uip_ds6_get_link_local(-1);
for(i = 0; i < 7; ++i) {
printf("%02x%02x:", lladdr->ipaddr.u8[i * 2],
lladdr->ipaddr.u8[i * 2 + 1]);
}
printf("%02x%02x\n", lladdr->ipaddr.u8[14], lladdr->ipaddr.u8[15]);
}
if(!UIP_CONF_IPV6_RPL) {
uip_ipaddr_t ipaddr;
int i;
uip_ip6addr(&ipaddr, 0xaaaa, 0, 0, 0, 0, 0, 0, 0);
uip_ds6_set_addr_iid(&ipaddr, &uip_lladdr);
uip_ds6_addr_add(&ipaddr, 0, ADDR_TENTATIVE);
printf("Tentative global IPv6 address ");
for(i = 0; i < 7; ++i) {
printf("%02x%02x:",
ipaddr.u8[i * 2], ipaddr.u8[i * 2 + 1]);
}
printf("%02x%02x\n",
ipaddr.u8[7 * 2], ipaddr.u8[7 * 2 + 1]);
}
#endif /* UIP_CONF_IPV6 */
PRINTF("Starting Contiki OS main loop...\n");
while(true) {
/* Contiki Polling System */
process_run();
}
}
