TEST(cpu_int16_normalization_lrn_fixedpoint_compilation, cpu_normalization_lrn_)
{
EXPECT_EQ(true, ult_perform_test(
1, //batch_size
13, //feature_map_width
13, //feature_map_height
256, //num_feature_maps
0.0001, //coeff_alpha
0.75, //coeff_beta
2, //coeff_k
8, //input_fraction
8, //output_fraction
NN_NORMALIZATION_MODE_RESPONSE_ACROSS_MAPS));//mode
//// krizhevsky
//EXPECT_EQ(true, ult_perform_test(
// 1, //batch_size
// 13, //feature_map_width
// 13, //feature_map_height
// 256, //num_feature_maps
// 0.0001, //coeff_alpha
// 0.75, //coeff_beta
// 2, //coeff_k
// 8, //input_fraction
// 8, //output_fraction
// NN_NORMALIZATION_MODE_RESPONSE_ACROSS_MAPS));//mode
}
///////////////////////////////////////////////////////////////////////////////////////////////////
// Tests.
TEST(cpu_relu, cpu_relu_test)
{
for (auto batch : { 1, 8, 48 })
for (auto x = 1; x < 7; x++)
for (auto y = 1; y < 7; y++)
for (auto fmaps : { 8, 16, 24, 32 })
EXPECT_EQ(true, ult_perform_test(x, y, fmaps, batch));
}
///////////////////////////////////////////////////////////////////////////////////////////////////
// Tests.
TEST(cpu_int16_convolution_maxpooling2x2_fixedpoint_compilation, cpu_convolution_maxpooling2x2_stride1)
{
//EXPECT_EQ(true, ult_perform_test(32, 32, 4, 4, 3, 3, 1, 1, 2, 2, 2, 2, 16, 0, 0, 0, NN_ACTIVATION_FUNCTION_NONE, NN_POOLING_MODE_MAX));
//EXPECT_EQ(true, ult_perform_test(32, 32, 15, 15, 3, 3, 1, 1, 2, 2, 2, 2, 16, 0, 0, 0, NN_ACTIVATION_FUNCTION_RELU, NN_POOLING_MODE_MAX));
EXPECT_EQ(true, ult_perform_test(32, 64, 16, 16, 3, 3, 1, 1, 2, 2, 2, 2, 16, 0, 0, 0, NN_ACTIVATION_FUNCTION_NONE, NN_POOLING_MODE_MAX));
EXPECT_EQ(true, ult_perform_test(32, 32, 16, 16, 5, 5, 1, 1, 2, 2, 2, 2, 16, 0, 0, 0, NN_ACTIVATION_FUNCTION_RELU, NN_POOLING_MODE_MAX));
//// Overfeat
//// Stage: 1
//EXPECT_EQ(true, ult_perform_test(96, 4, 231, 231, 11, 11, 4, 4, 2, 2, 2, 2, 16, 0, 0, 0, NN_ACTIVATION_FUNCTION_RELU, NN_POOLING_MODE_MAX));
//EXPECT_EQ(true, ult_perform_test(96, 4, 231, 231, 11, 11, 4, 4, 2, 2, 2, 2, 16, 0, 0, 0, NN_ACTIVATION_FUNCTION_NONE, NN_POOLING_MODE_MAX));
//// Stage: 2
//EXPECT_EQ(true, ult_perform_test(256, 96, 28, 28, 5, 5, 1, 1, 2, 2, 2, 2, 16, 0, 0, 0, NN_ACTIVATION_FUNCTION_RELU, NN_POOLING_MODE_MAX));
//// Stage: 5
//EXPECT_EQ(true, ult_perform_test(1024, 1024, 14, 14, 3, 3, 1, 1, 2, 2, 2, 2, 16, 0, 0, 0, NN_ACTIVATION_FUNCTION_RELU, NN_POOLING_MODE_MAX)); // too long
}
///////////////////////////////////////////////////////////////////////////////////////////////////
// Tests.
TEST(cpu_softmax_artificial, cpu_softmax_base)
{
uint32_t batches[] = { 1, 8, 48 };
for (auto batch : batches)
for (uint32_t input_sizes = 1; input_sizes < 256; ++input_sizes)
EXPECT_EQ(true, ult_perform_test(
input_sizes, // input/output width
batch // batch size
));
}
///////////////////////////////////////////////////////////////////////////////////////////////////
// Tests.
TEST(cpu_fullyconnected_artificial, cpu_fullyconnected)
{
NN_ACTIVATION_FUNCTION activations[] = { NN_ACTIVATION_FUNCTION_NONE, NN_ACTIVATION_FUNCTION_RELU };
uint32_t batches[] = { 1, 8, 48 };
uint32_t biases_modes[] = { false, true };
for (auto batch : batches)
for (auto activation : activations)
for (auto bias_mode : biases_modes)
for (uint32_t input_sizes = 1; input_sizes < 20; ++input_sizes)
for (uint32_t output_sizes = 1; output_sizes < 20; ++output_sizes)
EXPECT_EQ(true, ult_perform_test(
input_sizes, // input width
output_sizes, // output width
batch, // batch size
bias_mode, // bias in output
activation)); // activation function
}
