int uniphier_pro4_umc_init(const struct uniphier_board_data *bd) { void __iomem *umc_base = (void __iomem *)0x5b800000; void __iomem *ca_base = umc_base + 0x00001000; void __iomem *dc_base = umc_base + 0x00400000; void __iomem *ssif_base = umc_base; int ch, ret; for (ch = 0; ch < DRAM_CH_NR; ch++) { ret = umc_ch_init(dc_base, ca_base, bd->dram_freq, bd->dram_ch[ch].size, bd->dram_ch[ch].width, !!(bd->flags & UNIPHIER_BD_DDR3PLUS)); if (ret) { pr_err("failed to initialize UMC ch%d\n", ch); return ret; } ca_base += 0x00001000; dc_base += 0x00200000; } umc_start_ssif(ssif_base); return 0; }
static int umc_init_sub(int freq, int size_ch0, int size_ch1) { void __iomem *ssif_base = (void __iomem *)UMC_SSIF_BASE; void __iomem *ca_base0 = (void __iomem *)UMC_CA_BASE(0); void __iomem *ca_base1 = (void __iomem *)UMC_CA_BASE(1); void __iomem *dramcont0 = (void __iomem *)UMC_DRAMCONT_BASE(0); void __iomem *dramcont1 = (void __iomem *)UMC_DRAMCONT_BASE(1); void __iomem *phy0_0 = (void __iomem *)DDRPHY_BASE(0, 0); void __iomem *phy0_1 = (void __iomem *)DDRPHY_BASE(0, 1); void __iomem *phy1_0 = (void __iomem *)DDRPHY_BASE(1, 0); void __iomem *phy1_1 = (void __iomem *)DDRPHY_BASE(1, 1); umc_dram_init_start(dramcont0); umc_dram_init_start(dramcont1); umc_dram_init_poll(dramcont0); umc_dram_init_poll(dramcont1); writel(0x00000101, dramcont0 + UMC_DIOCTLA); ddrphy_init(phy0_0, freq, size_ch0); ddrphy_prepare_training(phy0_0, 0); ddrphy_training(phy0_0); writel(0x00000103, dramcont0 + UMC_DIOCTLA); ddrphy_init(phy0_1, freq, size_ch0); ddrphy_prepare_training(phy0_1, 1); ddrphy_training(phy0_1); writel(0x00000101, dramcont1 + UMC_DIOCTLA); ddrphy_init(phy1_0, freq, size_ch1); ddrphy_prepare_training(phy1_0, 0); ddrphy_training(phy1_0); writel(0x00000103, dramcont1 + UMC_DIOCTLA); ddrphy_init(phy1_1, freq, size_ch1); ddrphy_prepare_training(phy1_1, 1); ddrphy_training(phy1_1); umc_dramcont_init(dramcont0, ca_base0, size_ch0, freq); umc_dramcont_init(dramcont1, ca_base1, size_ch1, freq); umc_start_ssif(ssif_base); return 0; }
static inline int umc_init_sub(int freq, int size_ch0, int size_ch1) { void __iomem *ssif_base = (void __iomem *)UMC_SSIF_BASE; void __iomem *ca_base0 = (void __iomem *)UMC_CA_BASE(0); void __iomem *ca_base1 = (void __iomem *)UMC_CA_BASE(1); void __iomem *dramcont0 = (void __iomem *)UMC_DRAMCONT_BASE(0); void __iomem *dramcont1 = (void __iomem *)UMC_DRAMCONT_BASE(1); umc_dram_init_start(dramcont0); umc_dram_init_start(dramcont1); umc_dram_init_poll(dramcont0); umc_dram_init_poll(dramcont1); writel(0x00000101, dramcont0 + UMC_DIOCTLA); writel(0x00000101, dramcont1 + UMC_DIOCTLA); umc_dramcont_init(dramcont0, ca_base0, size_ch0, freq); umc_dramcont_init(dramcont1, ca_base1, size_ch1, freq); umc_start_ssif(ssif_base); return 0; }