void up_decodeirq(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS board_led_on(LED_INIRQ); lowsyslog(LOG_ERR, "Unexpected IRQ\n"); current_regs = regs; PANIC(); #else unsigned int irq; /* Read the IRQ number from the IVR register (Could probably get the same * info from CIC register without the setup). */ board_led_on(LED_INIRQ); irq = getreg32(STR71X_EIC_IVR); /* Verify that the resulting IRQ number is valid */ if (irq < NR_IRQS) { uint32_t* savestate; /* Current regs non-zero indicates that we are processing an interrupt; * current_regs is also used to manage interrupt level context switches. */ savestate = (uint32_t*)current_regs; current_regs = regs; /* Acknowledge the interrupt */ up_ack_irq(irq); /* Deliver the IRQ */ irq_dispatch(irq, regs); /* Restore the previous value of current_regs. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ current_regs = savestate; } #ifdef CONFIG_DEBUG else { PANIC(); /* Normally never happens */ } #endif board_led_off(LED_INIRQ); #endif }
static void lpc23xx_decodeirq(uint32_t *regs) #endif { #ifdef CONFIG_SUPPRESS_INTERRUPTS PANIC(); err("ERROR: Unexpected IRQ\n"); CURRENT_REGS = regs; #else /* Check which IRQ fires */ uint32_t irqbits = vic_getreg(VIC_IRQSTATUS_OFFSET) & 0xFFFFFFFF; unsigned int irq; for (irq = 0; irq < NR_IRQS; irq++) { if (irqbits & (uint32_t) (1 << irq)) break; } /* Verify that the resulting IRQ number is valid */ if (irq < NR_IRQS) /* redundant check ?? */ { uint32_t *savestate; /* Current regs non-zero indicates that we are processing an interrupt; * CURRENT_REGS is also used to manage interrupt level context switches. */ savestate = (uint32_t *)CURRENT_REGS; CURRENT_REGS = regs; /* Acknowledge the interrupt */ up_ack_irq(irq); /* Deliver the IRQ */ irq_dispatch(irq, regs); /* Restore the previous value of CURRENT_REGS. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ CURRENT_REGS = savestate; } #endif }
FAR chipreg_t *up_doirq(int irq, FAR chipreg_t *regs) { FAR chipreg_t *ret = regs; board_led_on(LED_INIRQ); #ifdef CONFIG_SUPPRESS_INTERRUPTS PANIC(); #else if ((unsigned)irq < NR_IRQS) { FAR chipreg_t *savestate; /* Nested interrupts are not supported in this implementation. If * you want to implement nested interrupts, you would have to (1) change * the way that current_regs is handled and (2) the design associated * with CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not * work for that purpose as implemented here because only the outermost * nested interrupt can result in a context switch (it can probably be * deleted). */ /* Current regs non-zero indicates that we are processing * an interrupt; current_regs is also used to manage * interrupt level context switches. */ savestate = (FAR chipreg_t *)current_regs; current_regs = regs; /* Acknowledge the interrupt */ up_ack_irq(irq); /* Deliver the IRQ */ irq_dispatch(irq, regs); /* Restore the previous value of current_regs. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ ret = current_regs; current_regs = savestate; } board_led_off(LED_INIRQ); #endif return ret; }
uint32_t *up_doirq(int irq, uint32_t *regs) { board_led_on(LED_INIRQ); #ifdef CONFIG_SUPPRESS_INTERRUPTS PANIC(); #else uint32_t *savestate; /* Nested interrupts are not supported in this implementation. If you want * to implement nested interrupts, you would have to (1) change the way that * current_regs is handled and (2) the design associated with * CONFIG_ARCH_INTERRUPTSTACK. The savestate variable will not work for * that purpose as implemented here because only the outermost nested * interrupt can result in a context switch (it can probably be deleted). */ /* Current regs non-zero indicates that we are processing an interrupt; * current_regs is also used to manage interrupt level context switches. */ savestate = (uint32_t*)current_regs; current_regs = regs; /* Acknowledge the interrupt */ up_ack_irq(irq); /* Deliver the IRQ */ irq_dispatch(irq, regs); /* If a context switch occurred while processing the interrupt then * current_regs may have change value. If we return any value different * from the input regs, then the lower level will know that a context * switch occurred during interrupt processing. */ regs = (uint32_t*)current_regs; /* Restore the previous value of current_regs. NULL would indicate that * we are no longer in an interrupt handler. It will be non-NULL if we * are returning from a nested interrupt. */ current_regs = savestate; #endif board_led_off(LED_INIRQ); return regs; }
void up_decodeirq(uint32_t *regs) { vic_vector_t vector = (vic_vector_t) vic_getreg(VIC_ADDRESS_OFFSET); /* Acknowledge the interrupt */ up_ack_irq(irq); /* Valid Interrupt */ if (vector != NULL) { (vector)(regs); } }
void up_decodeirq(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS CURRENT_REGS = regs; err("ERROR: Unexpected IRQ\n"); PANIC(); #else int index; int irq; /* Read the IRQ vector status register. Bits 3-10 provide the IRQ number * of the interrupt (the TABLE_ADDR was initialized to zero, so the * following masking should be unnecessary) */ index = getreg32(LPC31_INTC_VECTOR0) & INTC_VECTOR_INDEX_MASK; if (index != 0) { /* Shift the index so that the range of IRQ numbers are in bits 0-7 (values * 1-127) and back off the IRQ number by 1 so that the numbering is zero-based */ irq = (index >> INTC_VECTOR_INDEX_SHIFT) -1; /* Verify that the resulting IRQ number is valid */ if ((unsigned)irq < NR_IRQS) { /* Acknowledge the interrupt */ up_ack_irq(irq); /* Current regs non-zero indicates that we are processing an interrupt; * CURRENT_REGS is also used to manage interrupt level context switches. * * Nested interrupts are not supported. */ DEBUGASSERT(CURRENT_REGS == NULL); CURRENT_REGS = regs; /* Deliver the IRQ */ irq_dispatch(irq, regs); #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * CURRENT_REGS will have a different value than it did on entry. * If an interrupt level context switch has occurred, then restore * the floating point state and the establish the correct address * environment before returning from the interrupt. */ if (regs != CURRENT_REGS) { #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ up_restorefpu((uint32_t *)CURRENT_REGS); #endif #ifdef CONFIG_ARCH_ADDRENV /* Make sure that the address environment for the previously * running task is closed down gracefully (data caches dump, * MMU flushed) and set up the address environment for the new * thread at the head of the ready-to-run list. */ (void)group_addrenv(NULL); #endif } #endif /* Set CURRENT_REGS to NULL to indicate that we are no longer in an * interrupt handler. */ CURRENT_REGS = NULL; } }