/*******************************************************************************
**
** Function hw_lpm_enable
**
** Description Enalbe/Disable LPM
**
** Returns TRUE/FALSE
**
*******************************************************************************/
uint8_t hw_lpm_enable(uint8_t turn_on)
{
HC_BT_HDR *p_buf = NULL;
uint8_t *p;
uint8_t ret = FALSE;
if (bt_vendor_cbacks)
p_buf = (HC_BT_HDR *) bt_vendor_cbacks->alloc(BT_HC_HDR_SIZE + \
HCI_CMD_PREAMBLE_SIZE + \
LPM_CMD_PARAM_SIZE);
if (p_buf)
{
p_buf->event = MSG_STACK_TO_HC_HCI_CMD;
p_buf->offset = 0;
p_buf->layer_specific = 0;
p_buf->len = HCI_CMD_PREAMBLE_SIZE + LPM_CMD_PARAM_SIZE;
p = (uint8_t *) (p_buf + 1);
UINT16_TO_STREAM(p, HCI_VSC_WRITE_SLEEP_MODE);
*p++ = LPM_CMD_PARAM_SIZE; /* parameter length */
if (turn_on)
{
memcpy(p, &lpm_param, LPM_CMD_PARAM_SIZE);
upio_set(UPIO_LPM_MODE, UPIO_ASSERT, 0);
}
else
{
memset(p, 0, LPM_CMD_PARAM_SIZE);
upio_set(UPIO_LPM_MODE, UPIO_DEASSERT, 0);
}
if ((ret = bt_vendor_cbacks->xmit_cb(HCI_VSC_WRITE_SLEEP_MODE, p_buf, \
hw_lpm_ctrl_cback)) == FALSE)
{
bt_vendor_cbacks->dealloc(p_buf);
}
}
if ((ret == FALSE) && bt_vendor_cbacks)
bt_vendor_cbacks->lpm_cb(BT_VND_OP_RESULT_FAIL);
return ret;
}
/*******************************************************************************
**
** Function hw_lpm_set_wake_state
**
** Description Assert/Deassert BT_WAKE
**
** Returns None
**
*******************************************************************************/
void hw_lpm_set_wake_state(uint8_t wake_assert)
{
uint8_t state = (wake_assert) ? UPIO_ASSERT : UPIO_DEASSERT;
upio_set(UPIO_BT_WAKE, state, lpm_param.bt_wake_polarity);
}
