示例#1
0
/** Returns a lower bound on the number of bytes in the DMA receive buffer.
 * Also checks for buffer overrun conditions.
 * \param s The USART DMA state structure.
 */
u32 usart_n_read_dma(usart_rx_dma_state* s)
{
  s32 n_read = s->rd_wraps * USART_RX_BUFFER_LEN + s->rd;
  s32 n_written = (s->wr_wraps + 1) * USART_RX_BUFFER_LEN - \
                  DMA_SNDTR(s->dma, s->stream);
  s32 n_available = n_written - n_read;

  if (n_available < 0)
    /* This strange and rare case occurs when NDTR has rolled over but the flag
     * hasn't been raised yet and thus n_wraps hasn't been incremented in the
     * ISR. Simply return 0 this time and the next time this function is called
     * (or at some point) the interrupt will have been triggered and the number
     * of bytes available in the buffer will be a sane amount. */
    n_available = 0;
  else if (n_available > USART_RX_BUFFER_LEN) {
    /* If greater than a whole buffer then we have had an overflow. */
    printf("ERROR: DMA RX buffer overrun\n");
    n_available = 0;
    s->errors++;
    /* Disable and re-enable the DMA channel to get back to a known good
     * state */
    usart_rx_dma_disable(s);
    usart_rx_dma_setup(s, s->usart, s->dma, s->stream, s->channel);
  }

  return n_available;
}
示例#2
0
/** Enable the USART peripherals.
 * USART 6, 1 and 3 peripherals are configured
 * (connected to the FTDI, UARTA and UARTB ports on the Piksi respectively).
 */
void usarts_enable(u32 ftdi_baud, u32 uarta_baud, u32 uartb_baud, bool do_preconfigure_hooks)
{

  /* Ensure that the first time around, we do the preconfigure hooks */
  if (!all_uarts_enabled && !do_preconfigure_hooks)
    return;

  /* First give everything a clock. */

  /* Clock the USARTs. */
  RCC_APB2ENR |= RCC_APB2ENR_USART1EN | RCC_APB2ENR_USART6EN;
  RCC_APB1ENR |= RCC_APB1ENR_USART3EN;

  /* GPIO pins corresponding to the USART. */
  RCC_AHB1ENR |= RCC_AHB1ENR_IOPAEN | RCC_AHB1ENR_IOPCEN;

  /* Assign the GPIO pins appropriately:
   *
   * USART   TX    RX  Connection
   * ----------------------------
   * 6      PC6   PC7  FTDI
   * 1      PA9  PA10  UARTA
   * 3     PC10  PC11  UARTB
   */

  gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO6 | GPIO7);
  gpio_set_af(GPIOC, GPIO_AF8, GPIO6 | GPIO7);

  gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO9 | GPIO10);
  gpio_set_af(GPIOA, GPIO_AF7, GPIO9 | GPIO10);

  gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO10 | GPIO11);
  gpio_set_af(GPIOC, GPIO_AF7, GPIO10 | GPIO11);

  usart_set_parameters(USART6, ftdi_baud);
  usart_set_parameters(USART1, uarta_baud);
  usart_set_parameters(USART3, uartb_baud);

  /* FTDI (USART6) TX - DMA2, stream 6, channel 5. */
  usart_tx_dma_setup(&ftdi_state.tx, USART6, DMA2, 6, 5);
  /* FTDI (USART6) RX - DMA2, stream 1, channel 5. */
  usart_rx_dma_setup(&ftdi_state.rx, USART6, DMA2, 1, 5);
  chBSemInit(&ftdi_state.claimed, FALSE);
  ftdi_state.configured = true;

  if (do_preconfigure_hooks) {

    /* TODO: Should this really be here? */
    if ((RCC_CSR & 0xFF000000) != RCC_CSR_PINRSTF) {
      if (RCC_CSR & RCC_CSR_IWDGRSTF)
        log_error("Piksi has reset due to a watchdog timeout.");
      if (RCC_CSR & RCC_CSR_LPWRRSTF)
        log_error("Low power reset detected.");
      if (RCC_CSR & RCC_CSR_SFTRSTF)
        log_info("Software reset detected.");
      log_info("Reset reason: %02X", (unsigned int)(RCC_CSR >> 24));
    }
    log_info("Piksi Starting...");
    RCC_CSR |= RCC_CSR_RMVF;
    log_info("Firmware Version: " GIT_VERSION "");
    log_info("Built: " __DATE__ " " __TIME__ "");

    if (uarta_usart.configure_telemetry_radio_on_boot) {
      radio_preconfigure_hook(USART1, uarta_baud, "UARTA");
    }
    if (uartb_usart.configure_telemetry_radio_on_boot) {
      radio_preconfigure_hook(USART3, uartb_baud, "UARTB");
    }
  }

  /* UARTA (USART1) TX - DMA2, stream 7, channel 4. */
  usart_tx_dma_setup(&uarta_state.tx, USART1, DMA2, 7, 4);
  /* UARTA (USART1) RX - DMA2, stream 2, channel 4. */
  usart_rx_dma_setup(&uarta_state.rx, USART1, DMA2, 2, 4);
  chBSemInit(&uarta_state.claimed, FALSE);
  uarta_state.configured = true;

  /* UARTB (USART3) TX - DMA1, stream 3, channel 4. */
  usart_tx_dma_setup(&uartb_state.tx, USART3, DMA1, 3, 4);
  /* UARTB (USART3) RX - DMA1, stream 1, channel 4. */
  usart_rx_dma_setup(&uartb_state.rx, USART3, DMA1, 1, 4);
  chBSemInit(&uartb_state.claimed, FALSE);
  uartb_state.configured = true;

  all_uarts_enabled = true;

}