/*
* NEC480Restore --
*/
static void
NEC480Restore(vgaNEC480Ptr restore)
{
vgaHWRestore((vgaHWPtr)restore);
}
void
s3CleanUp(void)
{
int i;
unsigned char tmp;
outb(vgaCRIndex, 0x39);
outb(vgaCRReg, 0xa5);
if (s3MmioMem != NULL ) {
WaitIdle();
VerticalRetraceWait();
((mmtr)s3MmioMem)->memport_regs.regs.fifo_control = oldS3->fifo[0];
WaitIdle(); /* Don't ask... */
((mmtr)s3MmioMem)->memport_regs.regs.streams_timeout = oldS3->fifo[1];
}
#if 1
/* This seems to help, but maybe a wait for */
/* VSYNC would be better than WaitIdleEmpty(). */
/* STREAMS disable code, for 24 & 32 Bpp */
if ( ( s3InfoRec.bitsPerPixel == 32 ||
s3InfoRec.bitsPerPixel == 24 ) &&
s3MmioMem != NULL ) {
/* temp - KJB */
((mmtr)s3MmioMem)->streams_regs.regs.prim_fbaddr0 = 0;
/* ((y * s3DisplayWidth + (x & ~3)) * s3Bpp) */ /* & ~3 */;
/* end temp */
outb(vgaCRIndex, 0x67);
tmp = inb(vgaCRReg);
/* WaitIdleEmpty(); */
/* Disable STREAMS processor */
outb( vgaCRReg, tmp & ~0x0C );
}
#endif
vgaProtect(TRUE);
if (s3NewMmio) {
outb (vgaCRIndex, 0x58);
outb (vgaCRReg, s3SAM256); /* disable linear mode */
} /* end BL */
WaitQueue(8);
outb(vgaCRIndex, 0x35);
tmp = inb(vgaCRReg);
outb(vgaCRReg, (tmp & 0xf0));
cebank();
if (s3NewMmio) {
outb(vgaCRIndex, 0x53);
outb(vgaCRReg, 0x00);
}
/* Restore S3 Trio32/64 ext. sequenzer (PLL) registers */
if (DAC_IS_TRIO)
{
outb(0x3c2, oldS3->Trio[0]);
outb(0x3c4, 0x08); outb(0x3c5, 0x06);
outb(0x3c4, 0x09); outb(0x3c5, oldS3->Trio[2]);
outb(0x3c4, 0x0a); outb(0x3c5, oldS3->Trio[3]);
outb(0x3c4, 0x0b); outb(0x3c5, oldS3->Trio[4]);
outb(0x3c4, 0x0d); outb(0x3c5, oldS3->Trio[5]);
outb(0x3c4, 0x10); outb(0x3c5, oldS3->Trio[8]);
outb(0x3c4, 0x11); outb(0x3c5, oldS3->Trio[9]);
outb(0x3c4, 0x12); outb(0x3c5, oldS3->Trio[10]);
outb(0x3c4, 0x13); outb(0x3c5, oldS3->Trio[11]);
outb(0x3c4, 0x1a); outb(0x3c5, oldS3->Trio[12]);
outb(0x3c4, 0x1b); outb(0x3c5, oldS3->Trio[13]);
outb(0x3c4, 0x15);
tmp = inb(0x3c5) & ~0x21;
outb(0x3c5, tmp | 0x03);
outb(0x3c5, tmp | 0x23);
outb(0x3c5, tmp | 0x03);
outb(0x3c4, 0x15); outb(0x3c5, oldS3->Trio[6]);
outb(0x3c4, 0x18); outb(0x3c5, oldS3->Trio[7]);
outb(0x3c4, 0x08); outb(0x3c5, oldS3->Trio[1]);
}
/* restore s3 special bits */
/* restore 801 specific registers */
for (i = 32; i < 46; i++) {
outb(vgaCRIndex, 0x40 + i);
outb(vgaCRReg, oldS3->s3sysreg[i]);
}
for (i = 0; i < 16; i++) {
if (!((1 << i) & reg50_mask))
continue;
outb(vgaCRIndex, 0x50 + i);
outb(vgaCRReg, oldS3->s3sysreg[i + 16]);
}
for (i = 0; i < 5; i++) {
outb(vgaCRIndex, 0x30 + i);
outb(vgaCRReg, oldS3->s3reg[i]);
outb(vgaCRIndex, 0x38 + i);
outb(vgaCRReg, oldS3->s3reg[5 + i]);
}
outb(vgaCRIndex, 0x36);
outb(vgaCRReg, oldS3->s3reg[10]);
for (i = 0; i < 16; i++) {
outb(vgaCRIndex, 0x40 + i);
outb(vgaCRReg, oldS3->s3sysreg[i]);
}
outb(vgaCRIndex, 0x45);
inb(vgaCRReg); /* reset color stack pointer */
outb(vgaCRIndex, 0x4A);
for (i = 0; i < 4; i++)
outb(vgaCRReg, oldS3->ColorStack[i]);
outb(vgaCRIndex, 0x45);
inb(vgaCRReg); /* reset color stack pointer */
outb(vgaCRIndex, 0x4B);
for (i = 4; i < 8; i++)
outb(vgaCRReg, oldS3->ColorStack[i]);
if (OFLG_ISSET(CLOCK_OPTION_ICS2595, &s3InfoRec.clockOptions)){
outb(vgaCRIndex, 0x42);
outb(vgaCRReg, (oldS3->s3sysreg[2] & 0xf0) | 0x01);
outb(vgaCRIndex, 0x5c); /* switch back to 28MHz clock */
outb(vgaCRReg, 0x20);
outb(vgaCRReg, 0x00);
}
vgaHWRestore((vgaHWPtr)oldS3);
outb(0x3c2, old_clock);
i = inb(0x3CC);
if (savedVgaIOBase == 0x3B0)
i &= 0xFE;
else
i |= 0x01;
outb(0x3C2, i);
vgaIOBase = savedVgaIOBase;
vgaCRIndex = vgaIOBase + 4;
vgaCRReg = vgaIOBase + 5;
vgaProtect(FALSE);
#ifdef PC98
crtswitch(0);
#endif
xf86DisableIOPorts(s3InfoRec.scrnIndex);
}
void
SMILynx_WriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, SMIRegPtr restore)
{
SMIPtr pSmi = SMIPTR(pScrn);
int i;
CARD8 tmp;
CARD32 offset;
vgaHWPtr hwp = VGAHWPTR(pScrn);
int vgaIOBase = hwp->IOBase;
int vgaCRIndex = vgaIOBase + VGA_CRTC_INDEX_OFFSET;
int vgaCRData = vgaIOBase + VGA_CRTC_DATA_OFFSET;
ENTER();
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x17, restore->SR17);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x18, restore->SR18);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x20, restore->SR20);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21, restore->SR21);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x22, restore->SR22);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x23, restore->SR23);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x24, restore->SR24);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x31, restore->SR31);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x32, restore->SR32);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x66, restore->SR66);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x68, restore->SR68);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x69, restore->SR69);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6A, restore->SR6A);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6B, restore->SR6B);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6C, restore->SR6C);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6D, restore->SR6D);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x81, restore->SR81);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0xA0, restore->SRA0);
if (pSmi->useBIOS && restore->mode != 0){
pSmi->pInt10->num = 0x10;
pSmi->pInt10->ax = restore->mode | 0x80;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting mode 0x%02X\n",
restore->mode);
xf86ExecX86int10(pSmi->pInt10);
/* Enable linear mode. */
outb(pSmi->PIOBase + VGA_SEQ_INDEX, 0x18);
tmp = inb(pSmi->PIOBase + VGA_SEQ_DATA);
outb(pSmi->PIOBase + VGA_SEQ_DATA, tmp | 0x01);
/* Enable DPR/VPR registers. */
tmp = VGAIN8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21, tmp & ~0x03);
} else {
/* Restore the standard VGA registers */
vgaHWRestore(pScrn, vgaSavePtr, VGA_SR_ALL);
if (restore->smiDACMask) {
VGAOUT8(pSmi, VGA_DAC_MASK, restore->smiDACMask);
} else {
VGAOUT8(pSmi, VGA_DAC_MASK, 0xFF);
}
VGAOUT8(pSmi, VGA_DAC_WRITE_ADDR, 0);
for (i = 0; i < 256; i++) {
VGAOUT8(pSmi, VGA_DAC_DATA, restore->smiDacRegs[i][0]);
VGAOUT8(pSmi, VGA_DAC_DATA, restore->smiDacRegs[i][1]);
VGAOUT8(pSmi, VGA_DAC_DATA, restore->smiDacRegs[i][2]);
}
for (i = 0, offset = 2; i < 8192; i++, offset += 8) {
*(pSmi->FBBase + offset) = restore->smiFont[i];
}
if (SMI_LYNXM_SERIES(pSmi->Chipset)) {
/* Restore secondary registers */
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x9E,
restore->CR90[14] | 0x20);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x33, restore->CR33_2);
for (i = 0; i < 14; i++) {
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x40 + i,
restore->CR40_2[i]);
}
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x9F, restore->CR9F_2);
/* Restore primary registers */
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x9E,
restore->CR90[14] & ~0x20);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x33, restore->CR33);
for (i = 0; i < 14; i++) {
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x40 + i,
restore->CR40[i]);
}
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x9F, restore->CR9F);
/* Restore common registers */
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x30, restore->CR30);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x3A, restore->CR3A);
for (i = 0; i < 15; i++)
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x90 + i,
restore->CR90[i]);
for (i = 0; i < 14; i++)
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0xA0 + i,
restore->CRA0[i]);
}else{
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x30, restore->CR30);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x33, restore->CR33);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x3A, restore->CR3A);
for (i = 0; i < 14; i++) {
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x40 + i,
restore->CR40[i]);
}
}
if (pSmi->Dualhead) {
/* dualhead stuff */
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x40, restore->SR40);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x41, restore->SR41);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x42, restore->SR42);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x43, restore->SR43);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x44, restore->SR44);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x45, restore->SR45);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x48, restore->SR48);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x49, restore->SR49);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x4A, restore->SR4A);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x4B, restore->SR4B);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x4C, restore->SR4C);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x50, restore->SR50);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x51, restore->SR51);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x52, restore->SR52);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x53, restore->SR53);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x54, restore->SR54);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x55, restore->SR55);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x56, restore->SR56);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x57, restore->SR57);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x5A, restore->SR5A);
/* PLL2 stuff */
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6E, restore->SR6E);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6F, restore->SR6F);
}
}
/* Reset the graphics engine */
WRITE_DPR(pSmi, 0x10, restore->DPR10);
WRITE_DPR(pSmi, 0x1C, restore->DPR1C);
WRITE_DPR(pSmi, 0x20, restore->DPR20);
WRITE_DPR(pSmi, 0x24, restore->DPR24);
WRITE_DPR(pSmi, 0x28, restore->DPR28);
WRITE_DPR(pSmi, 0x2C, restore->DPR2C);
WRITE_DPR(pSmi, 0x30, restore->DPR30);
WRITE_DPR(pSmi, 0x3C, restore->DPR3C);
WRITE_DPR(pSmi, 0x40, restore->DPR40);
WRITE_DPR(pSmi, 0x44, restore->DPR44);
/* write video controller regs */
WRITE_VPR(pSmi, 0x00, restore->VPR00);
WRITE_VPR(pSmi, 0x0C, restore->VPR0C);
WRITE_VPR(pSmi, 0x10, restore->VPR10);
if(pSmi->Chipset == SMI_COUGAR3DR) {
WRITE_FPR(pSmi, FPR00, restore->FPR00_);
WRITE_FPR(pSmi, FPR0C, restore->FPR0C_);
WRITE_FPR(pSmi, FPR10, restore->FPR10_);
}
WRITE_CPR(pSmi, 0x00, restore->CPR00);
if (xf86GetVerbosity() > 1) {
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, VERBLEV,
"Done restoring mode. Register dump:\n");
SMI_PrintRegs(pScrn);
}
vgaHWProtect(pScrn, FALSE);
LEAVE();
}
