/*
* Description: vnt_set_deep_sleep
*
* Parameters:
* In:
* priv - Device Structure
* Out:
* none
*
* Return Value: none
*
*/
int vnt_set_deep_sleep(struct vnt_private *priv)
{
int ret = 0;
/* CR12 */
ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);
if (ret)
return ret;
/* CR13 */
return vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0xB9);
}
void vnt_set_vga_gain_offset(struct vnt_private *priv, u8 data)
{
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
/* patch for 3253B0 Baseband with Cardbus module */
if (priv->short_slot_time)
priv->bb_rx_conf &= 0xdf; /* 1101 1111 */
else
priv->bb_rx_conf |= 0x20; /* 0010 0000 */
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->bb_rx_conf);
}
void vnt_set_bss_mode(struct vnt_private *priv)
{
if (priv->rf_type == RF_AIROHA7230 && priv->bb_type == BB_TYPE_11A)
vnt_mac_set_bb_type(priv, BB_TYPE_11G);
else
vnt_mac_set_bb_type(priv, priv->bb_type);
priv->packet_type = vnt_get_pkt_type(priv);
if (priv->bb_type == BB_TYPE_11A)
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x03);
else if (priv->bb_type == BB_TYPE_11B)
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x02);
else if (priv->bb_type == BB_TYPE_11G)
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x08);
vnt_update_ifs(priv);
vnt_set_rspinf(priv, (u8)priv->bb_type);
if (priv->bb_type == BB_TYPE_11A) {
if (priv->rf_type == RF_AIROHA7230) {
priv->bb_vga[0] = 0x20;
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG,
0xe7, priv->bb_vga[0]);
}
priv->bb_vga[2] = 0x10;
priv->bb_vga[3] = 0x10;
} else {
if (priv->rf_type == RF_AIROHA7230) {
priv->bb_vga[0] = 0x1c;
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG,
0xe7, priv->bb_vga[0]);
}
priv->bb_vga[2] = 0x0;
priv->bb_vga[3] = 0x0;
}
vnt_set_vga_gain_offset(priv, priv->bb_vga[0]);
}
/*
* Description: Set ShortSlotTime mode
*
* Parameters:
* In:
* priv - Device Structure
* Out:
* none
*
* Return Value: none
*
*/
void vnt_set_short_slot_time(struct vnt_private *priv)
{
u8 bb_vga = 0;
if (priv->short_slot_time)
priv->bb_rx_conf &= 0xdf;
else
priv->bb_rx_conf |= 0x20;
vnt_control_in_u8(priv, MESSAGE_REQUEST_BBREG, 0xe7, &bb_vga);
if (bb_vga == priv->bb_vga[0])
priv->bb_rx_conf |= 0x20;
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->bb_rx_conf);
}
/*
* Description: Set NIC media channel
*
* Parameters:
* In:
* pDevice - The adapter to be set
* connection_channel - Channel to be set
* Out:
* none
*/
void vnt_set_channel(struct vnt_private *priv, u32 connection_channel)
{
if (connection_channel > CB_MAX_CHANNEL || !connection_channel)
return;
/* clear NAV */
vnt_mac_reg_bits_on(priv, MAC_REG_MACCR, MACCR_CLRNAV);
/* Set Channel[7] = 0 to tell H/W channel is changing now. */
vnt_mac_reg_bits_off(priv, MAC_REG_CHANNEL, 0xb0);
vnt_control_out(priv, MESSAGE_TYPE_SELECT_CHANNEL,
connection_channel, 0, 0, NULL);
vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG, MAC_REG_CHANNEL,
(u8)(connection_channel | 0x80));
}
/*
* Description: Set ShortSlotTime mode
*
* Parameters:
* In:
* priv - Device Structure
* Out:
* none
*
* Return Value: none
*
*/
int vnt_set_short_slot_time(struct vnt_private *priv)
{
int ret = 0;
u8 bb_vga = 0;
if (priv->short_slot_time)
priv->bb_rx_conf &= 0xdf;
else
priv->bb_rx_conf |= 0x20;
ret = vnt_control_in_u8(priv, MESSAGE_REQUEST_BBREG, 0xe7, &bb_vga);
if (ret)
goto end;
if (bb_vga == priv->bb_vga[0])
priv->bb_rx_conf |= 0x20;
ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a,
priv->bb_rx_conf);
end:
return ret;
}
/*
* initialization of MAC & BBP registers
*/
static int vnt_init_registers(struct vnt_private *priv)
{
struct vnt_cmd_card_init *init_cmd = &priv->init_command;
struct vnt_rsp_card_init *init_rsp = &priv->init_response;
u8 antenna;
int ii;
int status = STATUS_SUCCESS;
u8 tmp;
u8 calib_tx_iq = 0, calib_tx_dc = 0, calib_rx_iq = 0;
dev_dbg(&priv->usb->dev, "---->INIbInitAdapter. [%d][%d]\n",
DEVICE_INIT_COLD, priv->packet_type);
if (!vnt_check_firmware_version(priv)) {
if (vnt_download_firmware(priv) == true) {
if (vnt_firmware_branch_to_sram(priv) == false) {
dev_dbg(&priv->usb->dev,
" vnt_firmware_branch_to_sram fail\n");
return false;
}
} else {
dev_dbg(&priv->usb->dev, "FIRMWAREbDownload fail\n");
return false;
}
}
if (!vnt_vt3184_init(priv)) {
dev_dbg(&priv->usb->dev, "vnt_vt3184_init fail\n");
return false;
}
init_cmd->init_class = DEVICE_INIT_COLD;
init_cmd->exist_sw_net_addr = priv->exist_sw_net_addr;
for (ii = 0; ii < 6; ii++)
init_cmd->sw_net_addr[ii] = priv->current_net_addr[ii];
init_cmd->short_retry_limit = priv->short_retry_limit;
init_cmd->long_retry_limit = priv->long_retry_limit;
/* issue card_init command to device */
status = vnt_control_out(priv,
MESSAGE_TYPE_CARDINIT, 0, 0,
sizeof(struct vnt_cmd_card_init), (u8 *)init_cmd);
if (status != STATUS_SUCCESS) {
dev_dbg(&priv->usb->dev, "Issue Card init fail\n");
return false;
}
status = vnt_control_in(priv, MESSAGE_TYPE_INIT_RSP, 0, 0,
sizeof(struct vnt_rsp_card_init), (u8 *)init_rsp);
if (status != STATUS_SUCCESS) {
dev_dbg(&priv->usb->dev,
"Cardinit request in status fail!\n");
return false;
}
/* local ID for AES functions */
status = vnt_control_in(priv, MESSAGE_TYPE_READ,
MAC_REG_LOCALID, MESSAGE_REQUEST_MACREG, 1,
&priv->local_id);
if (status != STATUS_SUCCESS)
return false;
/* do MACbSoftwareReset in MACvInitialize */
priv->top_ofdm_basic_rate = RATE_24M;
priv->top_cck_basic_rate = RATE_1M;
/* target to IF pin while programming to RF chip */
priv->power = 0xFF;
priv->cck_pwr = priv->eeprom[EEP_OFS_PWR_CCK];
priv->ofdm_pwr_g = priv->eeprom[EEP_OFS_PWR_OFDMG];
/* load power table */
for (ii = 0; ii < 14; ii++) {
priv->cck_pwr_tbl[ii] =
priv->eeprom[ii + EEP_OFS_CCK_PWR_TBL];
if (priv->cck_pwr_tbl[ii] == 0)
priv->cck_pwr_tbl[ii] = priv->cck_pwr;
priv->ofdm_pwr_tbl[ii] =
priv->eeprom[ii + EEP_OFS_OFDM_PWR_TBL];
if (priv->ofdm_pwr_tbl[ii] == 0)
priv->ofdm_pwr_tbl[ii] = priv->ofdm_pwr_g;
}
/*
* original zonetype is USA, but custom zonetype is Europe,
* then need to recover 12, 13, 14 channels with 11 channel
*/
for (ii = 11; ii < 14; ii++) {
priv->cck_pwr_tbl[ii] = priv->cck_pwr_tbl[10];
priv->ofdm_pwr_tbl[ii] = priv->ofdm_pwr_tbl[10];
}
priv->ofdm_pwr_a = 0x34; /* same as RFbMA2829SelectChannel */
/* load OFDM A power table */
for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
priv->ofdm_a_pwr_tbl[ii] =
priv->eeprom[ii + EEP_OFS_OFDMA_PWR_TBL];
if (priv->ofdm_a_pwr_tbl[ii] == 0)
priv->ofdm_a_pwr_tbl[ii] = priv->ofdm_pwr_a;
}
antenna = priv->eeprom[EEP_OFS_ANTENNA];
if (antenna & EEP_ANTINV)
priv->tx_rx_ant_inv = true;
else
priv->tx_rx_ant_inv = false;
antenna &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
if (antenna == 0) /* if not set default is both */
antenna = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
if (antenna == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
priv->tx_antenna_mode = ANT_B;
priv->rx_antenna_sel = 1;
if (priv->tx_rx_ant_inv)
priv->rx_antenna_mode = ANT_A;
else
priv->rx_antenna_mode = ANT_B;
} else {
priv->rx_antenna_sel = 0;
if (antenna & EEP_ANTENNA_AUX) {
priv->tx_antenna_mode = ANT_A;
if (priv->tx_rx_ant_inv)
priv->rx_antenna_mode = ANT_B;
else
priv->rx_antenna_mode = ANT_A;
} else {
priv->tx_antenna_mode = ANT_B;
if (priv->tx_rx_ant_inv)
priv->rx_antenna_mode = ANT_A;
else
priv->rx_antenna_mode = ANT_B;
}
}
/* Set initial antenna mode */
vnt_set_antenna_mode(priv, priv->rx_antenna_mode);
/* get Auto Fall Back type */
priv->auto_fb_ctrl = AUTO_FB_0;
/* default Auto Mode */
priv->bb_type = BB_TYPE_11G;
/* get RFType */
priv->rf_type = init_rsp->rf_type;
/* load vt3266 calibration parameters in EEPROM */
if (priv->rf_type == RF_VT3226D0) {
if ((priv->eeprom[EEP_OFS_MAJOR_VER] == 0x1) &&
(priv->eeprom[EEP_OFS_MINOR_VER] >= 0x4)) {
calib_tx_iq = priv->eeprom[EEP_OFS_CALIB_TX_IQ];
calib_tx_dc = priv->eeprom[EEP_OFS_CALIB_TX_DC];
calib_rx_iq = priv->eeprom[EEP_OFS_CALIB_RX_IQ];
if (calib_tx_iq || calib_tx_dc || calib_rx_iq) {
/* CR255, enable TX/RX IQ and
* DC compensation mode
*/
vnt_control_out_u8(priv,
MESSAGE_REQUEST_BBREG,
0xff,
0x03);
/* CR251, TX I/Q Imbalance Calibration */
vnt_control_out_u8(priv,
MESSAGE_REQUEST_BBREG,
0xfb,
calib_tx_iq);
/* CR252, TX DC-Offset Calibration */
vnt_control_out_u8(priv,
MESSAGE_REQUEST_BBREG,
0xfC,
calib_tx_dc);
/* CR253, RX I/Q Imbalance Calibration */
vnt_control_out_u8(priv,
MESSAGE_REQUEST_BBREG,
0xfd,
calib_rx_iq);
} else {
/* CR255, turn off
* BB Calibration compensation
*/
vnt_control_out_u8(priv,
MESSAGE_REQUEST_BBREG,
0xff,
0x0);
}
}
}
/* get permanent network address */
memcpy(priv->permanent_net_addr, init_rsp->net_addr, 6);
ether_addr_copy(priv->current_net_addr, priv->permanent_net_addr);
/* if exist SW network address, use it */
dev_dbg(&priv->usb->dev, "Network address = %pM\n",
priv->current_net_addr);
/*
* set BB and packet type at the same time
* set Short Slot Time, xIFS, and RSPINF
*/
if (priv->bb_type == BB_TYPE_11A)
priv->short_slot_time = true;
else
priv->short_slot_time = false;
vnt_set_short_slot_time(priv);
priv->radio_ctl = priv->eeprom[EEP_OFS_RADIOCTL];
if ((priv->radio_ctl & EEP_RADIOCTL_ENABLE) != 0) {
status = vnt_control_in(priv, MESSAGE_TYPE_READ,
MAC_REG_GPIOCTL1, MESSAGE_REQUEST_MACREG, 1, &tmp);
if (status != STATUS_SUCCESS)
return false;
if ((tmp & GPIO3_DATA) == 0)
vnt_mac_reg_bits_on(priv, MAC_REG_GPIOCTL1,
GPIO3_INTMD);
else
vnt_mac_reg_bits_off(priv, MAC_REG_GPIOCTL1,
GPIO3_INTMD);
}
vnt_mac_set_led(priv, LEDSTS_TMLEN, 0x38);
vnt_mac_set_led(priv, LEDSTS_STS, LEDSTS_SLOW);
vnt_mac_reg_bits_on(priv, MAC_REG_GPIOCTL0, 0x01);
vnt_radio_power_on(priv);
dev_dbg(&priv->usb->dev, "<----INIbInitAdapter Exit\n");
return true;
}
void vnt_update_pre_ed_threshold(struct vnt_private *priv, int scanning)
{
u8 cr_201 = 0x0, cr_206 = 0x0;
u8 ed_inx = priv->bb_pre_ed_index;
switch (priv->rf_type) {
case RF_AL2230:
case RF_AL2230S:
case RF_AIROHA7230:
if (scanning) { /* Max sensitivity */
ed_inx = 0;
cr_206 = 0x30;
break;
}
if (priv->bb_pre_ed_rssi <= 45) {
ed_inx = 20;
cr_201 = 0xff;
} else if (priv->bb_pre_ed_rssi <= 46) {
ed_inx = 19;
cr_201 = 0x1a;
} else if (priv->bb_pre_ed_rssi <= 47) {
ed_inx = 18;
cr_201 = 0x15;
} else if (priv->bb_pre_ed_rssi <= 49) {
ed_inx = 17;
cr_201 = 0xe;
} else if (priv->bb_pre_ed_rssi <= 51) {
ed_inx = 16;
cr_201 = 0x9;
} else if (priv->bb_pre_ed_rssi <= 53) {
ed_inx = 15;
cr_201 = 0x6;
} else if (priv->bb_pre_ed_rssi <= 55) {
ed_inx = 14;
cr_201 = 0x3;
} else if (priv->bb_pre_ed_rssi <= 56) {
ed_inx = 13;
cr_201 = 0x2;
cr_206 = 0xa0;
} else if (priv->bb_pre_ed_rssi <= 57) {
ed_inx = 12;
cr_201 = 0x2;
cr_206 = 0x20;
} else if (priv->bb_pre_ed_rssi <= 58) {
ed_inx = 11;
cr_201 = 0x1;
cr_206 = 0xa0;
} else if (priv->bb_pre_ed_rssi <= 59) {
ed_inx = 10;
cr_201 = 0x1;
cr_206 = 0x54;
} else if (priv->bb_pre_ed_rssi <= 60) {
ed_inx = 9;
cr_201 = 0x1;
cr_206 = 0x18;
} else if (priv->bb_pre_ed_rssi <= 61) {
ed_inx = 8;
cr_206 = 0xe3;
} else if (priv->bb_pre_ed_rssi <= 62) {
ed_inx = 7;
cr_206 = 0xb9;
} else if (priv->bb_pre_ed_rssi <= 63) {
ed_inx = 6;
cr_206 = 0x93;
} else if (priv->bb_pre_ed_rssi <= 64) {
ed_inx = 5;
cr_206 = 0x79;
} else if (priv->bb_pre_ed_rssi <= 65) {
ed_inx = 4;
cr_206 = 0x62;
} else if (priv->bb_pre_ed_rssi <= 66) {
ed_inx = 3;
cr_206 = 0x51;
} else if (priv->bb_pre_ed_rssi <= 67) {
ed_inx = 2;
cr_206 = 0x43;
} else if (priv->bb_pre_ed_rssi <= 68) {
ed_inx = 1;
cr_206 = 0x36;
} else {
ed_inx = 0;
cr_206 = 0x30;
}
break;
case RF_VT3226:
case RF_VT3226D0:
if (scanning) { /* Max sensitivity */
ed_inx = 0;
cr_206 = 0x24;
break;
}
if (priv->bb_pre_ed_rssi <= 41) {
ed_inx = 22;
cr_201 = 0xff;
} else if (priv->bb_pre_ed_rssi <= 42) {
ed_inx = 21;
cr_201 = 0x36;
} else if (priv->bb_pre_ed_rssi <= 43) {
ed_inx = 20;
cr_201 = 0x26;
} else if (priv->bb_pre_ed_rssi <= 45) {
ed_inx = 19;
cr_201 = 0x18;
} else if (priv->bb_pre_ed_rssi <= 47) {
ed_inx = 18;
cr_201 = 0x11;
} else if (priv->bb_pre_ed_rssi <= 49) {
ed_inx = 17;
cr_201 = 0xa;
} else if (priv->bb_pre_ed_rssi <= 51) {
ed_inx = 16;
cr_201 = 0x7;
} else if (priv->bb_pre_ed_rssi <= 53) {
ed_inx = 15;
cr_201 = 0x4;
} else if (priv->bb_pre_ed_rssi <= 55) {
ed_inx = 14;
cr_201 = 0x2;
cr_206 = 0xc0;
} else if (priv->bb_pre_ed_rssi <= 56) {
ed_inx = 13;
cr_201 = 0x2;
cr_206 = 0x30;
} else if (priv->bb_pre_ed_rssi <= 57) {
ed_inx = 12;
cr_201 = 0x1;
cr_206 = 0xb0;
} else if (priv->bb_pre_ed_rssi <= 58) {
ed_inx = 11;
cr_201 = 0x1;
cr_206 = 0x70;
} else if (priv->bb_pre_ed_rssi <= 59) {
ed_inx = 10;
cr_201 = 0x1;
cr_206 = 0x30;
} else if (priv->bb_pre_ed_rssi <= 60) {
ed_inx = 9;
cr_206 = 0xea;
} else if (priv->bb_pre_ed_rssi <= 61) {
ed_inx = 8;
cr_206 = 0xc0;
} else if (priv->bb_pre_ed_rssi <= 62) {
ed_inx = 7;
cr_206 = 0x9c;
} else if (priv->bb_pre_ed_rssi <= 63) {
ed_inx = 6;
cr_206 = 0x80;
} else if (priv->bb_pre_ed_rssi <= 64) {
ed_inx = 5;
cr_206 = 0x68;
} else if (priv->bb_pre_ed_rssi <= 65) {
ed_inx = 4;
cr_206 = 0x52;
} else if (priv->bb_pre_ed_rssi <= 66) {
ed_inx = 3;
cr_206 = 0x43;
} else if (priv->bb_pre_ed_rssi <= 67) {
ed_inx = 2;
cr_206 = 0x36;
} else if (priv->bb_pre_ed_rssi <= 68) {
ed_inx = 1;
cr_206 = 0x2d;
} else {
ed_inx = 0;
cr_206 = 0x24;
}
break;
case RF_VT3342A0:
if (scanning) { /* need Max sensitivity */
ed_inx = 0;
cr_206 = 0x38;
break;
}
if (priv->bb_pre_ed_rssi <= 41) {
ed_inx = 20;
cr_201 = 0xff;
} else if (priv->bb_pre_ed_rssi <= 42) {
ed_inx = 19;
cr_201 = 0x36;
} else if (priv->bb_pre_ed_rssi <= 43) {
ed_inx = 18;
cr_201 = 0x26;
} else if (priv->bb_pre_ed_rssi <= 45) {
ed_inx = 17;
cr_201 = 0x18;
} else if (priv->bb_pre_ed_rssi <= 47) {
ed_inx = 16;
cr_201 = 0x11;
} else if (priv->bb_pre_ed_rssi <= 49) {
ed_inx = 15;
cr_201 = 0xa;
} else if (priv->bb_pre_ed_rssi <= 51) {
ed_inx = 14;
cr_201 = 0x7;
} else if (priv->bb_pre_ed_rssi <= 53) {
ed_inx = 13;
cr_201 = 0x4;
} else if (priv->bb_pre_ed_rssi <= 55) {
ed_inx = 12;
cr_201 = 0x2;
cr_206 = 0xc0;
} else if (priv->bb_pre_ed_rssi <= 56) {
ed_inx = 11;
cr_201 = 0x2;
cr_206 = 0x30;
} else if (priv->bb_pre_ed_rssi <= 57) {
ed_inx = 10;
cr_201 = 0x1;
cr_206 = 0xb0;
} else if (priv->bb_pre_ed_rssi <= 58) {
ed_inx = 9;
cr_201 = 0x1;
cr_206 = 0x70;
} else if (priv->bb_pre_ed_rssi <= 59) {
ed_inx = 8;
cr_201 = 0x1;
cr_206 = 0x30;
} else if (priv->bb_pre_ed_rssi <= 60) {
ed_inx = 7;
cr_206 = 0xea;
} else if (priv->bb_pre_ed_rssi <= 61) {
ed_inx = 6;
cr_206 = 0xc0;
} else if (priv->bb_pre_ed_rssi <= 62) {
ed_inx = 5;
cr_206 = 0x9c;
} else if (priv->bb_pre_ed_rssi <= 63) {
ed_inx = 4;
cr_206 = 0x80;
} else if (priv->bb_pre_ed_rssi <= 64) {
ed_inx = 3;
cr_206 = 0x68;
} else if (priv->bb_pre_ed_rssi <= 65) {
ed_inx = 2;
cr_206 = 0x52;
} else if (priv->bb_pre_ed_rssi <= 66) {
ed_inx = 1;
cr_206 = 0x43;
} else {
ed_inx = 0;
cr_206 = 0x38;
}
break;
}
if (ed_inx == priv->bb_pre_ed_index && !scanning)
return;
priv->bb_pre_ed_index = ed_inx;
dev_dbg(&priv->usb->dev, "%s bb_pre_ed_rssi %d\n",
__func__, priv->bb_pre_ed_rssi);
if (!cr_201 && !cr_206)
return;
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xc9, cr_201);
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xce, cr_206);
}
int vnt_vt3184_init(struct vnt_private *priv)
{
int ret = 0;
u16 length;
u8 *addr;
u8 *agc;
u16 length_agc;
u8 array[256];
u8 data;
ret = vnt_control_in(priv, MESSAGE_TYPE_READ, 0, MESSAGE_REQUEST_EEPROM,
EEP_MAX_CONTEXT_SIZE, priv->eeprom);
if (ret)
goto end;
priv->rf_type = priv->eeprom[EEP_OFS_RFTYPE];
dev_dbg(&priv->usb->dev, "RF Type %d\n", priv->rf_type);
if ((priv->rf_type == RF_AL2230) ||
(priv->rf_type == RF_AL2230S)) {
priv->bb_rx_conf = vnt_vt3184_al2230[10];
length = sizeof(vnt_vt3184_al2230);
addr = vnt_vt3184_al2230;
agc = vnt_vt3184_agc;
length_agc = sizeof(vnt_vt3184_agc);
priv->bb_vga[0] = 0x1C;
priv->bb_vga[1] = 0x10;
priv->bb_vga[2] = 0x0;
priv->bb_vga[3] = 0x0;
} else if (priv->rf_type == RF_AIROHA7230) {
priv->bb_rx_conf = vnt_vt3184_al2230[10];
length = sizeof(vnt_vt3184_al2230);
addr = vnt_vt3184_al2230;
agc = vnt_vt3184_agc;
length_agc = sizeof(vnt_vt3184_agc);
addr[0xd7] = 0x06;
priv->bb_vga[0] = 0x1c;
priv->bb_vga[1] = 0x10;
priv->bb_vga[2] = 0x0;
priv->bb_vga[3] = 0x0;
} else if ((priv->rf_type == RF_VT3226) ||
(priv->rf_type == RF_VT3226D0)) {
priv->bb_rx_conf = vnt_vt3184_vt3226d0[10];
length = sizeof(vnt_vt3184_vt3226d0);
addr = vnt_vt3184_vt3226d0;
agc = vnt_vt3184_agc;
length_agc = sizeof(vnt_vt3184_agc);
priv->bb_vga[0] = 0x20;
priv->bb_vga[1] = 0x10;
priv->bb_vga[2] = 0x0;
priv->bb_vga[3] = 0x0;
/* Fix VT3226 DFC system timing issue */
ret = vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL2,
SOFTPWRCTL_RFLEOPT);
if (ret)
goto end;
} else if (priv->rf_type == RF_VT3342A0) {
priv->bb_rx_conf = vnt_vt3184_vt3226d0[10];
length = sizeof(vnt_vt3184_vt3226d0);
addr = vnt_vt3184_vt3226d0;
agc = vnt_vt3184_agc;
length_agc = sizeof(vnt_vt3184_agc);
priv->bb_vga[0] = 0x20;
priv->bb_vga[1] = 0x10;
priv->bb_vga[2] = 0x0;
priv->bb_vga[3] = 0x0;
/* Fix VT3226 DFC system timing issue */
ret = vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL2,
SOFTPWRCTL_RFLEOPT);
if (ret)
goto end;
} else {
goto end;
}
memcpy(array, addr, length);
ret = vnt_control_out(priv, MESSAGE_TYPE_WRITE, 0,
MESSAGE_REQUEST_BBREG, length, array);
if (ret)
goto end;
memcpy(array, agc, length_agc);
ret = vnt_control_out(priv, MESSAGE_TYPE_WRITE, 0,
MESSAGE_REQUEST_BBAGC, length_agc, array);
if (ret)
goto end;
if ((priv->rf_type == RF_VT3226) ||
(priv->rf_type == RF_VT3342A0)) {
ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
MAC_REG_ITRTMSET, 0x23);
if (ret)
goto end;
ret = vnt_mac_reg_bits_on(priv, MAC_REG_PAPEDELAY, 0x01);
if (ret)
goto end;
} else if (priv->rf_type == RF_VT3226D0) {
ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
MAC_REG_ITRTMSET, 0x11);
if (ret)
goto end;
ret = vnt_mac_reg_bits_on(priv, MAC_REG_PAPEDELAY, 0x01);
if (ret)
goto end;
}
ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
if (ret)
goto end;
ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
if (ret)
goto end;
ret = vnt_rf_table_download(priv);
if (ret)
goto end;
/* Fix for TX USB resets from vendors driver */
ret = vnt_control_in(priv, MESSAGE_TYPE_READ, USB_REG4,
MESSAGE_REQUEST_MEM, sizeof(data), &data);
if (ret)
goto end;
data |= 0x2;
ret = vnt_control_out(priv, MESSAGE_TYPE_WRITE, USB_REG4,
MESSAGE_REQUEST_MEM, sizeof(data), &data);
end:
return ret;
}
void vnt_exit_deep_sleep(struct vnt_private *priv)
{
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x00);/* CR12 */
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);/* CR13 */
}
