INT32 _stp_trigger_firmware_assert_via_emi(VOID) { INT32 status = -1; INT32 j = 0; wmt_plat_force_trigger_assert(STP_FORCE_TRG_ASSERT_DEBUG_PIN); do { if(0 != mtk_wcn_stp_coredump_start_get()){ status = 0; break; } stp_dbg_poll_cpupcr(5 , 1 , 1); stp_dbg_poll_dmaregs(5 , 1); j++; STP_BTM_INFO_FUNC("Wait for assert message (%d)\n", j); osal_sleep_ms(20); if(j > 49) { /* wait for 1 second*/ stp_dbg_set_fw_info("host trigger fw assert timeout", osal_strlen("host trigger fw assert timeout"),STP_HOST_TRIGGER_ASSERT_TIMEOUT); wcn_core_dump_timeout();/* trigger collect SYS_FTRACE*/ break; } } while(1); return status; }
INT32 _stp_trigger_firmware_assert_via_emi(VOID) { INT32 status = -1; INT32 j = 0; wmt_plat_force_trigger_assert(STP_FORCE_TRG_ASSERT_DEBUG_PIN); do { if(0 != mtk_wcn_stp_coredump_start_get()){ status = 0; break; } stp_dbg_poll_cpupcr(5 , 1 , 1); j++; STP_BTM_INFO_FUNC("Wait for assert message (%d)\n", j); osal_msleep(20); if(j > 24) break; } while(1); return status; }