static void xgene_enet_shutdown(struct xgene_enet_pdata *pdata) { struct device *dev = &pdata->pdev->dev; struct xgene_enet_desc_ring *ring; u32 pb, val; int i; pb = 0; for (i = 0; i < pdata->rxq_cnt; i++) { ring = pdata->rx_ring[i]->buf_pool; val = xgene_enet_ring_bufnum(ring->id); pb |= BIT(val - 0x20); } xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIFPRESET_ADDR, pb); pb = 0; for (i = 0; i < pdata->txq_cnt; i++) { ring = pdata->tx_ring[i]; val = xgene_enet_ring_bufnum(ring->id); pb |= BIT(val); } xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIWQRESET_ADDR, pb); if (dev->of_node) { if (!IS_ERR(pdata->clk)) clk_disable_unprepare(pdata->clk); } }
static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata *pdata) { xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIWQASSOC_ADDR, 0); xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIFPQASSOC_ADDR, 0); xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIQMLITEWQASSOC_ADDR, 0); xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIQMLITEFPQASSOC_ADDR, 0); }
static u32 xgene_enet_rd_mac(struct xgene_enet_pdata *p, u32 rd_addr) { struct xgene_indirect_ctl ctl = { .addr = p->mcx_mac_addr + MAC_ADDR_REG_OFFSET, .ctl = p->mcx_mac_addr + MAC_READ_REG_OFFSET, .cmd = p->mcx_mac_addr + MAC_COMMAND_REG_OFFSET, .cmd_done = p->mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET }; return xgene_enet_rd_indirect(&ctl, rd_addr); } static int xgene_enet_ecc_init(struct xgene_enet_pdata *p) { struct net_device *ndev = p->ndev; u32 data; int i; xgene_enet_wr_diag_csr(p, ENET_CFG_MEM_RAM_SHUTDOWN_ADDR, 0); for (i = 0; i < 10 && data != ~0U ; i++) { usleep_range(100, 110); data = xgene_enet_rd_diag_csr(p, ENET_BLOCK_MEM_RDY_ADDR); } if (data != ~0U) { netdev_err(ndev, "Failed to release memory from shutdown\n"); return -ENODEV; } return 0; } static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata *p) { u32 val = 0xffffffff; xgene_enet_wr_ring_if(p, ENET_CFGSSQMIWQASSOC_ADDR, val); xgene_enet_wr_ring_if(p, ENET_CFGSSQMIFPQASSOC_ADDR, val); }
static void xgene_enet_clear(struct xgene_enet_pdata *pdata, struct xgene_enet_desc_ring *ring) { u32 addr, val, data; val = xgene_enet_ring_bufnum(ring->id); if (xgene_enet_is_bufpool(ring->id)) { addr = ENET_CFGSSQMIFPRESET_ADDR; data = BIT(val - 0x20); } else { addr = ENET_CFGSSQMIWQRESET_ADDR; data = BIT(val); } xgene_enet_wr_ring_if(pdata, addr, data); }