void CodeGenRegister::addSubRegsPreOrder(SetVector<CodeGenRegister*> &OSet) const { assert(SubRegsComplete && "Must precompute sub-registers"); std::vector<Record*> Indices = TheDef->getValueAsListOfDefs("SubRegIndices"); for (unsigned i = 0, e = Indices.size(); i != e; ++i) { CodeGenRegister *SR = SubRegs.find(Indices[i])->second; if (OSet.insert(SR)) SR->addSubRegsPreOrder(OSet); } }
BitVector CodeGenRegBank::computeCoveredRegisters(ArrayRef<Record*> Regs) { SetVector<const CodeGenRegister*> Set; // First add Regs with all sub-registers. for (unsigned i = 0, e = Regs.size(); i != e; ++i) { CodeGenRegister *Reg = getReg(Regs[i]); if (Set.insert(Reg)) // Reg is new, add all sub-registers. // The pre-ordering is not important here. Reg->addSubRegsPreOrder(Set, *this); } // Second, find all super-registers that are completely covered by the set. for (unsigned i = 0; i != Set.size(); ++i) { const CodeGenRegister::SuperRegList &SR = Set[i]->getSuperRegs(); for (unsigned j = 0, e = SR.size(); j != e; ++j) { const CodeGenRegister *Super = SR[j]; if (!Super->CoveredBySubRegs || Set.count(Super)) continue; // This new super-register is covered by its sub-registers. bool AllSubsInSet = true; const CodeGenRegister::SubRegMap &SRM = Super->getSubRegs(); for (CodeGenRegister::SubRegMap::const_iterator I = SRM.begin(), E = SRM.end(); I != E; ++I) if (!Set.count(I->second)) { AllSubsInSet = false; break; } // All sub-registers in Set, add Super as well. // We will visit Super later to recheck its super-registers. if (AllSubsInSet) Set.insert(Super); } } // Convert to BitVector. BitVector BV(Registers.size() + 1); for (unsigned i = 0, e = Set.size(); i != e; ++i) BV.set(Set[i]->EnumValue); return BV; }