TEST(Cpu, ADC_OverflowNoCarry) {
Cpu cpu;
// ensure flags are cleared
ASSERT_EQ(0, cpu.P.read());
cpu.A.write(0xff);
cpu.i_adc(0x01);
// 0xff + 0x01 overflows to zero
ASSERT_EQ(0, cpu.A.read());
ASSERT_TRUE(cpu.P.has_carry());
ASSERT_TRUE(cpu.P.has_zero());
ASSERT_FALSE(cpu.P.has_negative());
ASSERT_FALSE(cpu.P.has_overflow());
}
TEST(Cpu, ADC_Overflow) {
Cpu cpu;
ASSERT_EQ(0, cpu.P.read());
cpu.i_sec(); // set carry instruction
cpu.A.write(0xff);
cpu.i_adc(0x01);
// 0xff + 0x01 + 1 (carry) overflows to one
ASSERT_EQ(1, cpu.A.read());
ASSERT_TRUE(cpu.P.has_carry());
ASSERT_FALSE(cpu.P.has_zero());
ASSERT_FALSE(cpu.P.has_negative());
ASSERT_FALSE(cpu.P.has_overflow());
}
TEST(Cpu, ADC_NoOverflow) {
Cpu cpu;
ASSERT_EQ(0, cpu.P.read());
cpu.i_sec(); // set carry instruction
cpu.A.write(0x7f);
cpu.i_adc(0x01);
// 0x7f + 0x01 + 1 = 0x81
ASSERT_EQ(0x81, cpu.A.read());
ASSERT_FALSE(cpu.P.has_carry());
ASSERT_FALSE(cpu.P.has_zero());
ASSERT_TRUE(cpu.P.has_negative());
// interpreting inputs as signed two's complement values, we added
// a positive to a positive (0x7f + 0x01) and got a negative (0x81)
// so we should see the overflow flag get set
ASSERT_TRUE(cpu.P.has_overflow());
}
