int
at_sw_init(at_adapter *adapter)
{
at_hw *hw = &adapter->hw;
IOPCIDevice *pdev = adapter->pdev;
/* PCI config space info */
hw->vendor_id = pdev->configRead16(kIOPCIConfigVendorID);
hw->device_id = pdev->configRead16(kIOPCIConfigDeviceID);
hw->subsystem_vendor_id = pdev->configRead16(kIOPCIConfigSubSystemVendorID);
hw->subsystem_id = pdev->configRead16(kIOPCIConfigSubSystemID);
hw->revision_id = pdev->configRead8(kIOPCIConfigRevisionID);
hw->pci_cmd_word = pdev->configRead16(kIOPCIConfigCommand);
adapter->wol = 0;
adapter->ict = 50000; // 100ms
adapter->link_speed = SPEED_0; // hardware init
adapter->link_duplex = FULL_DUPLEX; //
hw->phy_configured = false;
hw->preamble_len = 7;
hw->ipgt = 0x60;
hw->min_ifg = 0x50;
hw->ipgr1 = 0x40;
hw->ipgr2 = 0x60;
hw->retry_buf = 2;
hw->max_retry = 0xf;
hw->lcol = 0x37;
hw->jam_ipg = 7;
hw->fc_rxd_hi = 0;
hw->fc_rxd_lo = 0;
hw->max_frame_size = 1500;
atomic_set(&adapter->irq_sem, 1);
adapter->stats_lock = IOSimpleLockAlloc();
adapter->tx_lock = IOSimpleLockAlloc();
return 0;
}
IOService * AppleIntelPIIXATARoot::probe( IOService * provider,
SInt32 * score )
{
IOPCIDevice * pciDevice;
// Let our superclass probe first.
if ( super::probe( provider, score ) == 0 )
{
return 0;
}
// Verify the provider type.
pciDevice = OSDynamicCast( IOPCIDevice, provider );
if ( pciDevice == 0 )
{
return 0;
}
// BIOS did not enable I/O space decoding.
// For now assume the ATA controller is disabled.
if ( (pciDevice->configRead16( kIOPCIConfigCommand ) &
kIOPCICommandIOSpace) == 0 )
{
return 0;
}
return this;
}
IOService * AppleNForceATARoot::probe( IOService * provider, SInt32 * score )
{
IOPCIDevice * pciDevice;
// Let superclass probe first.
if (super::probe( provider, score ) == 0)
{
return 0;
}
// Verify the provider is an IOPCIDevice.
pciDevice = OSDynamicCast( IOPCIDevice, provider );
if (pciDevice == 0)
{
return 0;
}
// Fail if I/O space decoding is disabled.
if ((pciDevice->configRead16( kIOPCIConfigCommand ) &
kIOPCICommandIOSpace) == 0)
{
return 0;
}
return this;
}
bool AppleNForceATARoot::isaBridgePublished( void * target,
void * param,
IOService * service )
{
IOPCIDevice * bridge;
AppleNForceATARoot * root = (AppleNForceATARoot *) target;
const ISABridgeInfo * info;
UInt16 bridgeDID;
UInt16 bridgeSubDID;
//UInt8 bridgeRev;
if (root == 0)
return false;
bridge = OSDynamicCast( IOPCIDevice, service );
if (bridge == 0)
return false;
bridgeDID = bridge->configRead16(kIOPCIConfigDeviceID);
bridgeSubDID = bridge->configRead16(kIOPCIConfigSubSystemVendorID);
//bridgeRev = bridge->configRead8(kIOPCIConfigRevisionID);
DEBUG_LOG( "AppleNForceATARoot::%s( %p, %p, %p ) device/subdevice id: 0x%04x - 0x%04x.\n",
__FUNCTION__, target, param, service, bridgeDID, bridgeSubDID );
info = &gISABridges[0];
while (info->deviceID)
{
if ( bridgeDID == info->deviceID || bridgeSubDID == info->deviceID )
break;
info++;
}
root->setProperty(kHardwareNameKey, info->name);
root->fHardwareType = info->hwType;
root->fHardwareFlags = info->hwFlags;
root->applyToClients( registerClientApplier, 0 );
if (root->fISABridgeNotifier)
root->fISABridgeNotifier->disable();
return false;
}
bool org_virtualbox_VBoxGuest::isVmmDev(IOPCIDevice *pIOPCIDevice)
{
UInt16 uVendorId, uDeviceId;
if (!pIOPCIDevice)
return false;
uVendorId = m_pIOPCIDevice->configRead16(kIOPCIConfigVendorID);
uDeviceId = m_pIOPCIDevice->configRead16(kIOPCIConfigDeviceID);
if (uVendorId == VMMDEV_VENDORID && uDeviceId == VMMDEV_DEVICEID)
return true;
return true;
}
IOReturn IntelMausi::setPowerStateWakeAction(OSObject *owner, void *arg1, void *arg2, void *arg3, void *arg4)
{
IntelMausi *ethCtlr = OSDynamicCast(IntelMausi, owner);
IOPCIDevice *dev;
UInt16 val16;
UInt8 offset;
if (ethCtlr) {
dev = ethCtlr->pciDevice;
offset = ethCtlr->pciPMCtrlOffset;
val16 = dev->configRead16(offset);
val16 &= ~(kPCIPMCSPowerStateMask | kPCIPMCSPMEStatus | kPCIPMCSPMEEnable);
val16 |= kPCIPMCSPowerStateD0;
dev->configWrite16(offset, val16);
/* Restore the PCI Command register. */
ethCtlr->intelEnablePCIDevice(dev);
}
return kIOReturnSuccess;
}
IOReturn IntelMausi::setPowerStateSleepAction(OSObject *owner, void *arg1, void *arg2, void *arg3, void *arg4)
{
IntelMausi *ethCtlr = OSDynamicCast(IntelMausi, owner);
IOPCIDevice *dev;
UInt16 val16;
UInt8 offset;
if (ethCtlr) {
dev = ethCtlr->pciDevice;
offset = ethCtlr->pciPMCtrlOffset;
val16 = dev->configRead16(offset);
val16 &= ~(kPCIPMCSPowerStateMask | kPCIPMCSPMEStatus | kPCIPMCSPMEEnable);
if (ethCtlr->wolActive)
val16 |= (kPCIPMCSPMEStatus | kPCIPMCSPMEEnable | kPCIPMCSPowerStateD3);
else
val16 |= kPCIPMCSPowerStateD3;
dev->configWrite16(offset, val16);
}
return kIOReturnSuccess;
}
/**
* at_probe - Device Initialization Routine
* @pdev: PCI device information struct
* @ent: entry in at_pci_tbl
*
* Returns 0 on success, negative on failure
*
* at_probe initializes an adapter identified by a pci_dev structure.
* The OS initialization, configuring of the adapter private structure,
* and a hardware reset occur.
**/
bool AtherosL1Ethernet::atProbe()
{
u16 vendorId, deviceId;
at_adapter *adapter=&adapter_;
IOPCIDevice *pdev = adapter_.pdev;
pdev->setBusMasterEnable(true);
pdev->setMemoryEnable(true);
pdev->setIOEnable(true);
vendorId = pdev->configRead16(kIOPCIConfigVendorID);
deviceId = pdev->configRead16(kIOPCIConfigDeviceID);
DbgPrint("Vendor ID %x, device ID %x\n", vendorId, deviceId);
DbgPrint("MMR0 address %x\n", (u32)pdev->configRead32(kIOPCIConfigBaseAddress0));
pdev->enablePCIPowerManagement();
hw_addr_ = pdev->mapDeviceMemoryWithRegister(kIOPCIConfigBaseAddress0);
if (hw_addr_ == NULL)
{
ErrPrint("Couldn't map io regs\n");
return false;
}
DbgPrint("Memory mapped at bus address %x, virtual address %x, length %d\n", (u32)hw_addr_->getPhysicalAddress(),
(u32)hw_addr_->getVirtualAddress(), (u32)hw_addr_->getLength());
hw_addr_->retain();
adapter->hw.mmr_base = reinterpret_cast<char *>(hw_addr_->getVirtualAddress());
DbgPrint("REG_VPD_CAP = %x\n", OSReadLittleInt32(adapter->hw.mmr_base, REG_VPD_CAP));
DbgPrint("REG_PCIE_CAP_LIST = %x\n", OSReadLittleInt32(adapter->hw.mmr_base, REG_PCIE_CAP_LIST));
DbgPrint("REG_MASTER_CTRL = %x\n", OSReadLittleInt32(adapter->hw.mmr_base, REG_MASTER_CTRL));
at_setup_pcicmd(pdev);
/* get user settings */
at_check_options(adapter);
/* setup the private structure */
if(at_sw_init(adapter))
{
ErrPrint("Couldn't init software\n");
return false;
}
/* Init GPHY as early as possible due to power saving issue */
at_phy_init(&adapter->hw);
/* reset the controller to
* put the device in a known good starting state */
if (at_reset_hw(&adapter->hw))
{
ErrPrint("Couldn't reset hardware\n");
return false; //TO-DO: Uncomment
}
/* copy the MAC address out of the EEPROM */
at_read_mac_addr(&adapter->hw);
return true;
}