Bitu read_p3cf_pvga1a(Bitu reg,Bitu iolen) {
if (pvga1a.locked() && reg >= 0x09 && reg <= 0x0e)
return 0x0;
switch (reg) {
case 0x09:
return pvga1a.PR0A;
case 0x0a:
return pvga1a.PR0B;
case 0x0b:
return pvga1a.PR1;
case 0x0c:
return pvga1a.PR2;
case 0x0d:
return pvga1a.PR3;
case 0x0e:
return pvga1a.PR4;
case 0x0f:
return pvga1a.PR5;
default:
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:GFX:PVGA1A:Read from illegal index %2X", reg);
break;
}
return 0x0;
}
void write_p3cf_pvga1a(Bitu reg,Bitu val,Bitu iolen) {
(void)iolen;//UNUSED
if (pvga1a.locked() && reg >= 0x09 && reg <= 0x0e)
return;
switch (reg) {
case 0x09:
// Bank A, 4K granularity, not using bit 7
// Maps to A800h-AFFFh if PR1 bit 3 set and 64k config B000h-BFFFh if 128k config. A000h-AFFFh otherwise.
pvga1a.PR0A = val;
bank_setup_pvga1a();
break;
case 0x0a:
// Bank B, 4K granularity, not using bit 7
// Maps to A000h-A7FFh if PR1 bit 3 set and 64k config, A000h-AFFFh if 128k
pvga1a.PR0B = val;
bank_setup_pvga1a();
break;
case 0x0b:
// Memory size. We only allow to mess with bit 3 here (enable bank B) - this may break some detection schemes
pvga1a.PR1 = (pvga1a.PR1 & ~0x08u) | (val & 0x08u);
bank_setup_pvga1a();
break;
case 0x0c:
// Video configuration
// TODO: Figure out if there is anything worth implementing here.
pvga1a.PR2 = val;
break;
case 0x0d:
// CRT control. Bits 3-4 contain bits 16-17 of CRT start.
// TODO: Implement bit 2 (CRT address doubling - this mechanism is present in other chipsets as well,
// but not implemented in DosBox core)
pvga1a.PR3 = val;
vga.config.display_start = (vga.config.display_start & 0xffffu) | ((val & 0x18u)<<13u);
vga.config.cursor_start = (vga.config.cursor_start & 0xffffu) | ((val & 0x18u)<<13u);
break;
case 0x0e:
// Video control
// TODO: Figure out if there is anything worth implementing here.
pvga1a.PR4 = val;
break;
case 0x0f:
// Enable extended registers
pvga1a.PR5 = val;
break;
default:
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:GFX:PVGA1A:Write to illegal index %2X", (int)reg);
break;
}
}
