bool Loop::isAnnotatedParallel() const {
MDNode *desiredLoopIdMetadata = getLoopID();
if (!desiredLoopIdMetadata)
return false;
// The loop branch contains the parallel loop metadata. In order to ensure
// that any parallel-loop-unaware optimization pass hasn't added loop-carried
// dependencies (thus converted the loop back to a sequential loop), check
// that all the memory instructions in the loop contain parallelism metadata
// that point to the same unique "loop id metadata" the loop branch does.
for (block_iterator BB = block_begin(), BE = block_end(); BB != BE; ++BB) {
for (BasicBlock::iterator II = (*BB)->begin(), EE = (*BB)->end();
II != EE; II++) {
if (!II->mayReadOrWriteMemory())
continue;
// The memory instruction can refer to the loop identifier metadata
// directly or indirectly through another list metadata (in case of
// nested parallel loops). The loop identifier metadata refers to
// itself so we can check both cases with the same routine.
MDNode *loopIdMD =
II->getMetadata(LLVMContext::MD_mem_parallel_loop_access);
if (!loopIdMD)
return false;
bool loopIdMDFound = false;
for (unsigned i = 0, e = loopIdMD->getNumOperands(); i < e; ++i) {
if (loopIdMD->getOperand(i) == desiredLoopIdMetadata) {
loopIdMDFound = true;
break;
}
}
if (!loopIdMDFound)
return false;
}
}
return true;
}
Value *BoUpSLP::isUnsafeToSink(Instruction *Src, Instruction *Dst) {
assert(Src->getParent() == Dst->getParent() && "Not the same BB");
BasicBlock::iterator I = Src, E = Dst;
/// Scan all of the instruction from SRC to DST and check if
/// the source may alias.
for (++I; I != E; ++I) {
// Ignore store instructions that are marked as 'ignore'.
if (MemBarrierIgnoreList.count(I)) continue;
if (Src->mayWriteToMemory()) /* Write */ {
if (!I->mayReadOrWriteMemory()) continue;
} else /* Read */ {
if (!I->mayWriteToMemory()) continue;
}
AliasAnalysis::Location A = getLocation(&*I);
AliasAnalysis::Location B = getLocation(Src);
if (!A.Ptr || !B.Ptr || AA->alias(A, B))
return I;
}
return 0;
}