BS3_DECL(void) Bs3SlabInit(PBS3SLABCTL pSlabCtl, size_t cbSlabCtl, uint32_t uFlatSlabPtr, uint32_t cbSlab, uint16_t cbChunk)
{
uint16_t cBits;
BS3_ASSERT(RT_IS_POWER_OF_TWO(cbChunk));
BS3_ASSERT(cbSlab >= cbChunk * 4);
BS3_ASSERT(!(uFlatSlabPtr & (cbChunk - 1)));
BS3_XPTR_SET_FLAT(BS3SLABCTL, pSlabCtl->pNext, 0);
BS3_XPTR_SET_FLAT(BS3SLABCTL, pSlabCtl->pHead, 0);
BS3_XPTR_SET_FLAT(BS3SLABCTL, pSlabCtl->pbStart, uFlatSlabPtr);
pSlabCtl->cbChunk = cbChunk;
pSlabCtl->cChunkShift = ASMBitFirstSetU16(cbChunk) - 1;
pSlabCtl->cChunks = cbSlab >> pSlabCtl->cChunkShift;
pSlabCtl->cFreeChunks = pSlabCtl->cChunks;
cBits = RT_ALIGN_T(pSlabCtl->cChunks, 32, uint16_t);
BS3_ASSERT(cbSlabCtl >= RT_OFFSETOF(BS3SLABCTL, bmAllocated[cBits >> 3]));
Bs3MemZero(&pSlabCtl->bmAllocated, cBits >> 3);
/* Mark excess bitmap padding bits as allocated. */
if (cBits != pSlabCtl->cChunks)
{
uint16_t iBit;
for (iBit = pSlabCtl->cChunks; iBit < cBits; iBit++)
ASMBitSet(pSlabCtl->bmAllocated, iBit);
}
}
/**
* @callback_method_impl{FNBS3STRFORMATOUTPUT,
* Used by Bs3TestFailedV and Bs3TestSkippedV.}
*/
BS3_DECL_CALLBACK(size_t) bs3TestFailedStrOutput(char ch, void BS3_FAR *pvUser)
{
PBS3TESTFAILEDBUF pBuf = (PBS3TESTFAILEDBUF)pvUser;
/*
* VMMDev first. We postpone newline processing here so we can strip one
* trailing newline.
*/
if (g_fbBs3VMMDevTesting)
{
if (pBuf->fNewLine && ch != '\0')
ASMOutU8(VMMDEV_TESTING_IOPORT_DATA, '\n');
pBuf->fNewLine = ch == '\n';
if (ch != '\n')
ASMOutU8(VMMDEV_TESTING_IOPORT_DATA, ch);
}
/*
* Console next.
*/
if (ch != '\0')
{
BS3_ASSERT(pBuf->cchBuf < RT_ELEMENTS(pBuf->achBuf));
pBuf->achBuf[pBuf->cchBuf++] = ch;
/* Whether to flush the buffer. We do line flushing here to avoid
dropping too much info when the formatter crashes on bad input. */
if ( pBuf->cchBuf < RT_ELEMENTS(pBuf->achBuf)
&& ch != '\n')
{
pBuf->fNewLine = false;
return 1;
}
pBuf->fNewLine = '\n';
}
/* Try fit missing newline into the buffer. */
else if (!pBuf->fNewLine && pBuf->cchBuf < RT_ELEMENTS(pBuf->achBuf))
{
pBuf->fNewLine = true;
pBuf->achBuf[pBuf->cchBuf++] = '\n';
}
BS3_ASSERT(pBuf->cchBuf <= RT_ELEMENTS(pBuf->achBuf));
Bs3PrintStrN(&pBuf->achBuf[0], pBuf->cchBuf);
pBuf->cchBuf = 0;
/* In case we failed to add trailing new line, print one separately. */
if (!pBuf->fNewLine)
Bs3PrintChr('\n');
return ch != '\0';
}
BS3_DECL(uint16_t) Bs3SlabFree(PBS3SLABCTL pSlabCtl, uint32_t uFlatChunkPtr, uint16_t cChunks)
{
uint16_t cFreed = 0;
BS3_ASSERT(cChunks > 0);
if (cChunks > 0)
{
uint16_t iChunk = (uint16_t)((uFlatChunkPtr - BS3_XPTR_GET_FLAT(uint8_t, pSlabCtl->pbStart)) >> pSlabCtl->cChunkShift);
BS3_ASSERT(iChunk < pSlabCtl->cChunks);
BS3_ASSERT(iChunk + cChunks <= pSlabCtl->cChunks);
do
{
if (ASMBitTestAndClear(&pSlabCtl->bmAllocated, iChunk))
cFreed++;
else
BS3_ASSERT(0);
iChunk++;
} while (--cChunks > 0);
pSlabCtl->cFreeChunks += cFreed;
}
BS3_DECL(int) Bs3PagingInitRootForLM(void)
{
X86PML4 BS3_FAR *pPml4;
BS3_ASSERT(BS3_DATA_NM(g_PhysPagingRootLM) == UINT32_MAX);
/*
* The default is an identity mapping of the first 4GB repeated for the
* whole 48-bit virtual address space. So, we need one level more than PAE.
*/
pPml4 = (X86PML4 BS3_FAR *)Bs3MemAlloc(BS3MEMKIND_TILED, _4K);
if (pPml4)
{
X86PDPT BS3_FAR *pPdPtr = (X86PDPT BS3_FAR *)Bs3MemAlloc(BS3MEMKIND_TILED, _4K);
BS3_ASSERT((uintptr_t)pPdPtr != (uintptr_t)pPml4);
if (pPdPtr)
{
X86PDPAE BS3_FAR *paPgDirs = (X86PDPAE BS3_FAR *)Bs3MemAlloc(BS3MEMKIND_TILED, _4K * 4U);
BS3_ASSERT((uintptr_t)paPgDirs != (uintptr_t)pPml4);
if (paPgDirs)
{
unsigned i;
BS3_XPTR_AUTO(X86PML4, XPtrPml4);
BS3_XPTR_AUTO(X86PDPT, XPtrPdPtr);
BS3_XPTR_AUTO(X86PDPAE, XPtrPgDirs);
/* Set up the 2048 2MB pages first. */
for (i = 0; i < RT_ELEMENTS(paPgDirs->a) * 4U; i++)
paPgDirs->a[i].u = ((uint32_t)i << X86_PD_PAE_SHIFT)
| X86_PDE4M_P | X86_PDE4M_RW | X86_PDE4M_US | X86_PDE4M_PS | X86_PDE4M_A | X86_PDE4M_D;
/* Set up the page directory pointer table next (4GB replicated, remember). */
BS3_XPTR_SET(X86PDPAE, XPtrPgDirs, paPgDirs);
pPdPtr->a[0].u = BS3_XPTR_GET_FLAT(X86PDPAE, XPtrPgDirs)
| X86_PDPE_P | X86_PDPE_RW | X86_PDPE_US | X86_PDPE_A;
pPdPtr->a[1].u = pPdPtr->a[0].u + _4K;
pPdPtr->a[2].u = pPdPtr->a[1].u + _4K;
pPdPtr->a[3].u = pPdPtr->a[2].u + _4K;
for (i = 4; i < RT_ELEMENTS(pPdPtr->a); i += 4)
{
pPdPtr->a[i + 0].u = pPdPtr->a[0].u;
pPdPtr->a[i + 1].u = pPdPtr->a[1].u;
pPdPtr->a[i + 2].u = pPdPtr->a[2].u;
pPdPtr->a[i + 3].u = pPdPtr->a[3].u;
}
/* Set up the page map level 4 (all entries are the same). */
BS3_XPTR_SET(X86PDPT, XPtrPdPtr, pPdPtr);
pPml4->a[0].u = BS3_XPTR_GET_FLAT(X86PDPT, XPtrPdPtr)
| X86_PML4E_P | X86_PML4E_RW | X86_PML4E_US | X86_PML4E_A;
for (i = 1; i < RT_ELEMENTS(pPml4->a); i++)
pPml4->a[i].u = pPml4->a[0].u;
/* Set the global root pointer and we're done. */
BS3_XPTR_SET(X86PML4, XPtrPml4, pPml4);
BS3_DATA_NM(g_PhysPagingRootLM) = BS3_XPTR_GET_FLAT(X86PML4, XPtrPml4);
return VINF_SUCCESS;
}
Bs3MemFree(pPdPtr, _4K);
}
Bs3MemFree(pPml4, _4K);
}
return VERR_NO_MEMORY;
}
