Beispiel #1
0
static Bool
setup_texture(NVPtr pNv, int unit, PicturePtr pict, PixmapPtr pixmap)
{
	struct nouveau_channel *chan = pNv->chan;
	struct nouveau_bo *bo = nouveau_pixmap_bo(pixmap);
	unsigned tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
	long w = pict->pDrawable->width,
	     h = pict->pDrawable->height;
	unsigned int txfmt =
		NV10_3D_TEX_FORMAT_WRAP_T_CLAMP_TO_EDGE |
		NV10_3D_TEX_FORMAT_WRAP_S_CLAMP_TO_EDGE |
		log2i(w) << 20 | log2i(h) << 16 |
		1 << 12 | /* lod == 1 */
		get_tex_format(pict) |
		0x50 /* UNK */;

	BEGIN_NV04(chan, NV10_3D(TEX_OFFSET(unit)), 1);
	if (OUT_RELOCl(chan, bo, 0, tex_reloc))
		return FALSE;

	if (pict->repeat == RepeatNone) {
		/* NPOT_SIZE expects an even number for width, we can
		 * round up uneven numbers here because EXA always
		 * gives 64 byte aligned pixmaps and for all formats
		 * we support 64 bytes represents an even number of
		 * pixels
		 */
		w = (w + 1) &~ 1;

		BEGIN_NV04(chan, NV10_3D(TEX_NPOT_PITCH(unit)), 1);
		OUT_RING  (chan, exaGetPixmapPitch(pixmap) << 16);

		BEGIN_NV04(chan, NV10_3D(TEX_NPOT_SIZE(unit)), 1);
		OUT_RING  (chan, w << 16 | h);
	}

	BEGIN_NV04(chan, NV10_3D(TEX_FORMAT(unit)), 1 );
	if (OUT_RELOCd(chan, bo, txfmt, tex_reloc | NOUVEAU_BO_OR,
		       NV10_3D_TEX_FORMAT_DMA0, NV10_3D_TEX_FORMAT_DMA1))
		return FALSE;

	BEGIN_NV04(chan, NV10_3D(TEX_ENABLE(unit)), 1 );
	OUT_RING  (chan, NV10_3D_TEX_ENABLE_ENABLE);

	BEGIN_NV04(chan, NV10_3D(TEX_FILTER(unit)), 1);
	if (pict->filter == PictFilterNearest)
		OUT_RING(chan, (NV10_3D_TEX_FILTER_MAGNIFY_NEAREST |
				NV10_3D_TEX_FILTER_MINIFY_NEAREST));
	else
		OUT_RING(chan, (NV10_3D_TEX_FILTER_MAGNIFY_LINEAR |
				NV10_3D_TEX_FILTER_MINIFY_LINEAR));

	return TRUE;
}
static void
nv10_hwctx_init(struct gl_context *ctx)
{
	struct nouveau_pushbuf *push = context_push(ctx);
	struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
	struct nv04_fifo *fifo = hw->chan->data;
	int i;

	BEGIN_NV04(push, NV01_SUBC(3D, OBJECT), 1);
	PUSH_DATA (push, hw->eng3d->handle);
	BEGIN_NV04(push, NV10_3D(DMA_NOTIFY), 1);
	PUSH_DATA (push, hw->ntfy->handle);

	BEGIN_NV04(push, NV10_3D(DMA_TEXTURE0), 3);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->gart);
	PUSH_DATA (push, fifo->gart);
	BEGIN_NV04(push, NV10_3D(DMA_COLOR), 2);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->vram);

	BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(RT_HORIZ), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_HORIZ(0)), 1);
	PUSH_DATA (push, 0x7ff << 16 | 0x800);
	BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_VERT(0)), 1);
	PUSH_DATA (push, 0x7ff << 16 | 0x800);

	for (i = 1; i < 8; i++) {
		BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_HORIZ(i)), 1);
		PUSH_DATA (push, 0);
		BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_VERT(i)), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, SUBC_3D(0x290), 1);
	PUSH_DATA (push, 0x10 << 16 | 1);
	BEGIN_NV04(push, SUBC_3D(0x3f4), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
	PUSH_DATA (push, 0);

	if (context_chipset(ctx) >= 0x17) {
		BEGIN_NV04(push, NV17_3D(UNK01AC), 2);
		PUSH_DATA (push, fifo->vram);
		PUSH_DATA (push, fifo->vram);

		BEGIN_NV04(push, SUBC_3D(0xd84), 1);
		PUSH_DATA (push, 0x3);

		BEGIN_NV04(push, NV17_3D(COLOR_MASK_ENABLE), 1);
		PUSH_DATA (push, 1);
	}

	if (context_chipset(ctx) >= 0x11) {
		BEGIN_NV04(push, SUBC_3D(0x120), 3);
		PUSH_DATA (push, 0);
		PUSH_DATA (push, 1);
		PUSH_DATA (push, 2);

		BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
	PUSH_DATA (push, 0);

	/* Set state */
	BEGIN_NV04(push, NV10_3D(FOG_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(ALPHA_FUNC_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(ALPHA_FUNC_FUNC), 2);
	PUSH_DATA (push, 0x207);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(TEX_ENABLE(0)), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(BLEND_FUNC_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(DITHER_ENABLE), 2);
	PUSH_DATA (push, 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(LINE_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(VERTEX_WEIGHT_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(BLEND_FUNC_SRC), 4);
	PUSH_DATA (push, 1);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0x8006);
	BEGIN_NV04(push, NV10_3D(STENCIL_MASK), 8);
	PUSH_DATA (push, 0xff);
	PUSH_DATA (push, 0x207);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0xff);
	PUSH_DATA (push, 0x1e00);
	PUSH_DATA (push, 0x1e00);
	PUSH_DATA (push, 0x1e00);
	PUSH_DATA (push, 0x1d01);
	BEGIN_NV04(push, NV10_3D(NORMALIZE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(FOG_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(LIGHT_MODEL), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(SEPARATE_SPECULAR_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(ENABLED_LIGHTS), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(POLYGON_OFFSET_POINT_ENABLE), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(DEPTH_FUNC), 1);
	PUSH_DATA (push, 0x201);
	BEGIN_NV04(push, NV10_3D(DEPTH_WRITE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(DEPTH_TEST_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(POLYGON_OFFSET_FACTOR), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(POINT_SIZE), 1);
	PUSH_DATA (push, 8);
	BEGIN_NV04(push, NV10_3D(POINT_PARAMETERS_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(LINE_WIDTH), 1);
	PUSH_DATA (push, 8);
	BEGIN_NV04(push, NV10_3D(LINE_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(POLYGON_MODE_FRONT), 2);
	PUSH_DATA (push, 0x1b02);
	PUSH_DATA (push, 0x1b02);
	BEGIN_NV04(push, NV10_3D(CULL_FACE), 2);
	PUSH_DATA (push, 0x405);
	PUSH_DATA (push, 0x901);
	BEGIN_NV04(push, NV10_3D(POLYGON_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(CULL_FACE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(TEX_GEN_MODE(0, 0)), 8);
	for (i = 0; i < 8; i++)
		PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(TEX_MATRIX_ENABLE(0)), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(FOG_COEFF(0)), 3);
	PUSH_DATA (push, 0x3fc00000);	/* -1.50 */
	PUSH_DATA (push, 0xbdb8aa0a);	/* -0.09 */
	PUSH_DATA (push, 0);		/*  0.00 */

	BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(FOG_MODE), 2);
	PUSH_DATA (push, 0x802);
	PUSH_DATA (push, 2);
	/* for some reason VIEW_MATRIX_ENABLE need to be 6 instead of 4 when
	 * using texturing, except when using the texture matrix
	 */
	BEGIN_NV04(push, NV10_3D(VIEW_MATRIX_ENABLE), 1);
	PUSH_DATA (push, 6);
	BEGIN_NV04(push, NV10_3D(COLOR_MASK), 1);
	PUSH_DATA (push, 0x01010101);

	/* Set vertex component */
	BEGIN_NV04(push, NV10_3D(VERTEX_COL_4F_R), 4);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	BEGIN_NV04(push, NV10_3D(VERTEX_COL2_3F_R), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(VERTEX_NOR_3F_X), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATAf(push, 1.0);
	BEGIN_NV04(push, NV10_3D(VERTEX_TX0_4F_S), 4);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	BEGIN_NV04(push, NV10_3D(VERTEX_TX1_4F_S), 4);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	BEGIN_NV04(push, NV10_3D(VERTEX_FOG_1F), 1);
	PUSH_DATAf(push, 0.0);
	BEGIN_NV04(push, NV10_3D(EDGEFLAG_ENABLE), 1);
	PUSH_DATA (push, 1);

	BEGIN_NV04(push, NV10_3D(DEPTH_RANGE_NEAR), 2);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 16777216.0);

	PUSH_KICK (push);
}
static void
nv20_hwctx_init(struct gl_context *ctx)
{
	struct nouveau_pushbuf *push = context_push(ctx);
	struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
	struct nv04_fifo *fifo = hw->chan->data;
	int i;

	BEGIN_NV04(push, NV01_SUBC(3D, OBJECT), 1);
	PUSH_DATA (push, hw->eng3d->handle);
	BEGIN_NV04(push, NV20_3D(DMA_NOTIFY), 1);
	PUSH_DATA (push, hw->ntfy->handle);
	BEGIN_NV04(push, NV20_3D(DMA_TEXTURE0), 2);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->gart);
	BEGIN_NV04(push, NV20_3D(DMA_COLOR), 2);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->vram);
	BEGIN_NV04(push, NV20_3D(DMA_VTXBUF0), 2);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->gart);

	BEGIN_NV04(push, NV20_3D(DMA_QUERY), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(RT_HORIZ), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_HORIZ(0)), 1);
	PUSH_DATA (push, 0xfff << 16 | 0x0);
	BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_VERT(0)), 1);
	PUSH_DATA (push, 0xfff << 16 | 0x0);

	for (i = 1; i < NV20_3D_VIEWPORT_CLIP_HORIZ__LEN; i++) {
		BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_HORIZ(i)), 1);
		PUSH_DATA (push, 0);
		BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_VERT(i)), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_MODE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, SUBC_3D(0x17e0), 3);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);

	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, NV20_3D(TEX_RCOMP), 1);
		PUSH_DATA (push, NV20_3D_TEX_RCOMP_LEQUAL | 0xdb0);
	} else {
		BEGIN_NV04(push, SUBC_3D(0x1e68), 1);
		PUSH_DATA (push, 0x4b800000); /* 16777216.000000 */
		BEGIN_NV04(push, NV20_3D(TEX_RCOMP), 1);
		PUSH_DATA (push, NV20_3D_TEX_RCOMP_LEQUAL);
	}

	BEGIN_NV04(push, SUBC_3D(0x290), 1);
	PUSH_DATA (push, 0x10 << 16 | 1);
	BEGIN_NV04(push, SUBC_3D(0x9fc), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, SUBC_3D(0x1d80), 1);
	PUSH_DATA (push, 1);
	BEGIN_NV04(push, SUBC_3D(0x9f8), 1);
	PUSH_DATA (push, 4);
	BEGIN_NV04(push, SUBC_3D(0x17ec), 3);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 0.0);

	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, SUBC_3D(0x1d88), 1);
		PUSH_DATA (push, 3);

		BEGIN_NV04(push, NV25_3D(DMA_HIERZ), 1);
		PUSH_DATA (push, fifo->vram);
		BEGIN_NV04(push, NV25_3D(UNK01AC), 1);
		PUSH_DATA (push, fifo->vram);
	}

	BEGIN_NV04(push, NV20_3D(DMA_FENCE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, SUBC_3D(0x1e98), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV04_GRAPH(3D, NOTIFY), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, SUBC_3D(0x120), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 1);
	PUSH_DATA (push, 2);

	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, SUBC_3D(0x1da4), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(RT_HORIZ), 2);
	PUSH_DATA (push, 0 << 16 | 0);
	PUSH_DATA (push, 0 << 16 | 0);

	BEGIN_NV04(push, NV20_3D(ALPHA_FUNC_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(ALPHA_FUNC_FUNC), 2);
	PUSH_DATA (push, NV20_3D_ALPHA_FUNC_FUNC_ALWAYS);
	PUSH_DATA (push, 0);

	for (i = 0; i < NV20_3D_TEX__LEN; i++) {
		BEGIN_NV04(push, NV20_3D(TEX_ENABLE(i)), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(TEX_SHADER_OP), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(TEX_SHADER_CULL_MODE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(RC_IN_ALPHA(0)), 4);
	PUSH_DATA (push, 0x30d410d0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_OUT_RGB(0)), 4);
	PUSH_DATA (push, 0x00000c00);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_ENABLE), 1);
	PUSH_DATA (push, 0x00011101);
	BEGIN_NV04(push, NV20_3D(RC_FINAL0), 2);
	PUSH_DATA (push, 0x130e0300);
	PUSH_DATA (push, 0x0c091c80);
	BEGIN_NV04(push, NV20_3D(RC_OUT_ALPHA(0)), 4);
	PUSH_DATA (push, 0x00000c00);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_IN_RGB(0)), 4);
	PUSH_DATA (push, 0x20c400c0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_COLOR0), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_CONSTANT_COLOR0(0)), 4);
	PUSH_DATA (push, 0x035125a0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0x40002000);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(MULTISAMPLE_CONTROL), 1);
	PUSH_DATA (push, 0xffff0000);
	BEGIN_NV04(push, NV20_3D(BLEND_FUNC_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(DITHER_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(STENCIL_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(BLEND_FUNC_SRC), 4);
	PUSH_DATA (push, NV20_3D_BLEND_FUNC_SRC_ONE);
	PUSH_DATA (push, NV20_3D_BLEND_FUNC_DST_ZERO);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, NV20_3D_BLEND_EQUATION_FUNC_ADD);
	BEGIN_NV04(push, NV20_3D(STENCIL_MASK), 7);
	PUSH_DATA (push, 0xff);
	PUSH_DATA (push, NV20_3D_STENCIL_FUNC_FUNC_ALWAYS);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0xff);
	PUSH_DATA (push, NV20_3D_STENCIL_OP_FAIL_KEEP);
	PUSH_DATA (push, NV20_3D_STENCIL_OP_ZFAIL_KEEP);
	PUSH_DATA (push, NV20_3D_STENCIL_OP_ZPASS_KEEP);

	BEGIN_NV04(push, NV20_3D(COLOR_LOGIC_OP_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, NV20_3D_COLOR_LOGIC_OP_OP_COPY);
	BEGIN_NV04(push, SUBC_3D(0x17cc), 1);
	PUSH_DATA (push, 0);
	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, SUBC_3D(0x1d84), 1);
		PUSH_DATA (push, 1);
	}
	BEGIN_NV04(push, NV20_3D(LIGHTING_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(LIGHT_MODEL), 1);
	PUSH_DATA (push, NV20_3D_LIGHT_MODEL_VIEWER_NONLOCAL);
	BEGIN_NV04(push, NV20_3D(SEPARATE_SPECULAR_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(LIGHT_MODEL_TWO_SIDE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(ENABLED_LIGHTS), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(NORMALIZE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(POLYGON_STIPPLE_PATTERN(0)),
		   NV20_3D_POLYGON_STIPPLE_PATTERN__LEN);
	for (i = 0; i < NV20_3D_POLYGON_STIPPLE_PATTERN__LEN; i++) {
		PUSH_DATA (push, 0xffffffff);
	}

	BEGIN_NV04(push, NV20_3D(POLYGON_OFFSET_POINT_ENABLE), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(DEPTH_FUNC), 1);
	PUSH_DATA (push, NV20_3D_DEPTH_FUNC_LESS);
	BEGIN_NV04(push, NV20_3D(DEPTH_WRITE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(DEPTH_TEST_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(POLYGON_OFFSET_FACTOR), 2);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	BEGIN_NV04(push, NV20_3D(DEPTH_CLAMP), 1);
	PUSH_DATA (push, 1);
	if (context_chipset(ctx) < 0x25) {
		BEGIN_NV04(push, SUBC_3D(0x1d84), 1);
		PUSH_DATA (push, 3);
	}
	BEGIN_NV04(push, NV20_3D(POINT_SIZE), 1);
	if (context_chipset(ctx) >= 0x25)
		PUSH_DATAf(push, 1.0);
	else
		PUSH_DATA (push, 8);

	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, NV20_3D(POINT_PARAMETERS_ENABLE), 1);
		PUSH_DATA (push, 0);
		BEGIN_NV04(push, SUBC_3D(0x0a1c), 1);
		PUSH_DATA (push, 0x800);
	} else {
		BEGIN_NV04(push, NV20_3D(POINT_PARAMETERS_ENABLE), 2);
		PUSH_DATA (push, 0);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(LINE_WIDTH), 1);
	PUSH_DATA (push, 8);
	BEGIN_NV04(push, NV20_3D(LINE_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(POLYGON_MODE_FRONT), 2);
	PUSH_DATA (push, NV20_3D_POLYGON_MODE_FRONT_FILL);
	PUSH_DATA (push, NV20_3D_POLYGON_MODE_BACK_FILL);
	BEGIN_NV04(push, NV20_3D(CULL_FACE), 2);
	PUSH_DATA (push, NV20_3D_CULL_FACE_BACK);
	PUSH_DATA (push, NV20_3D_FRONT_FACE_CCW);
	BEGIN_NV04(push, NV20_3D(POLYGON_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(CULL_FACE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(SHADE_MODEL), 1);
	PUSH_DATA (push, NV20_3D_SHADE_MODEL_SMOOTH);
	BEGIN_NV04(push, NV20_3D(POLYGON_STIPPLE_ENABLE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(TEX_GEN_MODE(0,0)),
		   4 * NV20_3D_TEX_GEN_MODE__ESIZE);
	for (i=0; i < 4 * NV20_3D_TEX_GEN_MODE__LEN; i++)
		PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(FOG_COEFF(0)), 3);
	PUSH_DATAf(push, 1.5);
	PUSH_DATAf(push, -0.090168);
	PUSH_DATAf(push, 0.0);
	BEGIN_NV04(push, NV20_3D(FOG_MODE), 2);
	PUSH_DATA (push, NV20_3D_FOG_MODE_EXP_SIGNED);
	PUSH_DATA (push, NV20_3D_FOG_COORD_FOG);
	BEGIN_NV04(push, NV20_3D(FOG_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(ENGINE), 1);
	PUSH_DATA (push, NV20_3D_ENGINE_FIXED);

	for (i = 0; i < NV20_3D_TEX_MATRIX_ENABLE__LEN; i++) {
		BEGIN_NV04(push, NV20_3D(TEX_MATRIX_ENABLE(i)), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(VERTEX_ATTR_4F_X(1)), 4 * 15);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	for (i = 0; i < 12; i++) {
		PUSH_DATAf(push, 0.0);
		PUSH_DATAf(push, 0.0);
		PUSH_DATAf(push, 0.0);
		PUSH_DATAf(push, 1.0);
	}

	BEGIN_NV04(push, NV20_3D(EDGEFLAG_ENABLE), 1);
	PUSH_DATA (push, 1);
	BEGIN_NV04(push, NV20_3D(COLOR_MASK), 1);
	PUSH_DATA (push, 0x00010101);
	BEGIN_NV04(push, NV20_3D(CLEAR_VALUE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(DEPTH_RANGE_NEAR), 2);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 16777216.0);

	BEGIN_NV04(push, NV20_3D(VIEWPORT_TRANSLATE_X), 4);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 16777215.0);

	BEGIN_NV04(push, NV20_3D(VIEWPORT_SCALE_X), 4);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 16777215.0 * 0.5);
	PUSH_DATAf(push, 65535.0);

	PUSH_KICK (push);
}
Beispiel #4
0
static Bool
setup_texture(NVPtr pNv, int unit, PicturePtr pict, PixmapPtr pixmap)
{
	struct nouveau_pushbuf *push = pNv->pushbuf;
	struct nouveau_bo *bo = nouveau_pixmap_bo(pixmap);
	unsigned reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
	unsigned h = pict->pDrawable->height;
	unsigned w = pict->pDrawable->width;
	unsigned format;

	format = NV10_3D_TEX_FORMAT_WRAP_T_CLAMP_TO_EDGE |
		 NV10_3D_TEX_FORMAT_WRAP_S_CLAMP_TO_EDGE |
		 log2i(w) << 20 | log2i(h) << 16 |
		 1 << 12 | /* lod == 1 */
		 get_tex_format(pNv, pict) |
		 0x50 /* UNK */;

	/* NPOT_SIZE expects an even number for width, we can round up uneven
	 * numbers here because EXA always gives 64 byte aligned pixmaps and
	 * for all formats we support 64 bytes represents an even number of
	 * pixels
	 */
	w = (w + 1) & ~1;

	BEGIN_NV04(push, NV10_3D(TEX_OFFSET(unit)), 1);
	PUSH_MTHDl(push, NV10_3D(TEX_OFFSET(unit)), bo, 0, reloc);
	BEGIN_NV04(push, NV10_3D(TEX_FORMAT(unit)), 1);
	PUSH_MTHDs(push, NV10_3D(TEX_FORMAT(unit)), bo, format, reloc,
			 NV10_3D_TEX_FORMAT_DMA0,
			 NV10_3D_TEX_FORMAT_DMA1);
	BEGIN_NV04(push, NV10_3D(TEX_ENABLE(unit)), 1 );
	PUSH_DATA (push, NV10_3D_TEX_ENABLE_ENABLE);
	BEGIN_NV04(push, NV10_3D(TEX_NPOT_PITCH(unit)), 1);
	PUSH_DATA (push, exaGetPixmapPitch(pixmap) << 16);
	BEGIN_NV04(push, NV10_3D(TEX_NPOT_SIZE(unit)), 1);
	PUSH_DATA (push, (w << 16) | h);
	BEGIN_NV04(push, NV10_3D(TEX_FILTER(unit)), 1);
	if (pict->filter == PictFilterNearest)
		PUSH_DATA(push, NV10_3D_TEX_FILTER_MAGNIFY_NEAREST |
				NV10_3D_TEX_FILTER_MINIFY_NEAREST);
	else
		PUSH_DATA(push, NV10_3D_TEX_FILTER_MAGNIFY_LINEAR |
				NV10_3D_TEX_FILTER_MINIFY_LINEAR);
	if (pict->transform) {
		BEGIN_NV04(push, NV10_3D(TEX_MATRIX_ENABLE(unit)), 1);
		PUSH_DATA (push, 1);
		BEGIN_NV04(push, NV10_3D(TEX_MATRIX(unit, 0)), 16);
		PUSH_DATAf(push, xFixedToFloat(pict->transform->matrix[0][0]));
		PUSH_DATAf(push, xFixedToFloat(pict->transform->matrix[0][1]));
		PUSH_DATAf(push, 0.f);
		PUSH_DATAf(push, xFixedToFloat(pict->transform->matrix[0][2]));
		PUSH_DATAf(push, xFixedToFloat(pict->transform->matrix[1][0]));
		PUSH_DATAf(push, xFixedToFloat(pict->transform->matrix[1][1]));
		PUSH_DATAf(push, 0.f);
		PUSH_DATAf(push, xFixedToFloat(pict->transform->matrix[1][2]));
		PUSH_DATAf(push, 0.0f);
		PUSH_DATAf(push, 0.0f);
		PUSH_DATAf(push, 0.0f);
		PUSH_DATAf(push, 0.0f);
		PUSH_DATAf(push, xFixedToFloat(pict->transform->matrix[2][0]));
		PUSH_DATAf(push, xFixedToFloat(pict->transform->matrix[2][1]));
		PUSH_DATAf(push, 0.0f);
		PUSH_DATAf(push, xFixedToFloat(pict->transform->matrix[2][2]));
	} else {
		BEGIN_NV04(push, NV10_3D(TEX_MATRIX_ENABLE(unit)), 1);
		PUSH_DATA (push, 0);
	}

	return TRUE;
}
void
nv30_fragtex_validate(struct nv30_context *nv30)
{
   struct pipe_screen *pscreen = &nv30->screen->base.base;
   struct nouveau_object *eng3d = nv30->screen->eng3d;
   struct nouveau_pushbuf *push = nv30->base.pushbuf;
   unsigned dirty = nv30->fragprog.dirty_samplers;

   while (dirty) {
      unsigned unit = ffs(dirty) - 1;
      struct nv30_sampler_view *sv = (void *)nv30->fragprog.textures[unit];
      struct nv30_sampler_state *ss = nv30->fragprog.samplers[unit];

      PUSH_RESET(push, BUFCTX_FRAGTEX(unit));

      if (ss && sv) {
         const struct nv30_texfmt *fmt = nv30_texfmt(pscreen, sv->pipe.format);
         struct pipe_resource *pt = sv->pipe.texture;
         struct nv30_miptree *mt = nv30_miptree(pt);
         unsigned min_lod, max_lod;
         u32 filter = sv->filt | (ss->filt & sv->filt_mask);
         u32 format = sv->fmt | ss->fmt;
         u32 enable = ss->en;

         /* handle base_level when not using a mip filter, min/max level
          * is unfortunately ignored by the hardware otherwise
          */
         if (ss->pipe.min_mip_filter == PIPE_TEX_MIPFILTER_NONE) {
            if (sv->base_lod)
               filter += 0x00020000; /* N/L -> NMN/LMN */
            max_lod = sv->base_lod;
            min_lod = sv->base_lod;
         } else {
            max_lod = MIN2(ss->max_lod + sv->base_lod, sv->high_lod);
            min_lod = MIN2(ss->min_lod + sv->base_lod, max_lod);
         }

         if (eng3d->oclass >= NV40_3D_CLASS) {
            /* this is a tad stupid of the hardware, but there's no non-rcomp
             * z16/z24 texture formats to be had, we have to suffer and lose
             * some precision to handle this case.
             */
            if (ss->pipe.compare_mode != PIPE_TEX_COMPARE_R_TO_TEXTURE) {
               if (fmt->nv40 == NV40_3D_TEX_FORMAT_FORMAT_Z16)
                  format |= NV40_3D_TEX_FORMAT_FORMAT_A8L8;
               else
               if (fmt->nv40 == NV40_3D_TEX_FORMAT_FORMAT_Z24)
                  format |= NV40_3D_TEX_FORMAT_FORMAT_A16L16;
               else
                  format |= fmt->nv40;
            } else {
               format |= fmt->nv40;
            }

            enable |= (min_lod << 19) | (max_lod << 7);
            enable |= NV40_3D_TEX_ENABLE_ENABLE;

            BEGIN_NV04(push, NV40_3D(TEX_SIZE1(unit)), 1);
            PUSH_DATA (push, sv->npot_size1);
         } else {
            /* this is a tad stupid of the hardware, but there's no non-rcomp
             * z16/z24 texture formats to be had, we have to suffer and lose
             * some precision to handle this case.
             */
            if (ss->pipe.compare_mode != PIPE_TEX_COMPARE_R_TO_TEXTURE) {
               if (fmt->nv30 == NV30_3D_TEX_FORMAT_FORMAT_Z16) {
                  if (ss->pipe.normalized_coords)
                     format |= NV30_3D_TEX_FORMAT_FORMAT_A8L8;
                  else
                     format |= NV30_3D_TEX_FORMAT_FORMAT_A8L8_RECT;
               } else
               if (fmt->nv30 == NV30_3D_TEX_FORMAT_FORMAT_Z24) {
                  if (ss->pipe.normalized_coords)
                     format |= NV30_3D_TEX_FORMAT_FORMAT_HILO16;
                  else
                     format |= NV30_3D_TEX_FORMAT_FORMAT_HILO16_RECT;
               } else {
                  if (ss->pipe.normalized_coords)
                     format |= fmt->nv30;
                  else
                     format |= fmt->nv30_rect;
               }
            } else {
               if (ss->pipe.normalized_coords)
                  format |= fmt->nv30;
               else
                  format |= fmt->nv30_rect;
            }

            enable |= NV30_3D_TEX_ENABLE_ENABLE;
            enable |= (min_lod << 18) | (max_lod << 6);
         }

         BEGIN_NV04(push, NV30_3D(TEX_OFFSET(unit)), 8);
         PUSH_MTHDl(push, NV30_3D(TEX_OFFSET(unit)), BUFCTX_FRAGTEX(unit),
                          mt->base.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
         PUSH_MTHDs(push, NV30_3D(TEX_FORMAT(unit)), BUFCTX_FRAGTEX(unit),
                          mt->base.bo, format, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD,
                          NV30_3D_TEX_FORMAT_DMA0,
                          NV30_3D_TEX_FORMAT_DMA1);
         PUSH_DATA (push, sv->wrap | (ss->wrap & sv->wrap_mask));
         PUSH_DATA (push, enable);
         PUSH_DATA (push, sv->swz);
         PUSH_DATA (push, filter);
         PUSH_DATA (push, sv->npot_size0);
         PUSH_DATA (push, ss->bcol);
         BEGIN_NV04(push, NV30_3D(TEX_FILTER_OPTIMIZATION(unit)), 1);
         PUSH_DATA (push, nv30->config.filter);
      } else {
         BEGIN_NV04(push, NV30_3D(TEX_ENABLE(unit)), 1);
         PUSH_DATA (push, 0);
      }

      dirty &= ~(1 << unit);
   }

   nv30->fragprog.dirty_samplers = 0;
}
Beispiel #6
0
void
nv20_emit_tex_obj(struct gl_context *ctx, int emit)
{
	const int i = emit - NOUVEAU_STATE_TEX_OBJ0;
	struct nouveau_pushbuf *push = context_push(ctx);
	const int bo_flags = NOUVEAU_BO_RD | NOUVEAU_BO_GART | NOUVEAU_BO_VRAM;
	struct gl_texture_object *t;
	struct nouveau_surface *s;
	struct gl_texture_image *ti;
	const struct gl_sampler_object *sa;
	uint32_t tx_format, tx_filter, tx_wrap, tx_enable;

	PUSH_RESET(push, BUFCTX_TEX(i));

	if (!ctx->Texture.Unit[i]._ReallyEnabled) {
		BEGIN_NV04(push, NV20_3D(TEX_ENABLE(i)), 1);
		PUSH_DATA (push, 0);

		context_dirty(ctx, TEX_SHADER);
		return;
	}

	t = ctx->Texture.Unit[i]._Current;
	s = &to_nouveau_texture(t)->surfaces[t->BaseLevel];
	ti = t->Image[0][t->BaseLevel];
	sa = _mesa_get_samplerobj(ctx, i);

	if (!nouveau_texture_validate(ctx, t))
		return;

	/* Recompute the texturing registers. */
	tx_format = ti->DepthLog2 << 28
		| ti->HeightLog2 << 24
		| ti->WidthLog2 << 20
		| NV20_3D_TEX_FORMAT_DIMS_2D
		| NV20_3D_TEX_FORMAT_NO_BORDER
		| 1 << 16;

	tx_wrap = nvgl_wrap_mode(sa->WrapR) << 16
		| nvgl_wrap_mode(sa->WrapT) << 8
		| nvgl_wrap_mode(sa->WrapS) << 0;

	tx_filter = nvgl_filter_mode(sa->MagFilter) << 24
		| nvgl_filter_mode(sa->MinFilter) << 16
		| 2 << 12;

	tx_enable = NV20_3D_TEX_ENABLE_ENABLE
		| log2i(sa->MaxAnisotropy) << 4;

	if (t->Target == GL_TEXTURE_RECTANGLE) {
		BEGIN_NV04(push, NV20_3D(TEX_NPOT_PITCH(i)), 1);
		PUSH_DATA (push, s->pitch << 16);
		BEGIN_NV04(push, NV20_3D(TEX_NPOT_SIZE(i)), 1);
		PUSH_DATA (push, s->width << 16 | s->height);

		tx_format |= get_tex_format_rect(ti);
	} else {
		tx_format |= get_tex_format_pot(ti);
	}

	if (sa->MinFilter != GL_NEAREST &&
	    sa->MinFilter != GL_LINEAR) {
		int lod_min = sa->MinLod;
		int lod_max = MIN2(sa->MaxLod, t->_MaxLambda);
		int lod_bias = sa->LodBias
			+ ctx->Texture.Unit[i].LodBias;

		lod_max = CLAMP(lod_max, 0, 15);
		lod_min = CLAMP(lod_min, 0, 15);
		lod_bias = CLAMP(lod_bias, 0, 15);

		tx_format |= NV20_3D_TEX_FORMAT_MIPMAP;
		tx_filter |= lod_bias << 8;
		tx_enable |= lod_min << 26
			| lod_max << 14;
	}

	/* Write it to the hardware. */
	BEGIN_NV04(push, NV20_3D(TEX_FORMAT(i)), 1);
	PUSH_MTHD (push, NV20_3D(TEX_FORMAT(i)), BUFCTX_TEX(i),
			 s->bo, tx_format, bo_flags | NOUVEAU_BO_OR,
			 NV20_3D_TEX_FORMAT_DMA0,
			 NV20_3D_TEX_FORMAT_DMA1);

	BEGIN_NV04(push, NV20_3D(TEX_OFFSET(i)), 1);
	PUSH_MTHDl(push, NV20_3D(TEX_OFFSET(i)), BUFCTX_TEX(i),
			 s->bo, s->offset, bo_flags);

	BEGIN_NV04(push, NV20_3D(TEX_WRAP(i)), 1);
	PUSH_DATA (push, tx_wrap);

	BEGIN_NV04(push, NV20_3D(TEX_FILTER(i)), 1);
	PUSH_DATA (push, tx_filter);

	BEGIN_NV04(push, NV20_3D(TEX_ENABLE(i)), 1);
	PUSH_DATA (push, tx_enable);

	context_dirty(ctx, TEX_SHADER);
}