static BOOL Hal_FlipBUff(USER_UART_HandleTypeDef *pHandle)
{
uint8_t tmp;
tmp = WhichLowBuffer(pHandle);
if(tmp==ERR)
return FALSE;
//disable interrupt
__HAL_UART_DISABLE_IT(&(pHandle->UartHandle), UART_IT_RXNE);
//save low buff to upbuff
pHandle->UpBufferPtr = pBuffTable[tmp];
pHandle->UpBufferCount = pHandle->UartHandle.RxXferSize - pHandle->UartHandle.RxXferCount;
//change the uart state
if(pHandle->UartHandle.State==HAL_UART_STATE_BUSY_TX_RX)
pHandle->UartHandle.State = HAL_UART_STATE_BUSY_TX;
else
pHandle->UartHandle.State = HAL_UART_STATE_READY;
//flip buffer
if(tmp==0)
HAL_UART_Receive_IT(&(pHandle->UartHandle), (uint8_t *)pBuffTable[1], HAL_BUFFER_SIZE);
else
HAL_UART_Receive_IT(&(pHandle->UartHandle), (uint8_t *)pBuffTable[0], HAL_BUFFER_SIZE);
__HAL_UART_ENABLE_IT(&(pHandle->UartHandle), UART_IT_RXNE);
return TRUE;
}
/**
* Abort the ongoing RX transaction It disables the enabled interrupt for RX and
* flush RX hardware buffer if RX FIFO is used
*
* @param obj The serial object
*/
void serial_rx_abort_asynch(serial_t *obj)
{
struct serial_s *obj_s = SERIAL_S(obj);
UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
// disable interrupts
__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
// clear flags
volatile uint32_t tmpval __attribute__((unused)) = huart->Instance->RDR; // Clear RXNE
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
// reset states
huart->RxXferCount = 0;
// update handle state
if (huart->RxState == HAL_UART_STATE_BUSY_TX_RX) {
huart->RxState = HAL_UART_STATE_BUSY_TX;
} else {
huart->RxState = HAL_UART_STATE_READY;
}
}
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
IRQn_Type irq_n = (IRQn_Type)0;
uint32_t vector = 0;
UartHandle.Instance = (USART_TypeDef *)(obj->uart);
if (obj->uart == UART_1) {
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
}
if (obj->uart == UART_2) {
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
}
if (obj->uart == UART_3) {
irq_n = USART3_4_IRQn;
vector = (uint32_t)&uart3_irq;
}
if (obj->uart == UART_4) {
irq_n = USART3_4_IRQn;
vector = (uint32_t)&uart4_irq;
}
if (enable) {
if (irq == RxIrq) {
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE);
} else { // TxIrq
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_TC);
}
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
} else { // disable
int all_disabled = 0;
if (irq == RxIrq) {
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
// Check if TxIrq is disabled too
if ((UartHandle.Instance->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1;
} else { // TxIrq
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_TXE);
// Check if RxIrq is disabled too
if ((UartHandle.Instance->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;
}
if (all_disabled) NVIC_DisableIRQ(irq_n);
}
}
static void uart_stm32_irq_err_disable(struct device *dev)
{
struct uart_stm32_data *data = DEV_DATA(dev);
UART_HandleTypeDef *UartHandle = &data->huart;
/* Disable FE, ORE interruptions */
__HAL_UART_DISABLE_IT(UartHandle, UART_IT_ERR);
/* Disable Line break detection */
__HAL_UART_DISABLE_IT(UartHandle, UART_IT_LBD);
/* Disable parity error interruption */
__HAL_UART_DISABLE_IT(UartHandle, UART_IT_PE);
}
static rt_err_t drv_control(struct rt_serial_device *serial,
int cmd, void *arg)
{
struct drv_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct drv_uart *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
NVIC_DisableIRQ(uart->irq);
/* disable interrupt */
__HAL_UART_DISABLE_IT(&uart->UartHandle, UART_IT_RXNE);
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
NVIC_EnableIRQ(uart->irq);
/* enable interrupt */
__HAL_UART_ENABLE_IT(&uart->UartHandle, UART_IT_RXNE);
break;
}
return RT_EOK;
}
static void uart_stm32_irq_rx_disable(struct device *dev)
{
struct uart_stm32_data *data = DEV_DATA(dev);
UART_HandleTypeDef *UartHandle = &data->huart;
__HAL_UART_DISABLE_IT(UartHandle, UART_IT_RXNE);
}
// this IRQ handler is set up to handle RXNE interrupts only
void uart_irq_handler(mp_uint_t uart_id) {
// get the uart object
pyb_uart_obj_t *self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1];
if (self == NULL) {
// UART object has not been set, so we can't do anything, not
// even disable the IRQ. This should never happen.
return;
}
if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) {
if (self->read_buf_len != 0) {
uint16_t next_head = (self->read_buf_head + 1) % self->read_buf_len;
if (next_head != self->read_buf_tail) {
// only read data if room in buf
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
int data = self->uart.Instance->RDR; // clears UART_FLAG_RXNE
#else
int data = self->uart.Instance->DR; // clears UART_FLAG_RXNE
#endif
data &= self->char_mask;
if (self->char_width == CHAR_WIDTH_9BIT) {
((uint16_t*)self->read_buf)[self->read_buf_head] = data;
} else {
self->read_buf[self->read_buf_head] = data;
}
self->read_buf_head = next_head;
} else { // No room: leave char in buf, disable interrupt
__HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE);
}
}
}
}
static inline int bluetoothDeInit_IT(void)
{
__HAL_UART_DISABLE_IT(&huart3, UART_IT_RXNE);
huart3.gState = HAL_UART_STATE_READY;
return HAL_OK;
}
/** Abort the ongoing RX transaction It disables the enabled interrupt for RX and
* flush RX hardware buffer if RX FIFO is used
*
* @param obj The serial object
*/
void serial_rx_abort_asynch(serial_t *obj)
{
UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
UartHandle.Instance = 0;
obj->rx_buff.buffer = 0;
obj->rx_buff.length = 0;
}
/** Abort the ongoing RX transaction It disables the enabled interrupt for RX and
* flush RX hardware buffer if RX FIFO is used
*
* @param obj The serial object
*/
void serial_rx_abort_asynch(serial_t *obj)
{
UART_HandleTypeDef *handle = &UartHandle[SERIAL_OBJ(index)];
__HAL_UART_DISABLE_IT(handle, UART_IT_RXNE);
// clear flags
__HAL_UART_CLEAR_PEFLAG(handle);
// reset states
handle->RxXferCount = 0;
// update handle state
handle->gState = HAL_UART_STATE_READY;
}
/**
* @brief 使能串口接收中断
* @param hcomm : 句柄
* @param en : true 使能
* @retval None
*/
void CommUsart_EnableIT(CommUsartType *hcomm, bool en)
{
if(en)
{
__HAL_UART_ENABLE_IT(hcomm->huart, UART_IT_RXNE);
}
else
{
__HAL_UART_DISABLE_IT(hcomm->huart, UART_IT_RXNE);
}
}
/**
* Abort the ongoing TX transaction. It disables the enabled interupt for TX and
* flush TX hardware buffer if TX FIFO is used
*
* @param obj The serial object
*/
void serial_tx_abort_asynch(serial_t *obj)
{
struct serial_s *obj_s = SERIAL_S(obj);
UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
__HAL_UART_DISABLE_IT(huart, UART_IT_TC);
__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
// clear flags
__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
// reset states
huart->TxXferCount = 0;
// update handle state
if(huart->gState == HAL_UART_STATE_BUSY_TX_RX) {
huart->gState = HAL_UART_STATE_BUSY_RX;
} else {
huart->gState = HAL_UART_STATE_READY;
}
}
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
{
UART_HandleTypeDef *handle = &UartHandle[obj->serial.module];
IRQn_Type irq_n = UartIRQs[obj->serial.module];
uint32_t vector = uart_irq_vectors[obj->serial.module];
if (!irq_n || !vector)
return;
if (enable) {
if (irq == RxIrq) {
__HAL_UART_ENABLE_IT(handle, UART_IT_RXNE);
} else { // TxIrq
__HAL_UART_ENABLE_IT(handle, UART_IT_TC);
}
vIRQ_SetVector(irq_n, vector);
vIRQ_EnableIRQ(irq_n);
} else { // disable
int all_disabled = 0;
if (irq == RxIrq) {
__HAL_UART_DISABLE_IT(handle, UART_IT_RXNE);
// Check if TxIrq is disabled too
if ((handle->Instance->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1;
} else { // TxIrq
__HAL_UART_DISABLE_IT(handle, UART_IT_TXE);
// Check if RxIrq is disabled too
if ((handle->Instance->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;
}
if (all_disabled) vIRQ_DisableIRQ(irq_n);
}
}
void DisableUart2ReceiveData(UART_HandleTypeDef* pUart)
{
while(HAL_IS_BIT_SET(pUart->Instance->ISR, UART_FLAG_RXNE)) { }
__HAL_UART_DISABLE_IT(pUart, UART_IT_RXNE);
/* Check if a transmit Process is ongoing or not */
if(pUart->gState == HAL_UART_STATE_BUSY_TX_RX)
{
pUart->gState = HAL_UART_STATE_BUSY_TX;
}
else
{
/* Disable the UART Parity Error Interrupt */
__HAL_UART_DISABLE_IT(pUart, UART_IT_PE);
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
__HAL_UART_DISABLE_IT(pUart, UART_IT_ERR);
pUart->gState = HAL_UART_STATE_READY;
}
HAL_UART_RxCpltCallback(pUart);
}
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
uint32_t tmp1, tmp2;
tmp1 = __HAL_UART_GET_FLAG(&huart1, UART_FLAG_IDLE);
tmp2 = __HAL_UART_GET_IT_SOURCE(&huart1, UART_IT_IDLE);
if((tmp1 != RESET) && (tmp2 != RESET))
{
__HAL_UART_DISABLE_IT(&huart1, UART_IT_IDLE);
__HAL_UART_CLEAR_IDLEFLAG(&huart1);
My_HAL_UART_IdleCallback(&huart1);
}
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
void UART_IRQProc(UART_CCB *uccb, UART_HandleTypeDef *UARTx)
{
uint32_t tmp1 = 0, tmp2 = 0;
tmp1 = __HAL_UART_GET_FLAG(UARTx, UART_FLAG_PE);
tmp2 = __HAL_UART_GET_IT_SOURCE(UARTx, UART_IT_PE);
/* UART parity error interrupt occurred ------------------------------------*/
if((tmp1 != RESET) && (tmp2 != RESET))
{
__HAL_UART_CLEAR_FLAG(UARTx, UART_FLAG_PE);
UARTx->ErrorCode |= HAL_UART_ERROR_PE;
}
tmp1 = __HAL_UART_GET_FLAG(UARTx, UART_FLAG_FE);
tmp2 = __HAL_UART_GET_IT_SOURCE(UARTx, UART_IT_ERR);
/* UART frame error interrupt occurred -------------------------------------*/
if((tmp1 != RESET) && (tmp2 != RESET))
{
__HAL_UART_CLEAR_FLAG(UARTx, UART_FLAG_FE);
UARTx->ErrorCode |= HAL_UART_ERROR_FE;
}
tmp1 = __HAL_UART_GET_FLAG(UARTx, UART_FLAG_NE);
tmp2 = __HAL_UART_GET_IT_SOURCE(UARTx, UART_IT_ERR);
/* UART noise error interrupt occurred -------------------------------------*/
if((tmp1 != RESET) && (tmp2 != RESET))
{
__HAL_UART_CLEAR_FLAG(UARTx, UART_FLAG_NE);
UARTx->ErrorCode |= HAL_UART_ERROR_NE;
}
tmp1 = __HAL_UART_GET_FLAG(UARTx, UART_FLAG_ORE);
tmp2 = __HAL_UART_GET_IT_SOURCE(UARTx, UART_IT_ERR);
/* UART Over-Run interrupt occurred ----------------------------------------*/
if((tmp1 != RESET) && (tmp2 != RESET))
{
__HAL_UART_CLEAR_FLAG(UARTx, UART_FLAG_ORE);
UARTx->ErrorCode |= HAL_UART_ERROR_ORE;
}
tmp1 = __HAL_UART_GET_FLAG(UARTx, UART_FLAG_RXNE);
tmp2 = __HAL_UART_GET_IT_SOURCE(UARTx, UART_IT_RXNE);
/* UART in mode Receiver ---------------------------------------------------*/
if((tmp1 != RESET) && (tmp2 != RESET))
{
//UART_Receive_IT(UARTx);
*uccb->gpUartRxAddress++ = (uint8_t)(UARTx->Instance->DR & (uint8_t)0x00FF);
if(uccb->gpUartRxAddress == uccb->gpUartRxEndAddress)
{
//回头
uccb->gpUartRxAddress = uccb->gpUartRxStartAddress;
}
if(uccb->gpUartRxReadAddress == uccb->gpUartRxAddress)
{
//可以考虑加错误统计
}
__HAL_UART_CLEAR_FLAG(UARTx, UART_FLAG_RXNE);
#if (LED_UART_EN > 0u)
LED_UART_ON();
#endif
}
tmp1 = __HAL_UART_GET_FLAG(UARTx, UART_FLAG_TXE);
tmp2 = __HAL_UART_GET_IT_SOURCE(UARTx, UART_IT_TXE);
/* UART in mode Transmitter ------------------------------------------------*/
if((tmp1 != RESET) && (tmp2 != RESET))
{
//UART_Transmit_IT(UARTx);
if(uccb->gUartTxCnt > 0)
{
UARTx->Instance->DR = (uint8_t)(*uccb->gpUartTxAddress++ & (uint8_t)0x00FF);
uccb->gUartTxCnt--;
}
else
{
__HAL_UART_DISABLE_IT(UARTx, UART_IT_TXE);
}
__HAL_UART_CLEAR_FLAG(UARTx, UART_FLAG_TXE);
#if (LED_UART_EN > 0u)
LED_UART_ON();
#endif
}
if(UARTx->ErrorCode != HAL_UART_ERROR_NONE)
{
/* Set the UART state ready to be able to start again the process */
UARTx->State = HAL_UART_STATE_READY;
HAL_UART_ErrorCallback(UARTx);
}
}
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
{
IRQn_Type irq_n = (IRQn_Type)0;
uint32_t vector = 0;
#if DEVICE_SERIAL_ASYNCH_DMA
IRQn_Type irqn_dma = (IRQn_Type)0;
uint32_t vector_dma = 0;
#endif
UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
switch (SERIAL_OBJ(uart)) {
case UART_1:
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
break;
case UART_2:
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
break;
#if defined(USART3_BASE)
case UART_3:
irq_n = USART3_IRQn;
vector = (uint32_t)&uart3_irq;
break;
#endif
#if defined(UART4_BASE)
case UART_4:
irq_n = UART4_IRQn;
vector = (uint32_t)&uart4_irq;
#if DEVICE_SERIAL_ASYNCH_DMA
if (irq == RxIrq) {
irqn_dma = DMA1_Stream2_IRQn;
vector_dma = (uint32_t)&dma1_stream2_irq;
} else {
irqn_dma = DMA1_Stream4_IRQn;
vector_dma = (uint32_t)&dma1_stream4_irq;
}
#endif
break;
#endif
#if defined(UART5_BASE)
case UART_5:
irq_n = UART5_IRQn;
vector = (uint32_t)&uart5_irq;
break;
#endif
#if defined(USART6_BASE)
case UART_6:
irq_n = USART6_IRQn;
vector = (uint32_t)&uart6_irq;
break;
#endif
#if defined(UART7_BASE)
case UART_7:
irq_n = UART7_IRQn;
vector = (uint32_t)&uart7_irq;
break;
#endif
#if defined(UART8_BASE)
case UART_8:
irq_n = UART8_IRQn;
vector = (uint32_t)&uart8_irq;
break;
#endif
}
if (enable) {
if (irq == RxIrq) {
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE);
#if DEVICE_SERIAL_ASYNCH_DMA
NVIC_SetVector(irq_n, vector_dma);
NVIC_EnableIRQ(irq_n);
NVIC_SetVector(irqn_dma, vector_dma);
NVIC_EnableIRQ(irqn_dma);
#else
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
#endif
} else { // TxIrq
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_TC);
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
#if DEVICE_SERIAL_ASYNCH_DMA
NVIC_SetVector(irqn_dma, vector_dma);
NVIC_EnableIRQ(irqn_dma);
#endif
}
} else { // disable
int all_disabled = 0;
if (irq == RxIrq) {
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
// Check if TxIrq is disabled too
if ((UartHandle.Instance->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1;
} else { // TxIrq
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_TXE);
// Check if RxIrq is disabled too
if ((UartHandle.Instance->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;
}
if (all_disabled) {
NVIC_DisableIRQ(irq_n);
#if DEVICE_SERIAL_ASYNCH_DMA
NVIC_DisableIRQ(irqn_dma);
#endif
}
}
}
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
{
IRQn_Type irq_n = (IRQn_Type)0;
uint32_t vector = 0;
UartHandle.Instance = (USART_TypeDef *)(obj->uart);
switch (obj->uart) {
case UART_1:
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
break;
case UART_2:
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
break;
#if defined(USART3_BASE)
case UART_3:
irq_n = USART3_IRQn;
vector = (uint32_t)&uart3_irq;
break;
#endif
#if defined(UART4_BASE)
case UART_4:
irq_n = UART4_IRQn;
vector = (uint32_t)&uart4_irq;
break;
#endif
#if defined(UART5_BASE)
case UART_5:
irq_n = UART5_IRQn;
vector = (uint32_t)&uart5_irq;
break;
#endif
case UART_6:
irq_n = USART6_IRQn;
vector = (uint32_t)&uart6_irq;
break;
#if defined(UART7_BASE)
case UART_7:
irq_n = UART7_IRQn;
vector = (uint32_t)&uart7_irq;
break;
#endif
#if defined(UART8_BASE)
case UART_8:
irq_n = UART8_IRQn;
vector = (uint32_t)&uart8_irq;
break;
#endif
}
if (enable) {
if (irq == RxIrq) {
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE);
} else { // TxIrq
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_TC);
}
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
} else { // disable
int all_disabled = 0;
if (irq == RxIrq) {
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
// Check if TxIrq is disabled too
if ((UartHandle.Instance->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1;
} else { // TxIrq
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_TXE);
// Check if RxIrq is disabled too
if ((UartHandle.Instance->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;
}
if (all_disabled) NVIC_DisableIRQ(irq_n);
}
}
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
{
struct serial_s *obj_s = SERIAL_S(obj);
UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
IRQn_Type irq_n = (IRQn_Type)0;
uint32_t vector = 0;
if (obj_s->uart == UART_1) {
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
}
if (obj_s->uart == UART_2) {
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
}
#if defined(USART3_BASE)
if (obj_s->uart == UART_3) {
irq_n = USART3_IRQn;
vector = (uint32_t)&uart3_irq;
}
#endif
#if defined(UART4_BASE)
if (obj_s->uart == UART_4) {
irq_n = UART4_IRQn;
vector = (uint32_t)&uart4_irq;
}
#endif
#if defined(UART5_BASE)
if (obj_s->uart == UART_5) {
irq_n = UART5_IRQn;
vector = (uint32_t)&uart5_irq;
}
#endif
if (enable) {
if (irq == RxIrq) {
__HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
} else { // TxIrq
__HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
}
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
} else { // disable
int all_disabled = 0;
if (irq == RxIrq) {
__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
// Check if TxIrq is disabled too
if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) {
all_disabled = 1;
}
} else { // TxIrq
__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
// Check if RxIrq is disabled too
if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) {
all_disabled = 1;
}
}
if (all_disabled) {
NVIC_DisableIRQ(irq_n);
}
}
}
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
IRQn_Type irq_n = (IRQn_Type)0;
uint32_t vector = 0;
UartHandle.Instance = (USART_TypeDef *)(obj->uart);
if (obj->uart == UART_1) {
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
}
#if defined(USART2_BASE)
if (obj->uart == UART_2) {
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
}
#endif
#if defined (TARGET_STM32F091RC)
if (obj->uart == UART_3) {
irq_n = USART3_8_IRQn;
vector = (uint32_t)&uart3_irq;
}
if (obj->uart == UART_4) {
irq_n = USART3_8_IRQn;
vector = (uint32_t)&uart4_irq;
}
if (obj->uart == UART_5) {
irq_n = USART3_8_IRQn;
vector = (uint32_t)&uart5_irq;
}
if (obj->uart == UART_6) {
irq_n = USART3_8_IRQn;
vector = (uint32_t)&uart6_irq;
}
if (obj->uart == UART_7) {
irq_n = USART3_8_IRQn;
vector = (uint32_t)&uart7_irq;
}
if (obj->uart == UART_8) {
irq_n = USART3_8_IRQn;
vector = (uint32_t)&uart8_irq;
}
#elif defined (TARGET_STM32F030R8) || defined (TARGET_STM32F051R8)
#else
#if defined(USART3_BASE)
if (obj->uart == UART_3) {
irq_n = USART3_4_IRQn;
vector = (uint32_t)&uart3_irq;
}
#endif
#if defined(USART4_BASE)
if (obj->uart == UART_4) {
irq_n = USART3_4_IRQn;
vector = (uint32_t)&uart4_irq;
}
#endif
#endif
if (enable) {
if (irq == RxIrq) {
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE);
} else { // TxIrq
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_TC);
}
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
} else { // disable
int all_disabled = 0;
if (irq == RxIrq) {
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
// Check if TxIrq is disabled too
if ((UartHandle.Instance->CR1 & USART_CR1_TCIE) == 0) all_disabled = 1;
} else { // TxIrq
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_TC);
// Check if RxIrq is disabled too
if ((UartHandle.Instance->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;
}
if (all_disabled) NVIC_DisableIRQ(irq_n);
}
}
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
{
struct serial_s *obj_s = SERIAL_S(obj);
UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
IRQn_Type irq_n = (IRQn_Type)0;
uint32_t vector = 0;
switch (obj_s->index) {
case 0:
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
break;
case 1:
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
break;
#if defined(USART3_BASE)
case 2:
irq_n = USART3_IRQn;
vector = (uint32_t)&uart3_irq;
break;
#endif
#if defined(UART4_BASE)
case 3:
irq_n = UART4_IRQn;
vector = (uint32_t)&uart4_irq;
break;
#endif
#if defined(UART5_BASE)
case 4:
irq_n = UART5_IRQn;
vector = (uint32_t)&uart5_irq;
break;
#endif
#if defined(USART6_BASE)
case 5:
irq_n = USART6_IRQn;
vector = (uint32_t)&uart6_irq;
break;
#endif
#if defined(UART7_BASE)
case 6:
irq_n = UART7_IRQn;
vector = (uint32_t)&uart7_irq;
break;
#endif
#if defined(UART8_BASE)
case 7:
irq_n = UART8_IRQn;
vector = (uint32_t)&uart8_irq;
break;
#endif
}
if (enable) {
if (irq == RxIrq) {
__HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
} else { // TxIrq
__HAL_UART_ENABLE_IT(huart, UART_IT_TC);
}
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
} else { // disable
int all_disabled = 0;
if (irq == RxIrq) {
__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
// Check if TxIrq is disabled too
if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) {
all_disabled = 1;
}
} else { // TxIrq
__HAL_UART_DISABLE_IT(huart, UART_IT_TC);
// Check if RxIrq is disabled too
if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) {
all_disabled = 1;
}
}
if (all_disabled) {
NVIC_DisableIRQ(irq_n);
}
}
}