code *orthxmm(elem *e, regm_t *pretregs)
{ elem *e1 = e->E1;
elem *e2 = e->E2;
regm_t retregs = *pretregs & XMMREGS;
if (!retregs)
retregs = XMMREGS;
code *c = codelem(e1,&retregs,FALSE); // eval left leaf
unsigned reg = findreg(retregs);
regm_t rretregs = XMMREGS & ~retregs;
code *cr = scodelem(e2, &rretregs, retregs, TRUE); // eval right leaf
unsigned op = xmmoperator(e1->Ety, e->Eoper);
unsigned rreg = findreg(rretregs);
// float + ifloat is not actually addition
if ((e->Eoper == OPadd || e->Eoper == OPmin) &&
((tyreal(e1->Ety) && tyimaginary(e2->Ety)) ||
(tyreal(e2->Ety) && tyimaginary(e1->Ety))))
{
retregs |= rretregs;
c = cat(c, cr);
if (e->Eoper == OPmin)
{
unsigned nretregs = XMMREGS & ~retregs;
unsigned sreg; // hold sign bit
unsigned sz = tysize[tybasic(e1->Ety)];
c = cat(c,allocreg(&nretregs,&sreg,e2->Ety));
targ_size_t signbit = 0x80000000;
if (sz == 8)
signbit = 0x8000000000000000LL;
c = cat(c, movxmmconst(sreg, sz, signbit, 0));
c = cat(c, getregs(nretregs));
unsigned xop = (sz == 8) ? XORPD : XORPS; // XORPD/S rreg,sreg
c = cat(c, gen2(CNIL,xop,modregxrmx(3,rreg-XMM0,sreg-XMM0)));
}
if (retregs != *pretregs)
c = cat(c, fixresult(e,retregs,pretregs));
return c;
}
/* We should take advantage of mem addressing modes for OP XMM,MEM
* but we do not at the moment.
*/
code *cg;
if (OTrel(e->Eoper))
{
retregs = mPSW;
cg = NULL;
code *cc = gen2(CNIL,op,modregxrmx(3,rreg-XMM0,reg-XMM0));
return cat4(c,cr,cg,cc);
}
else
cg = getregs(retregs);
code *co = gen2(CNIL,op,modregxrmx(3,reg-XMM0,rreg-XMM0));
if (retregs != *pretregs)
co = cat(co,fixresult(e,retregs,pretregs));
return cat4(c,cr,cg,co);
}
int main()
{
colossal::job_generator gen1(
0.002616272, 5.009914, 2.174681, 3.394791,
2.532164, 4.070759, 6.570099, 0.9067149, 1.843567);
gen1.seed(time(NULL));
colossal::job_generator gen2(
0.004299325, 2.562229, 1.038189, 2.600581,
1.716938, 4.388895, 5.534811, 1.609197, 1.604422);
gen2.seed(time(NULL) + 1);
colossal::job j1 = gen1();
colossal::job j2 = gen2();
colossal::job_tracker jt(10000, 6000);
colossal::pool &mod = jt.add_pool("modeling", 1000, 1000, 1, 500, 5000, colossal::pool::SCHED_FAIR);
colossal::pool &prod = jt.add_pool("prod", 1000, 1000, 1, 500, 5000, colossal::pool::SCHED_FAIR);
mod.add_job(j1);
prod.add_job(j2);
jt.scale_minshares();
jt.process();
printf("------------ WORKLOAD ------------\n");
printf("%s\n", mod.to_str().c_str());
printf("%s\n", prod.to_str().c_str());
printf("----------------------------------\n");
return 0;
}
void load(void) {
if (A) gen("push A");
switch (Qi) {
case 'l': gen2("ll _%c,A", Qx);
break;
case 'g': gen2("lg _%c,A", Qx);
break;
}
Qi = 0;
A = 1;
}
int main()
{
M6502 *mpu = M6502_new(0, 0, 0); /* Make a 6502 */
unsigned pc = 0x1000; /* PC for 'assembly' */
/* Install the two callback functions defined above.
*/
M6502_setCallback(mpu, call, WRCH, wrch); /* Calling FFEE -> wrch() */
M6502_setCallback(mpu, call, 0, done); /* Calling 0 -> done() */
/* A few macros that dump bytes into the 6502's memory.
*/
# define gen1(X) (mpu->memory[pc++]= (uint8_t)(X))
# define gen2(X,Y) gen1(X); gen1(Y)
# define gen3(X,Y,Z) gen1(X); gen2(Y,Z)
/* Hand-assemble the program.
*/
gen2(0xA2, 'A' ); // LDX #'A'
gen1(0x8A ); // TXA
gen3(0x20,0xEE,0xFF); // JSR FFEE
gen1(0xE8 ); // INX
gen2(0xE0, 'Z'+1 ); // CPX #'Z'+1
gen2(0xD0, -9 ); // BNE 0x1002
gen2(0xA9, '\n' ); // LDA #'\n'
gen3(0x20,0xEE,0xFF); // JSR FFEE
gen2(0x00,0x00 ); // BRK
/* Just for fun: disssemble the program.
*/
{
char insn[64];
uint16_t ip= 0x1000;
while (ip < pc)
{
ip += M6502_disassemble(mpu, ip, insn);
printf("%04X %s\n", ip, insn);
}
}
/* Point the RESET vector at the first instruction in the assembled
* program.
*/
M6502_setVector(mpu, RST, 0x1000);
/* Reset the 6502 and run the program.
*/
M6502_reset(mpu);
M6502_run(mpu);
M6502_delete(mpu); /* We never reach here, but what the hey. */
return 0;
}
TEST(Random, MersenneUniform) {
int seed = 1352;
std::mt19937 gen(seed);
std::mt19937 gen2(seed);
std::uniform_real_distribution<double> generator;
// Testing the uniform distribution of the std lib
std::vector<double> result = {
0.746232984169, 0.6214472531558, 0.07805054426756, 0.9452625723383, 0.6160979423092, 0.2418893501668, 0.6896814322311, 0.1373470451893,
0.02127975324357, 0.8404690215785, 0.1431147904521, 0.80411805169, 0.6688147681812, 0.07062631205964, 0.2139421190067, 0.0518924846002,
0.5659795153539, 0.56592779773, 0.4419607026389, 0.3359767584969, 0.04341421739118, 0.07708582345306, 0.3726266202966, 0.6364503066832,
0.2849809223911, 0.8525376738432, 0.8231377376906, 0.2475516054916, 0.8801009460023, 0.6549141325375, 0.7337894224141, 0.6954526734387,
0.808164487914, 0.6641562129444, 0.4412771960671, 0.03091718935819, 0.9461238559848, 0.00534980234488, 0.4507561386272, 0.7635721218473,
0.7834604996263, 0.5841130671914, 0.8645133048538, 0.9714542920699, 0.5996237558528, 0.1320193635851, 0.7768479589041, 0.2323527694768,
0.05463676004764, 0.408083587752, 0.6369825399466, 0.5685970584032, 0.1235360900372, 0.9202423981236, 0.7115838618262, 0.02983485111151,
0.76981373137, 0.0867099417063, 0.07104946619888, 0.6242631153853, 0.9333818935535, 0.2555663074641, 0.5992051313843, 0.5401568983755,
0.7769657207188, 0.1981726659902, 0.1661893182446, 0.834562142064, 0.9424356488108, 0.04133228686251, 0.4650720410434, 0.07820202766968,
0.9884859219395, 0.1590063209914, 0.6488666015855, 0.7387352915971, 0.7585917578883, 0.5503377983743, 0.9244397353327, 0.6447530066677,
0.6129745757522, 0.2542404394466, 0.2026888834774, 0.2527748172769, 0.6740506770768, 0.9107106919416, 0.6213113793034, 0.1554119577284,
0.7805296694581, 0.660779124941, 0.7750959913801, 0.0938933767948, 0.6609784932051, 0.6148894861399, 0.4792942971708, 0.6545062197143,
0.6110897641314, 0.3611626664627, 0.2771070578171, 0.5601750233273};
//std::cout<< std::setprecision(13);
for (int i = 0; i < 100; ++i)
//std::cout << ", "<<generator(gen);
EXPECT_NEAR(result[i], generator(gen), 1.e-12);
// boost
boost::uniform_real<> dis;
boost::variate_generator<boost::mt19937, boost::uniform_real<>> gb(boost::mt19937(seed), dis);
// the std uniform distrib takes one number over 2 ?!
gb();
gen2();
std::cout << std::setprecision(13);
for (int i = 0; i < 100; ++i, gb(), gen2()) {
double x = gb();
std::cout << result[i] - x << " " << x << " " << x - double(gen2()) / (double(gen2.max()) + 1) << std::endl;
//EXPECT_NEAR(result[i], gb(), 1.e-12);
}
std::cout << "min " << gen.min() << " max " << gen.max() << std::endl;
//triqs::mc_tools::RandomGenerators::RandMT RAN(seed);
//for (int i = 0; i < 100; ++i) EXPECT_EQ(result[i], RAN());
}
code *xmmneg(elem *e,regm_t *pretregs)
{
//printf("xmmneg()\n");
//elem_print(e);
assert(*pretregs);
tym_t tyml = tybasic(e->E1->Ety);
int sz = tysize[tyml];
regm_t retregs = *pretregs & XMMREGS;
if (!retregs)
retregs = XMMREGS;
/* Generate:
* MOV reg,e1
* MOV rreg,signbit
* XOR reg,rreg
*/
code *cl = codelem(e->E1,&retregs,FALSE);
cl = cat(cl,getregs(retregs));
unsigned reg = findreg(retregs);
regm_t rretregs = XMMREGS & ~retregs;
unsigned rreg;
cl = cat(cl,allocreg(&rretregs,&rreg,tyml));
targ_size_t signbit = 0x80000000;
if (sz == 8)
signbit = 0x8000000000000000LL;
code *c = movxmmconst(rreg, sz, signbit, 0);
code *cg = getregs(retregs);
unsigned op = (sz == 8) ? XORPD : XORPS; // XORPD/S reg,rreg
code *co = gen2(CNIL,op,modregxrmx(3,reg-XMM0,rreg-XMM0));
co = cat(co,fixresult(e,retregs,pretregs));
return cat4(cl,c,cg,co);
}
BOOST_AUTO_TEST_CASE_TEMPLATE(generator_test, engine_type, engines)
{
typedef typename engine_type::result_type test_type;
engine_type gen;
gen.seed();
test_type a = gen.min();
test_type b = gen.max();
BOOST_CHECK(a < b);
a = gen();
//
// This extracts 32-bit values for use in seeding other sequences,
// not really applicable here, and not functional for signed types anyway.
//gen.generate(&b, &b + 1);
gen.discard(20);
typename engine_type::base_type base(gen.base());
std::stringstream ss;
ss << gen;
engine_type gen2;
ss >> gen2;
BOOST_CHECK(gen == gen2);
gen2();
BOOST_CHECK(gen != gen2);
//
// construction and seeding:
//
engine_type gen3(0);
gen3.seed(2);
}
void::Ball::reset()
{
Actor::reset();
// prepare some randomized (partly) move parameters for ball at reset
// (after scoring or loosing a point)
const short range = 2;
float options[range + 1] = {0.7f, 1.0f, 1.4f};
std::mt19937 gen((*rand)());
std::uniform_int_distribution<> dist(0, range);
float rndX = options[dist(gen)];
float rndY = options[dist(gen)];
std::mt19937 gen2((*rand)());
std::uniform_int_distribution<> trigger(0, 1);
int opposite = 1;
if (!trigger(gen)) opposite = -1;
// starting speed is the same on both axes
float defSpeed = StartSpeed[0];
Speed[0] = defSpeed * rndX * opposite;
Speed[1] = defSpeed * rndY * (opposite);
Boost = 0;
PrevBorCol = 0;
PrevColHor = PrevColVert = 0;
}
int main(int argc, char *argv[])
{
M6502 *mpu = M6502_new(0, 0, 0);
parse_args(argc, argv, mpu);
unsigned pc = 0x1000;
unsigned saved_pc;
M6502_setCallback(mpu, call, 0, done );
M6502_setCallback(mpu, call, 0xffee, oswrch);
gen2(0xa2, 0xff ); // LDX #&FF
gen1(0x9a ); // TXS
gen2(0xa9, 'A' ); // LDA #'A'
// LDA #'B' is 0xa9, 0x42. So if we execute a JSR at 0x42a7, it will
// push 0x42 and then 0xa9 onto the stack. Since the stack grows downwards
// those bytes will be in the right order for execution.
gen3(0x4c, 0xa7, 0x42); // JMP &42A7
pc = 0x42a7;
gen3(0x20, 0x00, 0x30); // JSR &3000
saved_pc = pc;
pc = 0x3000;
gen3(0x4c, 0xfe, 0x01); // JMP &01FE
pc = 0x200;
gen3(0x20, 0xee, 0xff); // JSR &FFEE
gen1(0x60 ); // RTS
pc = saved_pc;
// Let's do the same thing again, but this time code has already been
// executed from that address on the stack, so we're verifying the change
// is picked up. We do LDA #'C' this time, so we execute the JSR from
// 0x43a7.
gen3(0x4c, 0xa7, 0x43); // JMP &43A7
pc = 0x43a7;
gen3(0x20, 0x00, 0x30); // JSR &3000
gen2(0x00, 0x00 ); // BRK
M6502_setVector(mpu, RST, 0x1000);
M6502_reset(mpu);
M6502_run(mpu);
M6502_delete(mpu); /* We never reach here, but what the hey. */
return 0;
}
int main() {
srand((unsigned)time(NULL));
for (int i = 1; i <= 4; ++i) gen1(i);
for (int i = 5; i <= 8; ++i) gen2(i);
for (int i = 9; i <= 12; ++i) gen3(i);
for (int i = 13; i <= 16; ++i) gen4(i);
for (int i = 17; i <= 20; ++i) gen5(i);
return 0;
}
int main()
{
unsigned long seedv[4];
seedv[0]=1;
seedv[1]=2;
seedv[2]=3;
seedv[3]=4;
boost::random::seed_seq ss({1ul, 2ul, 3ul, 4ul});
boost::mt19937 gen2(ss);
}
int wr(M6502 *mpu, uint16_t address, uint8_t data)
{
if (address != 0x42)
{
abort();
}
unsigned pc = 0x6000;
gen2(0xa9, data); // LDA #data
gen3(0x4c, 0x00, 0x20); // JMP &2000
return 0;
}
void synth(int i) {
int g;
g = isupper(Qx);
if (!Qi) gen("pop X");
switch (i) {
case '+': if (!Qi)
gen("addr X,A");
else if (g)
gen2("addg _%c,A", Qx);
else
gen2("addl _%c,A", Qx);
break;
case '*': if (!Qi)
gen("mulr X,A");
else if (g)
gen2("mulg _%c,A", Qx);
else
gen2("mull _%c,A", Qx);
break;
case '-': if (!Qi) {
gen("swap A,X");
gen("subr X,A");
}
else if (g)
gen2("subg _%c,A", Qx);
else
gen2("subl _%c,A", Qx);
break;
case '/': if (!Qi) {
gen("swap A,X");
gen("divr X,A");
}
else if (g)
gen2("divg _%c,A", Qx);
else
gen2("divl _%c,A", Qx);
break;
}
Qi = 0;
}
static int
gen1(int len)
{
int i;
for(shmax=1; shmax<30; shmax++) {
valmax = 1<<shmax;
if(valmax >= mulval)
break;
}
if(mulval == 1)
return 1;
len--;
for(i=1; i<=shmax; i++)
if(gen2(len, 1<<i)) {
*--mulcp = 'a'+i;
return 1;
}
return 0;
}
code *movxmmconst(unsigned xreg, unsigned sz, targ_size_t value, regm_t flags)
{
/* Generate:
* MOV reg,value
* MOV xreg,reg
* Not so efficient. We should at least do a PXOR for 0.
*/
assert(mask[xreg] & XMMREGS);
assert(sz == 4 || sz == 8);
code *c;
if (I32 && sz == 8)
{
unsigned r;
regm_t rm = ALLREGS;
c = allocreg(&rm,&r,TYint); // allocate scratch register
union { targ_size_t s; targ_long l[2]; } u;
u.l[1] = 0;
u.s = value;
targ_long *p = &u.l[0];
c = movregconst(c,r,p[0],0);
c = genfltreg(c,0x89,r,0); // MOV floatreg,r
c = movregconst(c,r,p[1],0);
c = genfltreg(c,0x89,r,4); // MOV floatreg+4,r
unsigned op = xmmload(TYdouble);
c = genfltreg(c,op,xreg - XMM0,0); // MOVSD XMMreg,floatreg
}
else
{
unsigned reg;
c = regwithvalue(CNIL,ALLREGS,value,®,(sz == 8) ? 64 : 0);
c = gen2(c,LODD,modregxrmx(3,xreg-XMM0,reg)); // MOVD xreg,reg
if (sz == 8)
code_orrex(c, REX_W);
}
return c;
}
void pgsTestSuite::test_generator_string(void)
{
const int nb_iterations = 100;
// Generate empty strings because of inconsistent arguments
{
pgsStringGen gen1(0, 0, 10);
pgsStringGen gen2(10, 20, 0);
// pgsStringGen gen3(-10, -20, 10);
// pgsStringGen gen4(10, 20, -10);
TS_ASSERT(gen1.random() == wxT(""));
TS_ASSERT(gen2.random() == wxT(""));
// TS_ASSERT(gen3.random() == wxT(""));
// TS_ASSERT(gen4.random() == wxT(""));
}
// Generate strings with 'a' only
{
pgsVectorChar chars;
chars.Add(wxT('a'));
chars.Add(wxT('a'));
pgsStringGen gen(2, 2, 3, wxDateTime::GetTimeNow(), chars);
for (int i = 0; i < nb_iterations; i++)
{
TS_ASSERT(gen.random() == wxT("aa aa aa"));
}
}
// Test strings that are in fact numbers
// Test the size of generated strings
{
pgsVectorChar chars;
chars.Add(wxT('1'));
chars.Add(wxT('2'));
chars.Add(wxT('3'));
chars.Add(wxT('4'));
pgsStringGen gen(5, 5, 1, wxDateTime::GetTimeNow(), chars);
wxString result;
for (int i = 0; i < nb_iterations; i++)
{
result = gen.random();
long aux_res;
result.ToLong(&aux_res);
TS_ASSERT(MAPM(result.mb_str()) == aux_res && result.Length() == 5);
}
}
// Test the size of generated strings
{
pgsStringGen gen(10, 11, 3, 123);
pgsStringGen comparator(10, 11, 3, 123);
wxString result;
for (int i = 0; i < nb_iterations; i++)
{
result = gen.random();
TS_ASSERT(result == comparator.random());
TS_ASSERT(result.Length() >= 32 && result.Length() <= 35);
}
}
// Test copy constructor
{
// Create a generator and generate values
pgsStringGen gen(10, 11, 3, 123456789L);
wxString result, res_cmp;
for (int i = 0; i < nb_iterations / 2; i++)
{
result = gen.random();
}
// Copy this generator to a new one
// Both generators must generate the same values
pgsStringGen comparator(gen);
for (int i = nb_iterations / 2; i < nb_iterations; i++)
{
result = gen.random();
res_cmp = comparator.random();
TS_ASSERT(result == res_cmp);
}
}
// Test assignment operator
{
// Create two different generators and generate values
pgsStringGen gen(20, 30, 20);
pgsStringGen comparator(0, 0, 10);
wxString result, res_cmp;
for (int i = 0; i < nb_iterations / 2; i++)
{
result = gen.random();
res_cmp = comparator.random();
}
// Copy one of the generators to the other one
// Both generators must generate the same values
comparator = gen;
for (int i = nb_iterations / 2; i < nb_iterations; i++)
{
result = gen.random();
res_cmp = comparator.random();
TS_ASSERT(result == res_cmp);
}
}
}
code *xmmcnvt(elem *e,regm_t *pretregs)
{
code *c;
unsigned op=0, regs;
tym_t ty;
unsigned char rex = 0;
bool zx = false; // zero extend uint
/* There are no ops for integer <-> float/real conversions
* but there are instructions for them. In order to use these
* try to fuse chained conversions. Be careful not to loose
* precision for real to long.
*/
elem *e1 = e->E1;
switch (e->Eoper)
{
case OPd_f:
if (e1->Eoper == OPs32_d)
;
else if (I64 && e1->Eoper == OPs64_d)
rex = REX_W;
else if (I64 && e1->Eoper == OPu32_d)
{ rex = REX_W;
zx = true;
}
else
{ regs = XMMREGS;
op = CVTSD2SS;
ty = TYfloat;
break;
}
// directly use si2ss
regs = ALLREGS;
e1 = e1->E1;
op = CVTSI2SS;
ty = TYfloat;
break;
case OPs32_d: goto Litod;
case OPs64_d: rex = REX_W; goto Litod;
case OPu32_d: rex = REX_W; zx = true; goto Litod;
Litod:
regs = ALLREGS;
op = CVTSI2SD;
ty = TYdouble;
break;
case OPd_s32: ty = TYint; goto Ldtoi;
case OPd_u32: ty = TYlong; if (I64) rex = REX_W; goto Ldtoi;
case OPd_s64: ty = TYlong; rex = REX_W; goto Ldtoi;
Ldtoi:
regs = XMMREGS;
switch (e1->Eoper)
{
case OPf_d:
e1 = e1->E1;
op = CVTTSS2SI;
break;
case OPld_d:
if (e->Eoper == OPd_s64)
return cnvt87(e,pretregs); // precision
/* FALL-THROUGH */
default:
op = CVTTSD2SI;
break;
}
break;
case OPf_d:
regs = XMMREGS;
op = CVTSS2SD;
ty = TYdouble;
break;
}
assert(op);
c = codelem(e1, ®s, FALSE);
unsigned reg = findreg(regs);
if (reg >= XMM0)
reg -= XMM0;
else if (zx)
{ assert(I64);
c = cat(c,getregs(regs));
c = genregs(c,0x89,reg,reg); // MOV reg,reg to zero upper 32-bit
code_orflag(c,CFvolatile);
}
unsigned retregs = *pretregs;
if (tyxmmreg(ty)) // target is XMM
{ if (!(*pretregs & XMMREGS))
retregs = XMMREGS;
}
else // source is XMM
{ assert(regs & XMMREGS);
if (!(retregs & ALLREGS))
retregs = ALLREGS;
}
unsigned rreg;
c = cat(c,allocreg(&retregs,&rreg,ty));
if (rreg >= XMM0)
rreg -= XMM0;
c = gen2(c, op, modregxrmx(3,rreg,reg));
assert(I64 || !rex);
if (rex)
code_orrex(c, rex);
if (*pretregs != retregs)
c = cat(c,fixresult(e,retregs,pretregs));
return c;
}
code *xmmopass(elem *e,regm_t *pretregs)
{ elem *e1 = e->E1;
elem *e2 = e->E2;
tym_t ty1 = tybasic(e1->Ety);
unsigned sz1 = tysize[ty1];
regm_t rretregs = XMMREGS & ~*pretregs;
if (!rretregs)
rretregs = XMMREGS;
code *cr = codelem(e2,&rretregs,FALSE); // eval right leaf
unsigned rreg = findreg(rretregs);
code cs;
code *cl,*cg;
regm_t retregs;
unsigned reg;
bool regvar = FALSE;
if (config.flags4 & CFG4optimized)
{
// Be careful of cases like (x = x+x+x). We cannot evaluate in
// x if x is in a register.
unsigned varreg;
regm_t varregm;
if (isregvar(e1,&varregm,&varreg) && // if lvalue is register variable
doinreg(e1->EV.sp.Vsym,e2) // and we can compute directly into it
)
{ regvar = TRUE;
retregs = varregm;
reg = varreg; // evaluate directly in target register
cl = NULL;
cg = getregs(retregs); // destroy these regs
}
}
if (!regvar)
{
cl = getlvalue(&cs,e1,rretregs); // get EA
retregs = *pretregs & XMMREGS & ~rretregs;
if (!retregs)
retregs = XMMREGS & ~rretregs;
cg = allocreg(&retregs,®,ty1);
cs.Iop = xmmload(ty1); // MOVSD xmm,xmm_m64
code_newreg(&cs,reg - XMM0);
cg = gen(cg,&cs);
}
unsigned op = xmmoperator(e1->Ety, e->Eoper);
code *co = gen2(CNIL,op,modregxrmx(3,reg-XMM0,rreg-XMM0));
if (!regvar)
{
cs.Iop = xmmstore(ty1); // reverse operand order of MOVS[SD]
gen(co,&cs);
}
if (e1->Ecount || // if lvalue is a CSE or
regvar) // rvalue can't be a CSE
{
cl = cat(cl,getregs_imm(retregs)); // necessary if both lvalue and
// rvalue are CSEs (since a reg
// can hold only one e at a time)
cssave(e1,retregs,EOP(e1)); // if lvalue is a CSE
}
co = cat(co,fixresult(e,retregs,pretregs));
freenode(e1);
return cat4(cr,cl,cg,co);
}
/*--------------------------------------------------------------------*/
int
Csrc::gen_f1 ( float a[], int ntaps, int ncutoff, int nfilters, int m )
{
int i, j;
float x, alpha;
float a0[64];
int nt;
int am, dk;
// build filter from linear interp of pair of filter;
nt = ntaps; // ntaps should be even?
if ( nfilters > 1 )
nt--; // ntaps should be even?
if ( ncutoff > nt )
ncutoff = nt;
if ( ntaps <= 2 )
{ // linear interpolation
a0[0] = 0.0f;
a0[1] = 1.0f;
a0[2] = 0.0f;
}
else
{
a0[ntaps] = a0[0] = 0.0f;
//gen1(a0+1, nt, ncutoff, 0.0f, &x);
gen2 ( a0 + 1, nt, ncutoff, 0.0f, &x ); // lbr using gen2
//gen3(a0+1, nt, ncutoff, 0.0f); // lbr using gen2
fc_window ( a0 + 1, nt );
norm ( a0 + 1, nt ); // ??
}
/*---------------
for(i=0;i<nfilters;i++) {
//alpha = ((float)i + 0.5)/nfilters;
alpha = ((float)i)/nfilters;
for(j=0;j<ntaps;j++) a[j] = a0[j+1] + alpha*(a0[j]-a0[j+1]);
a+=ntaps;
}
---------------*/
// in order used by filter
am = 0;
for ( i = 0; i < nfilters; i++ )
{
alpha = ( ( float ) am ) / nfilters;
for ( j = 0; j < ntaps; j++ )
a[j] = a0[j + 1] + alpha * ( a0[j] - a0[j + 1] );
if ( ntaps == 1 )
a[0] = alpha; // compute as y = f0+alpha*f1-f0);
//if( ntaps == 1 ) a[0] = alpha + 0.5/nfilters; // compute as y = f0+alpha*f1-f0);
a += ntaps;
dk = src.k; // sample delta for next filtered output
am += m;
if ( am >= nfilters )
{
am = am - nfilters;
dk++;
}
}
return ntaps;
}
/*--------------------------------------------------------------------*/
static int
gen_f ( float a[], int ntaps, int ncutoff, int nfilters, int m )
{
int i;
float x, alpha;
int am;
// linear interp in order used by filter
if ( ntaps == 1 )
{
am = 0;
for ( i = 0; i < nfilters; i++ )
{
alpha = ( ( float ) am ) / nfilters;
a[0] = alpha; // compute as y = f0+alpha*f1-f0);
am += m;
if ( am >= nfilters )
am = am - nfilters;
a += ntaps;
}
return 0;
}
if ( ntaps == 2 )
{ // linear interpolation
am = 0;
for ( i = 0; i < nfilters; i++ )
{
alpha = ( ( float ) am ) / nfilters;
a[0] = 1.0f - alpha;
a[1] = alpha;
am += m;
if ( am >= nfilters )
am = am - nfilters;
a += ntaps;
}
return 0;
}
am = 0;
for ( i = 0; i < nfilters; i++ )
{
alpha = ( ( float ) am ) / nfilters;
alpha = alpha + 0.5f / nfilters - 0.5f; // filter center = 0.0
//gen1(a, ntaps, ncutoff, alpha, &x); // lbr using gen2
gen2 ( a, ntaps, ncutoff, alpha, &x ); // lbr using gen2
//gen3(a, ntaps, ncutoff, alpha); // never tested
fc_window ( a, ntaps );
norm ( a, ntaps );
//fc_window2(a, ntaps, x);
am += m;
if ( am >= nfilters )
am = am - nfilters;
//printf("\n alpha = %8.4f --------", alpha);
//outf4b(a, ntaps);
a += ntaps;
}
return 0;
}
int main(int argc, char *argv[])
{
M6502 *mpu = M6502_new(0, 0, 0);
parse_args(argc, argv, mpu);
unsigned pc = 0x1000;
unsigned saved_pc;
M6502_setCallback(mpu, call, 0xf000, done );
M6502_setCallback(mpu, call, 0xffee, oswrch);
gen2(0xa2, 0xff ); // LDX #&FF
gen1(0x9a ); // TXS
gen2(0xa9, 'A' ); // LDA #'A'
// LDA #'B' is 0xa9, 0x42. So if we execute a BRK at 0x42a7, it will
// push 0x42, 0xa9 and the flags onto the stack. Since the stack grows
// downwards those bytes will be in the right order for execution. We'll
// additionally push an LDX immediate opcode so we can "execute" the flags
// value. We can nearly force the flags to be whatever we like using PLP,
// although the BRK will set the B and X bits in the stacked value. We
// demonstrate this by explicitly masking off those bits in the values we
// force into the flags.
enum {
flagX= (1<<5), /* unused */
flagB= (1<<4) /* irq from brk */
};
uint8_t mask = ~(flagX | flagB);
gen2(0xa0, '0' & mask); // LDY #('0' with B/X masked off)
gen1(0x5a ); // PHY
gen1(0x28 ); // PLP
gen3(0x4c, 0xa7, 0x42); // JMP &42A7
pc = 0x42a7;
gen2(0x00, 0x00 ); // BRK
saved_pc = pc;
pc = 0x0; // BRK vector
gen2(0xa9, 0xa2 ); // LDA #<LDX # opcode>
gen1(0x48 ); // PHA
gen3(0x4c, 0xfc, 0x01); // JMP &01FC
pc = 0x200;
gen3(0x20, 0xee, 0xff); // JSR &FFEE
gen1(0x8a ); // TXA
gen3(0x20, 0xee, 0xff); // JSR &FFEE
gen1(0x68 ); // PLA
gen1(0x40 ); // RTI
pc = saved_pc;
// Let's do the same thing again, but this time code has already been
// executed from that address on the stack, so we're verifying the change
// is picked up. We do LDA #'C' this time, so we execute the BRK from
// 0x43a7.
gen2(0xa0, '1' & mask); // LDY #('1' with B/X masked off)
gen1(0x5a ); // PHY
gen1(0x28 ); // PLP
gen3(0x4c, 0xa7, 0x43); // JMP &43A7
pc = 0x43a7;
gen2(0x00, 0x00 ); // BRK
gen3(0x4c, 0x00, 0xf0); // JMP &F000 (quit)
M6502_setVector(mpu, RST, 0x1000);
M6502_reset(mpu);
M6502_run(mpu);
M6502_delete(mpu); /* We never reach here, but what the hey. */
return 0;
}
int main(int argc, char *argv[])
{
M6502 *mpu = M6502_new(0, 0, 0);
parse_args(argc, argv, mpu);
unsigned pc = 0x1000;
M6502_setCallback(mpu, call, 0, done);
M6502_setCallback(mpu, call, 0xffee, oswrch);
M6502_setCallback(mpu, write, 0x42, wr );
gen2(0xa9, '>' ); // LDA #'>'
gen3(0x20, 0xee, 0xff); // JSR &FFEE
gen2(0xa2, 'A' ); // LDX #'A'
gen3(0x8e, 0x42, 0x00); // STX &0042
gen3(0x20, 0x00, 0x60); // JSR &6000
gen1(0xe8 ); // INX
gen2(0xe0, 'Z'+1 ); // CPX #('Z'+1)
gen2(0x90, 0xf5 ); // BCC to STX
gen2(0xa0, 0x05 ); // LDY #&05
gen2(0xa9, '>' ); // LDA #'>'
gen3(0x20, 0xee, 0xff); // JSR &FFEE
gen2(0xa2, 'A' ); // LDX #'A'
gen2(0x96, 0x42-0x05 ); // STX (&42-&05),Y
gen3(0x20, 0x00, 0x60); // JSR &6000
gen1(0xe8 ); // INX
gen2(0xe0, 'Z'+1 ); // CPX #('Z'+1)
gen2(0x90, 0xf6 ); // BCC to STX
gen2(0x00, 0x00 ); // BRK
pc = 0x2000;
gen3(0x20, 0xee, 0xff); // JSR &FFEE
gen1(0x60 ); // RTS
M6502_setVector(mpu, RST, 0x1000);
M6502_reset(mpu);
M6502_run(mpu);
M6502_delete(mpu); /* We never reach here, but what the hey. */
return 0;
}