static void superio_init(void) { /* Set base address of power management unit */ pnp_set_logical_device(SUPERIO_CONFIG_PORT, 8); pnp_set_enable(SUPERIO_CONFIG_PORT, 0); pnp_set_iobase0(SUPERIO_CONFIG_PORT, PM_BASE); pnp_set_enable(SUPERIO_CONFIG_PORT, 1); /* Use on-chip clock multiplier */ outb(0x03, PM_BASE); outb(inb(PM_BASE + 1) | 0x07, PM_BASE + 1); /* Wait for the clock to stabilise */ while (!(inb(PM_BASE + 1) & 0x80)) ; /* Enable the serial ports. */ pnp_set_logical_device(SUPERIO_CONFIG_PORT, 6); /* COM1 */ pnp_set_enable(SUPERIO_CONFIG_PORT, 0); pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); pnp_set_enable(SUPERIO_CONFIG_PORT, 1); /* Set LDN 5 UART Mode */ outb(0x21, SUPERIO_CONFIG_PORT); outb(inb(SUPERIO_CONFIG_PORT + 1) | (1 << 3), SUPERIO_CONFIG_PORT + 1); pnp_set_logical_device(SUPERIO_CONFIG_PORT, 5); /* COM2 */ pnp_set_enable(SUPERIO_CONFIG_PORT, 0); pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x2f8); pnp_set_irq0(SUPERIO_CONFIG_PORT, 3); pnp_set_enable(SUPERIO_CONFIG_PORT, 1); }
static void superio_init(void) { pnp_enter_ext_func_mode_alt(SUPERIO_CONFIG_PORT); pnp_set_logical_device(SUPERIO_CONFIG_PORT, 4); /* COM1 */ pnp_set_enable(SUPERIO_CONFIG_PORT, 0); pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); pnp_set_enable(SUPERIO_CONFIG_PORT, 1); #if 0 /* Must route GPIO to UART2 before enabling this */ pnp_set_logical_device(SUPERIO_CONFIG_PORT, 5); /* COM2 */ pnp_set_enable(SUPERIO_CONFIG_PORT, 0); pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x2f8); pnp_set_irq0(SUPERIO_CONFIG_PORT, 3); pnp_set_enable(SUPERIO_CONFIG_PORT, 1); #endif pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); }
static void superio_init(void) { /* Enter the configuration state. */ pnp_enter_ext_func_mode(PNP_PORT); /* COMA */ pnp_set_logical_device(PNP_PORT, 2); pnp_set_enable(PNP_PORT, 0); pnp_set_iobase0(PNP_PORT, CONFIG_SERIAL_PORT); pnp_set_irq0(PNP_PORT, 4); pnp_set_enable(PNP_PORT, 1); /* Exit the configuration state. */ pnp_exit_ext_func_mode(PNP_PORT); }
static void superio_init(void) { /* Enter the configuration state. */ pnp_enter_ext_func_mode_alt(0x2e); /* COMA */ pnp_set_logical_device(0x2e, 4); pnp_set_enable(0x2e, 0); pnp_set_iobase0(0x2e, 0x3f8); pnp_set_irq0(0x2e, 4); pnp_set_enable(0x2e, 1); /* Exit the configuration state. */ pnp_exit_ext_func_mode(0x2e); }
static void superio_init(void) { pnp_enter_ext_func_mode(0x2e); pnp_set_logical_device(0x2e, 2); // COM-A pnp_set_enable(0x2e, 0); pnp_set_iobase0(0x2e, 0x3f8); pnp_set_irq0(0x2e, 4); pnp_set_enable(0x2e, 1); pnp_set_logical_device(0x2e, 3); // COM-B pnp_set_enable(0x2e, 0); pnp_set_iobase0(0x2e, 0x2f8); pnp_set_irq0(0x2e, 3); pnp_set_enable(0x2e, 1); pnp_exit_ext_func_mode(0x2e); pnp_enter_ext_func_mode(0x4e); // Set COM3 to sane non-conflicting values pnp_set_logical_device(0x4e, 2); // COM-A pnp_set_enable(0x4e, 0); pnp_set_iobase0(0x4e, 0x3e8); pnp_set_irq0(0x4e, 11); pnp_set_enable(0x4e, 1); // Set COM4 to sane non-conflicting values pnp_set_logical_device(0x4e, 3); // COM-B pnp_set_enable(0x4e, 0); pnp_set_iobase0(0x4e, 0x2e8); pnp_set_irq0(0x4e, 10); pnp_set_enable(0x4e, 1); pnp_exit_ext_func_mode(0x4e); }
static void superio_init(void) { pnp_enter_ext_func_mode_ite(SUPERIO_CONFIG_PORT); /* Disable the watchdog. */ pnp_set_logical_device(SUPERIO_CONFIG_PORT, 7); pnp_write_register(SUPERIO_CONFIG_PORT, 0x72, 0x00); /* Enable the serial port. */ pnp_set_logical_device(SUPERIO_CONFIG_PORT, 1); /* COM1 */ pnp_set_enable(SUPERIO_CONFIG_PORT, 0); pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); pnp_set_enable(SUPERIO_CONFIG_PORT, 1); pnp_exit_ext_func_mode_ite(SUPERIO_CONFIG_PORT); }