Beispiel #1
0
STATIC_PREFIX int run_cmd(char * cmd)
{
    int argc;
    char * argv[4]={NULL,NULL,NULL,NULL};
    char * str;
    for(argc=0,str=cmd;argc<4;argc++)
    {
        while(*str==0x20)
            str++;
        if(*str==0)
            break;
        if(*str=='"')
        {
            argv[argc]=++str;
            while(*str!='"'&&*str!=0)
                str++;
            if(*str==0)
                break;
            *str++=0;
            continue;
        }
        argv[argc]=str;
        while(*str!=0x20&&*str!=0)
            str++;
        if(*str==0)
        {
            argc++;
            break;
        }
        *str++=0;
    }
    if(argc==0)
        return 1;
    switch(argv[0][0])
    {
    case 'w':
        debug_write_reg(argc,argv);
        break;
    case 'r':
        debug_read_reg(argc,argv);
        break;
#if (defined AML_DEBUGROM)||(CONFIG_ENABLE_SPL_MORE_CMD)
    case 'P':
        memory_pll_init(argc,argv);
        break;
    case 'S':
        show_setting_addr(argc,argv);
        break;
    case 'M':
        debugrom_ddr_init(argc,argv);
        break;
    case 'm':
        clk_msr(argc,argv);
        break;
    case 'B':
        debugrom_set_start(argc,argv);
        break;
#endif 
#if (defined AML_DEBUGROM)
    case 's':
        debugrom_save_to_spi(argc,argv);
        break;
    case 'c':
        caculate_sum(argc,argv);
        break;
#endif  
    case 'a':
        start_arc(argc,argv);
        break;  
    case 't':
    		restart_arm();
    		break;
    case 'q':
        return 0;
    }
    return 1;
}
Beispiel #2
0
void enter_power_down()
{
	int i;
	unsigned int uboot_cmd_flag=readl(P_AO_RTI_STATUS_REG2);//u-boot suspend cmd flag
	unsigned int vcin_state = 0;

    int voltage   = 0;
    int axp_ocv = 0;
	int wdt_flag;
	// First, we disable all memory accesses.

	f_serial_puts("step 1\n");

	asm(".long 0x003f236f"); //add sync instruction.

	store_restore_plls(0);

	f_serial_puts("ddr self-refresh\n");
	wait_uart_empty();

	ddr_self_refresh();

 	f_serial_puts("CPU off...\n");
 	wait_uart_empty();
	cpu_off();
	f_serial_puts("CPU off done\n");
	wait_uart_empty();
#ifdef CONFIG_CEC_WAKEUP
    hdmi_cec_func_config = readl(P_AO_DEBUG_REG0); 
    f_serial_puts("CEC M8:uboot: P_AO_DEBUG_REG0:\n");
    serial_put_hex(hdmi_cec_func_config,32);
    f_serial_puts("\n");
#endif
 	if(p_arc_pwr_op->power_off_at_24M)
		p_arc_pwr_op->power_off_at_24M();

#ifdef CONFIG_M201_COSTDOWN
	/* for led */
    clrbits_le32(P_AO_GPIO_O_EN_N,1<<18);
	setbits_le32(P_AO_GPIO_O_EN_N,1<<29);
#endif
	
//	while(readl(0xc8100000) != 0x13151719)
//	{}

//non 32k crystal oscillator platform DONT enter 32k in suspend mode
#ifndef CONFIG_NON_32K
	switch_24M_to_32K();
#endif 
	if(p_arc_pwr_op->power_off_at_32K_1)
		p_arc_pwr_op->power_off_at_32K_1();

	if(p_arc_pwr_op->power_off_at_32K_2)
		p_arc_pwr_op->power_off_at_32K_2();
	

	// gate off:  bit0: REMOTE;   bit3: UART
#ifndef CONFIG_NON_32K
	writel(readl(P_AO_RTI_GEN_CNTL_REG0)&(~(0x8)),P_AO_RTI_GEN_CNTL_REG0);
#endif
	if(uboot_cmd_flag == 0x87654321)//u-boot suspend cmd flag
	{
		if(p_arc_pwr_op->power_off_ddr15)
			p_arc_pwr_op->power_off_ddr15();
	}

	wdt_flag=readl(P_WATCHDOG_TC)&(1<<19);
	if(wdt_flag)
		writel(readl(P_WATCHDOG_TC)&(~(1<<19)),P_WATCHDOG_TC);
#if 1
	vcin_state = p_arc_pwr_op->detect_key(uboot_cmd_flag);
#else
	for(i=0;i<10;i++)
	{
		udelay__(1000);
		//udelay(1000);
	}
#endif

	if(uboot_cmd_flag == 0x87654321)//u-boot suspend cmd flag
	{
		if(p_arc_pwr_op->power_on_ddr15)
			p_arc_pwr_op->power_on_ddr15();
	}
	if(wdt_flag)
		writel((6*7812|((1<<16)-1))|(1<<19),P_WATCHDOG_TC);

// gate on:  bit0: REMOTE;   bit3: UART
	writel(readl(P_AO_RTI_GEN_CNTL_REG0)|0x8,P_AO_RTI_GEN_CNTL_REG0);

	if(p_arc_pwr_op->power_on_at_32K_2)
		p_arc_pwr_op->power_on_at_32K_2();

	if(p_arc_pwr_op->power_on_at_32K_1)
		p_arc_pwr_op->power_on_at_32K_1();

#ifndef CONFIG_NON_32K
	switch_32K_to_24M();
#endif

	// power on even more domains
	if(p_arc_pwr_op->power_on_at_24M)
		p_arc_pwr_op->power_on_at_24M();

 	uart_reset();
	f_serial_puts("step 8: ddr resume\n");
	wait_uart_empty();
	ddr_resume();

#ifdef CONFIG_M201_COSTDOWN
	/* for led */
    clrbits_le32(P_AO_GPIO_O_EN_N,1<<29);
	setbits_le32(P_AO_GPIO_O_EN_N,1<<18);
#endif
	
	f_serial_puts("restore pll\n");
	wait_uart_empty();
	store_restore_plls(1);//Before switch back to clk81, we need set PLL

	if (uboot_cmd_flag == 0x87654321 && (vcin_state == FLAG_WAKEUP_PWROFF)) {
		/*
		 * power off system before ARM is restarted
		 */
		f_serial_puts("no extern power shutdown\n");
		wait_uart_empty();
		p_arc_pwr_op->shut_down();
		do {
			udelay__(2000 * 100);
			f_serial_puts("wait shutdown...\n");
			wait_uart_empty();
		}while(1);
	}
#ifdef CONFIG_MESON_TRUSTZONE
	copy_reboot_code(temp_arm_base);
#else
	copy_reboot_code(NULL);
#endif
	writel(vcin_state,P_AO_RTI_STATUS_REG2);
	f_serial_puts("restart arm\n");
	wait_uart_empty();
	restart_arm();

    if (uboot_cmd_flag == 0x87654321) {
        writel(0,P_AO_RTI_STATUS_REG2);
        writel(readl(P_AO_RTI_PWR_CNTL_REG0)|(1<<4),P_AO_RTI_PWR_CNTL_REG0);
        clrbits_le32(P_HHI_SYS_CPU_CLK_CNTL,1<<19);
        //writel(10,0xc1109904);
        writel(1<<19|1<<24|10,0xc1109900);
        
        do{udelay__(200);f_serial_puts("wait reset...\n");wait_uart_empty();}while(1);
    }
}