void ExtiInitLocal(void){ chSysLock(); starttacho_vt(); chSysUnlock(); #if !GYRO_UPDATE_PERIOD_HARDCODED tmObjectInit(&itg3200_tmup); #endif /* !GYRO_UPDATE_PERIOD_HARDCODED */ tmObjectInit(&tacho_tmup); extStart(&EXTD1, &extcfg); }
static void cmd_erase(BaseSequentialStream *chp, int argc, char *argv[]) { uint32_t counter = 0; uint32_t uwReadwritestatus = 0; TimeMeasurement tm; (void)argv; if (argc > 0) { chprintf(chp, "Usage: erase\r\n"); return; } tmObjectInit(&tm); //XXX tmStartMeasurement(&tm); /* Write data value to all SDRAM memory */ /* Erase SDRAM memory */ for (counter = 0; counter < IS42S16400J_SIZE; counter++) { *(__IO uint8_t*) (SDRAM_BANK_ADDR + counter) = (uint8_t)0x0; } //XXX tmStopMeasurement(&tm); uint32_t write_ms = 0;//XXX RTT2MS(tm.last); if (!uwReadwritestatus) { chprintf(chp, "SDRAM erased in %dms.\r\n", write_ms); } }
BOOL xMBPortTimersInit( USHORT usTim1Timerout50us ) { timerout = usTim1Timerout50us*((500*1000)/gptcfg.frequency); gptStart(&GPTDRIVER, &gptcfg); #ifdef DEBUG_MB tmObjectInit (&tm); #endif return TRUE; }
/** * @brief Initializes the Time Measurement unit. * * @init */ void tmInit(void) { TimeMeasurement tm; /* Time Measurement subsystem calibration, it does a null measurement and calculates the call overhead which is subtracted to real measurements.*/ measurement_offset = 0; tmObjectInit(&tm); tmStartMeasurement(&tm); tmStopMeasurement(&tm); measurement_offset = tm.last; }
void setup_IMU() { tmObjectInit(&lagedatalogsync_tmup); I2CInitialize(); mpu.initialize(); devStatus = mpu.dmpInitialize(); if (devStatus == 0) { //chThdCreateStatic(LageSyncThreadWorkingArea, sizeof(LageSyncThreadWorkingArea), NORMALPRIO, LageSyncthread, NULL); mpu.setDMPEnabled(true); mpuIntStatus = mpu.getIntStatus(); dmpReady = true; packetSize = mpu.dmpGetFIFOPacketSize(); } }
static void cmd_check(BaseSequentialStream *chp, int argc, char *argv[]) { uint32_t counter = 0; uint8_t ubWritedata_8b = 0x3C, ubReaddata_8b = 0; uint32_t uwReadwritestatus = 0; TimeMeasurement tm; (void)argv; if (argc > 0) { chprintf(chp, "Usage: check\r\n"); return; } tmObjectInit(&tm); tmStartMeasurement(&tm); /* Read back SDRAM memory and check content correctness*/ counter = 0; uwReadwritestatus = 0; while ((counter < IS42S16400J_SIZE) && (uwReadwritestatus == 0)) { ubReaddata_8b = *(__IO uint8_t*)(SDRAM_BANK_ADDR + counter); if ( ubReaddata_8b != (uint8_t)(ubWritedata_8b + counter)) { uwReadwritestatus = 1; chprintf(chp, "Error at %d, expected %d but read %d.\r\n", counter, ubWritedata_8b + counter, ubReaddata_8b); } counter++; } tmStopMeasurement(&tm); uint32_t check_ms = RTT2MS(tm.last); //FIXME time this if (!uwReadwritestatus) { chprintf(chp, "SDRAM read and check completed successfully in %dms.\r\n", check_ms); } }
static void cmd_sdram(BaseSequentialStream *chp, int argc, char *argv[]) { uint32_t counter = 0; uint8_t ubWritedata_8b = 0x3C, ubReaddata_8b = 0; uint32_t uwReadwritestatus = 0; TimeMeasurement tm; (void)argv; if (argc > 0) { chprintf(chp, "Usage: sdram\r\n"); return; } tmObjectInit(&tm); tmStartMeasurement(&tm); // /* Erase SDRAM memory */ // for (counter = 0; counter < IS42S16400J_SIZE; counter++) // { // *(__IO uint8_t*) (SDRAM_BANK_ADDR + counter) = (uint8_t)0x0; // } /* Write data value to all SDRAM memory */ for (counter = 0; counter < IS42S16400J_SIZE; counter++) { *(__IO uint8_t*) (SDRAM_BANK_ADDR + counter) = (uint8_t)(ubWritedata_8b + counter); } tmStopMeasurement(&tm); uint32_t write_ms = RTT2MS(tm.last); tmStartMeasurement(&tm); /* Read back SDRAM memory */ counter = 0; while ((counter < IS42S16400J_SIZE)) { ubReaddata_8b = *(__IO uint8_t*)(SDRAM_BANK_ADDR + counter); counter++; } tmStopMeasurement(&tm); uint32_t read_ms = RTT2MS(tm.last); /* Read back SDRAM memory and check content correctness*/ counter = 0; uwReadwritestatus = 0; while ((counter < IS42S16400J_SIZE) && (uwReadwritestatus == 0)) { ubReaddata_8b = *(__IO uint8_t*)(SDRAM_BANK_ADDR + counter); if ( ubReaddata_8b != (uint8_t)(ubWritedata_8b + counter)) { uwReadwritestatus = 1; chprintf(chp, "Error at %d, expected %d but read %d.\r\n", counter, ubWritedata_8b + counter, ubReaddata_8b); } counter++; } if (!uwReadwritestatus) { chprintf(chp, "SDRAM test completed successfully, writing entire memory took %dms, reading it took %dms.\r\n", write_ms, read_ms); } }