/**
* \brief Write a 16 bit value to EEPROM after first clearing the memory.
* \li Erase and write time 5ms per manufacturer specification
* \li Manufacturer does not specify max or min erase/write times
* \param [in] reg Address to write to.
* \param [in] data Value to write.
*/
void MLX90614::writeEEProm(uint8_t reg, uint16_t data) {
uint16_t val;
reg |= 0x20;
// read current value, compare to the new value, and do nothing on a match
// or if there are read errors set the error status flag only
val = read16(reg);
if((val != data) && !_rwError) {
// on any R/W errors it is assumed the memory is corrupted
// clear the memory and wait Terase (per manufacturer's documentation)
write16(reg, 0);
delay(5);
// if no write errors then write the new value
if(_rwError) _rwError |= MLX90614_EECORRUPT;
else {
// write the data and wait Twrite (per manufacturer's documentation)
write16(reg, data);
delay(5);
if(_rwError) _rwError |= MLX90614_EECORRUPT;
}
}
}
void
intel_extreme_uninit(intel_info &info)
{
CALLED();
if (!info.fake_interrupts && info.shared_info->vblank_sem > 0) {
// disable interrupt generation
write16(info, find_reg(info, INTEL_INTERRUPT_ENABLED), 0);
write16(info, find_reg(info, INTEL_INTERRUPT_MASK), ~0);
remove_io_interrupt_handler(info.irq, intel_interrupt_handler, &info);
if (info.use_msi && gPCIx86Module != NULL) {
gPCIx86Module->disable_msi(info.pci->bus,
info.pci->device, info.pci->function);
gPCIx86Module->unconfigure_msi(info.pci->bus,
info.pci->device, info.pci->function);
}
}
gGART->unmap_aperture(info.aperture);
delete_area(info.registers_area);
delete_area(info.shared_area);
}
void DSA1Intro::write(ostream& strm) {
header_size = 20;
count = entries.size(); // WRONG! Come back later to change it
u16 truecount = 0;
write16(strm, count);
for (u8 i=0; i<0x20-2; i++) write8(strm, 0);
u32 offset = 0;
for (u32 i=0; i<count; i++) {
// Nach Duplikaten suchen und diese markieren
u32 j = 0;
for ( ; j<i; j++) {
if (entries[i]->name == entries[j]->name) break;
}
if (j == i) { // Kein Duplikat gefunden
entries[i]->offset = offset;
entries[i]->write(strm);
offset += entries[i]->size;
truecount++;
} else { // Duplikat gefunden
entries[i]->offset = entries[j]->offset;
assert(entries[i]->size == entries[j]->size);
entries[i]->write(strm);
}
}
for (u32 i=count; i < 139 ; i++) {
for (u32 j=0; j < 0x20; j++) write8(strm, 0x00);
}
strm.seekp(0);
write16(strm, truecount-1); // DUMMY nicht mitzählen
}
static void _sci_init(
rtems_device_minor_number minor )
{
uint16_t temp16 ;
/* Pin function controller initialisation for asynchronous mode */
if( minor == 0)
{
temp16 = read16( PFC_PBCR1);
temp16 &= ~( PB8MD | PB9MD );
temp16 |= (PB_TXD0 | PB_RXD0);
write16( temp16, PFC_PBCR1);
}
else
{
temp16 = read16( PFC_PBCR1);
temp16 &= ~( PB10MD | PB11MD);
temp16 |= (PB_TXD1 | PB_RXD1);
write16( temp16, PFC_PBCR1);
}
/* disable sck-pin */
if( minor == 0)
{
temp16 = read16( PFC_PBCR1);
temp16 &= ~(PB12MD);
write16( temp16, PFC_PBCR1);
}
else
{
temp16 = read16( PFC_PBCR1);
temp16 &= ~(PB13MD);
write16( temp16, PFC_PBCR1);
}
}
void pixbuf_export_bmp(const PixBuf *pb, const char *filename) {
int y;
uint8_t row[pb->width*4];
uint8_t header[54];
const Pixel *pic = pb->array + (pb->height-1)*pb->width;
FILE *out = fopen(filename, "wb");
if (!out) {
perror(filename);
exit(1);
}
write16(header, 19778);
write32(header + 2, pb->width*pb->height*3+14+40);
write32(header + 6, 0);
write32(header + 10, 14+40);
write32(header + 14, 40);
write32(header + 18, pb->width);
write32(header + 22, pb->height);
write16(header + 26, 1);
write16(header + 28, 24);
write32(header + 30, 0);
write32(header + 34, pb->width*pb->height*3);
write32(header + 38, 3780);
write32(header + 42, 3780);
write32(header + 46, 0x0);
write32(header + 50, 0x0);
fwrite(&header, sizeof(header), 1, out);
for (y = 0; y < pb->height; y++) {
fwrite(row, rgb_encode(row, pic, pb->width), 1, out);
pic -= pb->width;
}
fclose(out);
}
int main(int argc, char **argv)
{
FILE *in = fopen(argv[1], "r");
FILE *out = fopen(argv[2], "wb");
fprintf(out, "%s", "RIFF");
write32(out, 1044);
fprintf(out, "%s", "PAL ");
fprintf(out, "%s", "data");
write32(out, 256*4+8);
write16(out, 0x0300);
write16(out, 256);
int count = 0;
char buf[1000];
while (fgets(buf, 1000, in)) {
int r, g, b;
if (count < 256) {
if (sscanf(buf, "%d %d %d ", &r, &g, &b) == 3) {
count++;
fputc(r, out);
fputc(g, out);
fputc(b, out);
fputc(0, out);
}
}
}
for (; count < 256; count++) {
write32(out, 0);
}
write32(out, 0xd801);
}
void load_pi(int p, int i)
{
oscommand(WRITE_ENABLE);
ndelay();
write16(PID_PGAIN_HI, p);
ndelay();
write16(PID_DGAIN_HI, i);
ndelay();
oscommand(WRITE_DISABLE);
}
void hudson_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm)
{
uintptr_t base = hudson_spibase();
write16((void *)(base + SPI100_SPEED_CONFIG),
(norm << SPI_NORM_SPEED_NEW_SH) |
(fast << SPI_FAST_SPEED_NEW_SH) |
(alt << SPI_ALT_SPEED_NEW_SH) |
(tpm << SPI_TPM_SPEED_NEW_SH));
write16((void *)(base + SPI100_ENABLE), SPI_USE_SPI100);
}
/*****************************************************************************
* DoWork: convert a buffer
*****************************************************************************/
static block_t *DoWork( filter_t * p_filter, block_t *p_in_buf )
{
size_t i_length = p_in_buf->i_buffer;
uint8_t * p_in = p_in_buf->p_buffer;
block_t *p_out_buf = NULL;
uint16_t i_data_type = get_data_type( p_filter, p_in_buf );
if( i_data_type == 0 || ( i_length + 8 ) > AOUT_SPDIF_SIZE )
goto out;
size_t i_out_length = p_in_buf->i_nb_samples * 4;
p_out_buf = block_Alloc( i_out_length );
if( !p_out_buf )
goto out;
uint8_t *p_out = p_out_buf->p_buffer;
/* Copy the S/PDIF headers. */
void (*write16)(void *, uint16_t) =
( p_filter->fmt_out.audio.i_format == VLC_CODEC_SPDIFB )
? SetWBE : SetWLE;
write16( &p_out[0], 0xf872 ); /* syncword 1 */
write16( &p_out[2], 0x4e1f ); /* syncword 2 */
write16( &p_out[4], i_data_type ); /* data type */
write16( &p_out[6], i_length * 8 ); /* length in bits */
bool b_input_big_endian = is_big_endian( p_filter, p_in_buf );
bool b_output_big_endian =
p_filter->fmt_out.audio.i_format == VLC_CODEC_SPDIFB;
if( b_input_big_endian != b_output_big_endian )
{
swab( p_in, p_out + 8, i_length & ~1 );
/* If i_length is odd, we have to adjust swapping a bit... */
if( i_length & 1 && ( i_length + 9 ) <= i_out_length )
{
p_out[8 + i_length - 1] = 0;
p_out[8 + i_length] = p_in[i_length-1];
i_length++;
}
} else
memcpy( p_out + 8, p_in, i_length );
if( 8 + i_length < i_out_length ) /* padding */
memset( p_out + 8 + i_length, 0, i_out_length - i_length - 8 );
p_out_buf->i_dts = p_in_buf->i_dts;
p_out_buf->i_pts = p_in_buf->i_pts;
p_out_buf->i_nb_samples = p_in_buf->i_nb_samples;
p_out_buf->i_buffer = i_out_length;
out:
block_Release( p_in_buf );
return p_out_buf;
}
void ILI9341_kbv::setAddrWindow(int16_t x, int16_t y, int16_t x1, int16_t y1)
{
CS_ACTIVE;
WriteCmd(ILI9341_CMD_COLUMN_ADDRESS_SET);
write16(x);
write16(x1);
WriteCmd(ILI9341_CMD_PAGE_ADDRESS_SET);
write16(y);
write16(y1);
CS_IDLE;
}
static int rma1_wdt_ping(int irq, void *data)
{
/* kicking the dog */
write16(RWTCNT0, 0x5a00);
/* interrupt clear & setting next timeout */
write16(TMU(0, TCR01), 0x0000);
write32(TMU(0, TCNT01), read32(TMU(0, TCOR01)));
write16(TMU(0, TCR01), 0x20);
return 0;
}
int saveBitmap(const char* filename, u8* buffer, u32 w, u32 h)
{
u8* temp=(u8*)malloc(w*h*3+sizeof(INFOHEADER)+sizeof(HEADER));
HEADER* header=(HEADER*)temp;
INFOHEADER* infoheader=(INFOHEADER*)(temp+sizeof(HEADER));
write16(&header->type, 0x4D42);
write32(&header->size, w*h*3+sizeof(INFOHEADER)+sizeof(HEADER));
write32(&header->offset, sizeof(INFOHEADER)+sizeof(HEADER));
write16(&header->reserved1, 0);
write16(&header->reserved2, 0);
write16(&infoheader->bits, 24);
write32(&infoheader->size, sizeof(INFOHEADER));
write32(&infoheader->compression, 0);
write32(&infoheader->width, w);
write32(&infoheader->height, h);
write16(&infoheader->planes, 1);
write32(&infoheader->imagesize, w*h*3);
write32(&infoheader->xresolution, 0);
write32(&infoheader->yresolution, 0);
write32(&infoheader->importantcolours, 0);
write32(&infoheader->ncolours, 0);
int y,x;
for(y=0;y<h;y++)
{
for(x=0;x<w;x++)
{
temp[((y*w)+x)*3+sizeof(INFOHEADER)+sizeof(HEADER)]=buffer[(x*h+y)*3+0];
temp[((y*w)+x)*3+1+sizeof(INFOHEADER)+sizeof(HEADER)]=buffer[(x*h+y)*3+1];
temp[((y*w)+x)*3+2+sizeof(INFOHEADER)+sizeof(HEADER)]=buffer[(x*h+y)*3+2];
}
}
Handle file;
Result ret=FSUSER_OpenFile(NULL, &file, configuration.sdmc, FS_makePath(PATH_CHAR, filename), FS_OPEN_WRITE|FS_OPEN_CREATE, FS_ATTRIBUTE_NONE);
if(ret){svcCloseHandle(file); return -2;}
u32 size=w*h*3+sizeof(INFOHEADER)+sizeof(HEADER);
u32 bytesWritten=0;
ret=FSFILE_Write(file, &bytesWritten, 0, temp, size, FS_WRITE_FLUSH);
if(ret || bytesWritten!=size)return -2;
FSFILE_Close(file);
svcCloseHandle(file);
free(temp);
return 0;
}
static void
write_2338 (u32 edx, u32 val)
{
read_2338 (edx);
write16 (DEFAULT_RCBA + 0x2338, (read16 (DEFAULT_RCBA + 0x2338)
& 0x1ff) | 0x600);
wait_2338 ();
write32 (DEFAULT_RCBA + 0x2334, val);
wait_2338 ();
write16 (DEFAULT_RCBA + 0x2338,
(read16 (DEFAULT_RCBA + 0x2338) & 0x1ff) | 0x600);
read8 (DEFAULT_RCBA + 0x2338);
}
void ILI9341_kbv::drawPixel(int16_t x, int16_t y, uint16_t color)
{
// ILI934X just plots at edge if you try to write outside of the box:
if (x < 0 || y < 0 || x >= width() || y >= height())
return;
CS_ACTIVE;
WriteCmd(ILI9341_CMD_COLUMN_ADDRESS_SET);
write16(x);
WriteCmd(ILI9341_CMD_PAGE_ADDRESS_SET);
write16(y);
WriteCmd(ILI9341_CMD_MEMORY_WRITE);
write16(color);
CS_IDLE;
}
/*
* Write PCR register. (This is internal function)
* It returns PCR register and size in 1/2/4 bytes.
* The offset should not exceed 0xFFFF and must be aligned with size
*/
static int pch_pcr_write(u8 pid, u16 offset, u32 size, u32 data)
{
if ((offset & (size - 1)) != 0) {
printk(BIOS_DEBUG,
"PchPcrWrite error. Invalid Offset: %x Size: %x",
offset, size);
return -1;
}
/* Write the PCR register with provided data
* Then read back PCR register to prevent from back to back write.
*/
switch (size) {
case 4:
write32(pcr_reg_address(pid, offset), (u32) data);
break;
case 2:
write16(pcr_reg_address(pid, offset), (u16) data);
break;
case 1:
write8(pcr_reg_address(pid, offset), (u8) data);
break;
default:
return -1;
}
/* Ensure the writes complete. */
complete_write();
return 0;
}
static void pl022_txrx16(struct spi_chip *chip, uint16_t *wdat,
uint16_t *rdat, size_t num_txpkts, size_t *num_rxpkts)
{
size_t i = 0;
size_t j = 0;
struct pl022_data *pd = container_of(chip, struct pl022_data, chip);
pd->gpio->ops->set_value(pd->cs_gpio_pin, GPIO_LEVEL_LOW);
while (i < num_txpkts) {
if (read8(pd->base + SSPSR) & SSPSR_TNF)
/* tx 1 packet */
write16(wdat[i++], pd->base + SSPDR);
}
do {
while ((read8(pd->base + SSPSR) & SSPSR_RNE)
&& (j < *num_rxpkts))
/* rx 1 packet */
rdat[j++] = read16(pd->base + SSPDR);
} while ((read8(pd->base + SSPSR) & SSPSR_BSY) && (j < *num_rxpkts));
*num_rxpkts = j;
pd->gpio->ops->set_value(pd->cs_gpio_pin, GPIO_LEVEL_HIGH);
}
void hudson_disable_4dw_burst(void)
{
uintptr_t base = hudson_spibase();
write16((void *)(base + SPI100_HOST_PREF_CONFIG),
read16((void *)(base + SPI100_HOST_PREF_CONFIG))
& ~SPI_RD4DW_EN_HOST);
}
// calibration of equations and device
// shunt_val = value of shunt in Ohms
// v_shunt_max = maximum value of voltage across shunt
// v_bus_max = maximum voltage of bus
// i_max_expected = maximum current draw of bus + shunt
// default values are for a 0.25 Ohm shunt on a 5V bus with max current of 1A
void INA219::calibrate(float shunt_val, float v_shunt_max, float v_bus_max, float i_max_expected)
{
uint16_t cal;
float i_max_possible, min_lsb, max_lsb, swap;
r_shunt = shunt_val;
i_max_possible = v_shunt_max / r_shunt;
min_lsb = i_max_expected / 32767;
max_lsb = i_max_expected / 4096;
current_lsb = (uint16_t)(min_lsb * 100000000) + 1;
current_lsb /= 100000000;
swap = (0.04096)/(current_lsb*r_shunt);
cal = (uint16_t)swap;
power_lsb = current_lsb * 20;
#if (INA219_DEBUG == 1)
Serial.print("v_bus_max: "); Serial.println(v_bus_max, 8);
Serial.print("v_shunt_max: "); Serial.println(v_shunt_max, 8);
Serial.print("i_max_possible: "); Serial.println(i_max_possible, 8);
Serial.print("i_max_expected: "); Serial.println(i_max_expected, 8);
Serial.print("min_lsb: "); Serial.println(min_lsb, 12);
Serial.print("max_lsb: "); Serial.println(max_lsb, 12);
Serial.print("current_lsb: "); Serial.println(current_lsb, 12);
Serial.print("power_lsb: "); Serial.println(power_lsb, 8);
Serial.println(" ");
Serial.print("cal: "); Serial.println(cal);
Serial.print("r_shunt: "); Serial.println(r_shunt);
#endif
write16(CAL_R, cal);
}
s32 Patch_ahbprot(void)
{
// patch HID4 write in HBC stub - this should be done when the extra HID4 bits are turned on
//*(u32*)0x80002174 = 0x60000000;
if (read32(CHECK_AHB) != 0xffffffff)
{
xprintf("AHBPROT doesn't seem to be disabled.\n");
return false;
}
else
{
u16 *patchme;
write16(MEM2_PROT, 2);
for (patchme=ES_MODULE_START; patchme < ES_MODULE_START+0x4000; patchme++)
{
if (!memcmp(patchme, ticket_check, sizeof(ticket_check)))
{
xprintf("Found TMD Access rights check at %p\n", patchme);
// write16/uncached poke doesn't work for this. Go figure.
patchme[4] = 0x23FF; // li r3, 0xFF
DCFlushRange(patchme+4, 2);
return true;
//break;
}
}
memcpy((void*)0x80001800, stub_bin, stub_bin_size);
DCFlushRange((void*)0x80001800,stub_bin_size);
hbcStubAvailable();
}
return false;
}
void mem_protect(int enable, void *start, void *end)
{
write16(MEM_PROT, enable?1:0);
write16(MEM_PROT_START, (((u32)start) & 0xFFFFFFF) >> 12);
write16(MEM_PROT_END, (((u32)end) & 0xFFFFFFF) >> 12);
udelay(10);
}
static int codec_detect(u32 base)
{
u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
if (set_bits(base + 0x08, 1, 1) == -1)
goto no_codec;
/* Write back the value once reset bit is set. */
write16(base + 0x0, read16(base + 0x0));
/* Read in Codec location (BAR + 0xe)[2..0]*/
reg8 = read8(base + 0xe);
reg8 &= 0x0f;
if (!reg8)
goto no_codec;
return reg8;
no_codec:
/* Codec Not found */
/* Put HDA back in reset (BAR + 0x8) [0] */
set_bits(base + 0x08, 1, 0);
printk(BIOS_DEBUG, "Azalia: No codec!\n");
return 0;
}
int hw_preboot() {
/* Enable USBOTG clocks */
modify_register32(CRM_AP_BASE_ADDR+0xc, 0, 1 << 12);
modify_register32(CRM_AP_BASE_ADDR+0x28, 0, 0x3 << 22);
modify_register32(CRM_AP_BASE_ADDR+0x34, 0, 0x3 << 16);
/* Reset USBOTG */
write32(0x3f, USBOTG_CTRL_BASE_ADDR+0x10);
while (read32(USBOTG_CTRL_BASE_ADDR+0x10)) {
}
/* Enable main USBOTG clock */
write32(0x1, USBOTG_CTRL_BASE_ADDR+0xc);
/* Disable SDHC1/2 clocks */
modify_register32(CRM_AP_BASE_ADDR+0x60, 0, 1 << 0);
modify_register32(CRM_AP_BASE_ADDR+0x60, 0, 1 << 8);
/* Reset EPIT */
modify_register32(EPIT1_AP_BASE_ADDR+0x0, 0x1, 0);
modify_register32(EPIT1_AP_BASE_ADDR+0x0, 0, 0x10000);
while (read32(EPIT1_AP_BASE_ADDR+0x0) & 0x10000) {
}
/* Disable and clear KPP */
write16(0xf, KPP_BASE_ADDR+0x2);
/* Stop SDMA */
write32(0xffffffff, SDMA_BASE_ADDR+0x8);
write32(0xffffffff, SDMA_BASE_ADDR+0x4);
/* Reset SDMA */
write32(0x1, SDMA_BASE_ADDR+0x24);
while (read32(SDMA_BASE_ADDR+0x28) & 0x1) {
}
/* Enable UART3 clocks */
modify_register32(CRM_AP_BASE_ADDR+0x5c, 0, 1 << 16);
}
/**
* Probe for supported codecs
*/
int hda_codec_detect(u32 base)
{
u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
goto no_codec;
/* Write back the value once reset bit is set. */
write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
/* Read in Codec location (BAR + 0xe)[2..0]*/
reg8 = read8(base + HDA_STATESTS_REG);
reg8 &= 0x0f;
if (!reg8)
goto no_codec;
return reg8;
no_codec:
/* Codec Not found */
/* Put HDA back in reset (BAR + 0x8) [0] */
set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0);
printk(BIOS_DEBUG, "HDA: No codec!\n");
return 0;
}
void PCI_Device::intx_enable()
{
auto cmd = read16(PCI_CMD_REG);
write16(PCI_CMD_REG, cmd & ~(1 << 10));
// delete msi-x
if (this->msix) delete this->msix;
}
void tft_t::rectangle(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint16_t c)
{
if (!h || !w)
return;
uint16_t yt, bMask;
if (!transform())
goto disp;
if (!portrait()) {
swap(x, y);
swap(w, h);
}
yt = vsTransformBack(y);
if ((int16_t)yt < (int16_t)topEdge() && \
(int16_t)(yt + h) >= (int16_t)topEdge()) { // Top edge clipping
h -= topEdge() - yt;
y = upperEdge();
yt = vsTransformBack(y);
} else if (yt < bottomEdge() && yt + h >= bottomEdge()) // Bottom edge clipping
h = bottomEdge() - yt;
if (y + h > bottomEdge()) // Transform edge split
if (y < bottomEdge()) {
if (!portrait()) {
rectangle(y, x, bottomEdge() - y, w, c);
rectangle(topEdge(), x, h - (bottomEdge() - y), w, c);
} else {
rectangle(x, y, w, bottomEdge() - y, c);
rectangle(x, topEdge(), w, h - (bottomEdge() - y), c);
}
return;
}
if (yt < topMask()) {
if (yt + h < topMask())
return;
h -= topMask() - yt;
y = vsTransform(topMask());
}
bMask = vsMaximum() - bottomMask();
if (yt >= bMask)
return;
if (yt + h > bMask)
h -= yt + h - bMask;
if (!portrait()) {
area(y, x, h, w);
goto draw;
}
disp:
area(x, y, w, h);
draw:
start();
while (h--)
for (uint16_t xx = 0; xx < w; xx++)
write16(c);
}
void
C64::saveToBuffer(uint8_t **buffer)
{
uint8_t *old = *buffer;
debug(3, "Saving internal state...\n");
// Save state of this component
write8(buffer, warp);
write8(buffer, alwaysWarp);
write8(buffer, warpLoad);
write64(buffer, cycles);
write32(buffer, (uint32_t)frame);
write16(buffer, rasterline);
write32(buffer, (uint32_t)rasterlineCycle);
write64(buffer, nanoTargetTime);
// Save state of sub components
cpu->saveToBuffer(buffer);
vic->saveToBuffer(buffer);
sid->saveToBuffer(buffer);
cia1->saveToBuffer(buffer);
cia2->saveToBuffer(buffer);
mem->saveToBuffer(buffer);
keyboard->saveToBuffer(buffer);
joystick1->saveToBuffer(buffer);
joystick2->saveToBuffer(buffer);
iec->saveToBuffer(buffer);
expansionport->saveToBuffer(buffer);
floppy->saveToBuffer(buffer);
debug(3, " C64 state saved (%d bytes)\n", *buffer - old);
assert(*buffer - old == stateSize());
}
void export_bmp(const char *filename, const uint32_t *pixbuf,
int width, int height) {
unsigned char *dst;
const uint32_t *src;
int i, j;
int out;
int filesize = 54 + width * height * 3;
unsigned char *out_buf;
out = open(filename, O_WRONLY|O_CREAT|O_TRUNC);
if (out < 0) {
return;
}
out_buf = malloc(filesize);
write16(out_buf, 19778);
write32(out_buf + 2, width*height*3+14+40);
write32(out_buf + 6, 0);
write32(out_buf + 10, 14+40);
write32(out_buf + 14, 40);
write32(out_buf + 18, width);
write32(out_buf + 22, height);
write16(out_buf + 26, 1);
write16(out_buf + 28, 24);
write32(out_buf + 30, 0);
write32(out_buf + 34, width*height*3);
write32(out_buf + 38, 3780);
write32(out_buf + 42, 3780);
write32(out_buf + 46, 0x0);
write32(out_buf + 50, 0x0);
dst = out_buf + 54;
for (i=0; i<height; i++)
{
src = pixbuf + (height-i-1)*width;
for (j=0; j<width; j++) {
*dst++ = *src;
*dst++ = (*src)>>8;
*dst++ = (*src)>>16;
src++;
}
}
write(out, out_buf, filesize);
close(out);
free(out_buf);
}
unsigned int sh_set_irq_priority(
unsigned int irq,
unsigned int prio )
{
uint32_t shiftcount;
uint32_t prioreg;
uint16_t temp16;
ISR_Level level;
/*
* first check for valid interrupt
*/
if (( irq > 113) || (_Hardware_isr_Table[irq] == _dummy_isp))
return -1;
/*
* check for valid irq priority
*/
if ( prio > 15 )
return -1;
/*
* look up appropriate interrupt priority register
*/
if ( irq > 71)
{
irq = irq - 72;
shiftcount = 12 - ((irq & ~0x03) % 16);
switch( irq / 16)
{
case 0: { prioreg = INTC_IPRC; break;}
case 1: { prioreg = INTC_IPRD; break;}
case 2: { prioreg = INTC_IPRE; break;}
default: return -1;
}
}
else
{
shiftcount = 12 - 4 * ( irq % 4);
if ( irq > 67)
prioreg = INTC_IPRB;
else
prioreg = INTC_IPRA;
}
/*
* Set the interrupt priority register
*/
_ISR_Disable( level );
temp16 = read16( prioreg);
temp16 &= ~( 15 << shiftcount);
temp16 |= prio << shiftcount;
write16( temp16, prioreg);
_ISR_Enable( level );
return 0;
}
// config values (range, gain, bus adc, shunt adc, mode) can be derived from pp26-27 in the datasheet
// defaults are:
// range = 1 (0-32V bus voltage range)
// gain = 3 (1/8 gain - 320mV range)
// bus adc = 3 (12-bit, single sample, 532uS conversion time)
// shunt adc = 3 (12-bit, single sample, 532uS conversion time)
// mode = 7 (continuous conversion)
void INA219::configure(uint8_t range, uint8_t gain, uint8_t bus_adc, uint8_t shunt_adc, uint8_t mode)
{
config = 0;
config |= (range << BRNG | gain << PG0 | bus_adc << BADC1 | shunt_adc << SADC1 | mode);
write16(CONFIG_R, config);
}
static void
write_iobp(u32 address, u32 val)
{
/* this function was probably pch_iobp_update with the andvalue
* being 0. So either the IOBP read can be removed or this function
* and the pch_iobp_update function in ramstage could be merged */
read_iobp(address);
write16(DEFAULT_RCBA + IOBPS, (read16(DEFAULT_RCBA + IOBPS)
& 0x1ff) | 0x600);
wait_iobp();
write32(DEFAULT_RCBA + IOBPD, val);
wait_iobp();
write16(DEFAULT_RCBA + IOBPS,
(read16(DEFAULT_RCBA + IOBPS) & 0x1ff) | 0x600);
read8(DEFAULT_RCBA + IOBPS); // call wait_iobp() instead here?
}
