int
console_init(console_rx_cb rx_cb)
{
struct console_tty *ct = &console_tty;
struct uart_conf uc = {
.uc_speed = MYNEWT_VAL(CONSOLE_BAUD),
.uc_databits = 8,
.uc_stopbits = 1,
.uc_parity = UART_PARITY_NONE,
.uc_flow_ctl = MYNEWT_VAL(CONSOLE_FLOW_CONTROL),
.uc_tx_char = console_tx_char,
.uc_rx_char = console_rx_char,
.uc_cb_arg = ct
};
ct->ct_rx_cb = rx_cb;
if (!ct->ct_dev) {
ct->ct_tx.cr_size = MYNEWT_VAL(CONSOLE_TX_BUF_SIZE);
ct->ct_tx.cr_buf = ct->ct_tx_buf;
ct->ct_rx.cr_size = MYNEWT_VAL(CONSOLE_RX_BUF_SIZE);
ct->ct_rx.cr_buf = ct->ct_rx_buf;
ct->ct_write_char = console_queue_char;
ct->ct_dev = (struct uart_dev *)os_dev_open(CONSOLE_UART,
OS_TIMEOUT_NEVER, &uc);
if (!ct->ct_dev) {
return -1;
}
ct->ct_echo_off = ! MYNEWT_VAL(CONSOLE_ECHO);
}
/* must be a power of 2 */
assert(is_power_of_two(MYNEWT_VAL(CONSOLE_RX_BUF_SIZE)));
#if MYNEWT_VAL(CONSOLE_HIST_ENABLE)
console_hist_init();
#endif
return 0;
}
void
console_pkg_init(void)
{
int rc;
/* Ensure this function only gets called by sysinit. */
SYSINIT_ASSERT_ACTIVE();
rc = console_init(NULL);
SYSINIT_PANIC_ASSERT(rc == 0);
}
static void
task1_handler(void *arg)
{
struct os_task *t;
/* Set the led pin for the E407 devboard */
g_led_pin = LED_BLINK_PIN;
hal_gpio_init_out(g_led_pin, 1);
console_printf("\nSensors Test App\n");
while (1) {
t = os_sched_get_current_task();
assert(t->t_func == task1_handler);
++g_task1_loops;
/* Wait one second */
os_time_delay(OS_TICKS_PER_SEC * MYNEWT_VAL(SENSOR_OIC_OBS_RATE));
/* Toggle the LED */
(void)hal_gpio_toggle(g_led_pin);
/* Release semaphore to task 2 */
os_sem_release(&g_test_sem);
}
}
void
SX1276IoInit(void)
{
struct hal_spi_settings spi_settings;
int rc;
#if MYNEWT_VAL(SX1276_HAS_ANT_SW)
rc = hal_gpio_init_out(SX1276_RXTX, 0);
assert(rc == 0);
#endif
rc = hal_gpio_init_out(RADIO_NSS, 1);
assert(rc == 0);
hal_spi_disable(RADIO_SPI_IDX);
spi_settings.data_order = HAL_SPI_MSB_FIRST;
spi_settings.data_mode = HAL_SPI_MODE0;
spi_settings.baudrate = MYNEWT_VAL(SX1276_SPI_BAUDRATE);
spi_settings.word_size = HAL_SPI_WORD_SIZE_8BIT;
rc = hal_spi_config(RADIO_SPI_IDX, &spi_settings);
assert(rc == 0);
rc = hal_spi_enable(RADIO_SPI_IDX);
assert(rc == 0);
}
static void
console_hist_add(struct console_ring *rx)
{
struct console_hist *ch = &console_hist;
uint8_t *str = ch->ch_buf[ch->ch_head];
uint8_t tail;
uint8_t empty = 1;
tail = rx->cr_tail;
while (tail != rx->cr_head) {
*str = rx->cr_buf[tail];
if (*str != ' ' && *str != '\t' && *str != '\n') {
empty = 0;
}
if (*str == '\n') {
*str = '\0';
/* don't save empty history */
if (empty) {
return;
}
break;
}
str++;
tail = (tail + 1) % MYNEWT_VAL(CONSOLE_RX_BUF_SIZE);
}
ch->ch_head = (ch->ch_head + 1) & (ch->ch_size - 1);
ch->ch_curr = ch->ch_head;
/* buffer full, start overwriting old history */
if (ch->ch_head == ch->ch_tail) {
ch->ch_tail = (ch->ch_tail + 1) & (ch->ch_size - 1);
}
}
/**
* Called when the LE HCI command read advertising channel tx power command
* has been received. Returns the current advertising transmit power.
*
* Context: Link Layer task (HCI command parser)
*
* @return int
*/
int
ble_ll_adv_read_txpwr(uint8_t *rspbuf, uint8_t *rsplen)
{
rspbuf[0] = MYNEWT_VAL(BLE_LL_TX_PWR_DBM);
*rsplen = 1;
return BLE_ERR_SUCCESS;
}
void
nmgr_uart_pkg_init(void)
{
struct nmgr_uart_state *nus = &nmgr_uart_state;
int rc;
struct uart_conf uc = {
.uc_speed = MYNEWT_VAL(NMGR_UART_SPEED),
.uc_databits = 8,
.uc_stopbits = 1,
.uc_parity = UART_PARITY_NONE,
.uc_flow_ctl = UART_FLOW_CTL_NONE,
.uc_tx_char = nmgr_uart_tx_char,
.uc_rx_char = nmgr_uart_rx_char,
.uc_cb_arg = nus
};
rc = nmgr_transport_init(&nus->nus_transport, nmgr_uart_out, nmgr_uart_mtu);
assert(rc == 0);
nus->nus_dev =
(struct uart_dev *)os_dev_open(MYNEWT_VAL(NMGR_UART), 0, &uc);
assert(nus->nus_dev);
nus->nus_cb_ev.ev_cb = nmgr_uart_rx_frame;
}
void
mynewt_tinycrypt_pkg_init(void)
{
g_trng = (struct trng_dev *)os_dev_open(MYNEWT_VAL(TINYCRYPT_UECC_RNG_TRNG_DEV_NAME),
OS_WAIT_FOREVER, NULL);
assert(g_trng);
uECC_set_rng(uecc_rng_trng);
}
void
hal_bsp_init(void)
{
int rc;
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_4)
rc = hal_timer_init(4, NULL);
assert(rc == 0);
#endif
/* Set cputime to count at 1 usec increments */
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, (void *)&hal_i2c_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, (void *)&os_bsp_spi0s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_1)
rc = os_dev_create((struct os_dev *) &os_bsp_bitbang_uart1, "uart1",
OS_DEV_INIT_PRIMARY, 0, uart_bitbang_init, (void *)&os_bsp_uart1_cfg);
assert(rc == 0);
#endif
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
/* Make sure system clocks have started */
hal_system_clock_start();
#if MYNEWT_VAL(ADC_0)
rc = os_dev_create((struct os_dev *) &os_bsp_adc0, "adc0",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf51_adc_dev_init,
&os_bsp_adc0_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
}
void
console_blocking_mode(void)
{
struct console_tty *ct = &console_tty;
int sr;
OS_ENTER_CRITICAL(sr);
if (ct->ct_write_char) {
ct->ct_write_char = console_blocking_tx;
console_tx_flush(ct, MYNEWT_VAL(CONSOLE_TX_BUF_SIZE));
}
OS_EXIT_CRITICAL(sr);
}
/**
* Initialises the local interrupt pin
*
* @param Pointer to device structure
* @param interrupt handler to setup
* @param Pointer to data to pass to irq
*
* @return 0 on success, non-zero on failure
*/
static int
init_intpin(struct adxl345 * adxl345, hal_gpio_irq_handler_t handler,
void * arg)
{
struct adxl345_private_driver_data *pdd = &adxl345->pdd;
hal_gpio_irq_trig_t trig;
int pin = -1;
int rc;
int i;
for (i = 0; i < MYNEWT_VAL(SENSOR_MAX_INTERRUPTS_PINS); i++){
pin = adxl345->sensor.s_itf.si_ints[i].host_pin;
if (pin >= 0) {
break;
}
}
if (pin < 0) {
ADXL345_LOG(ERROR, "Interrupt pin not configured\n");
return SYS_EINVAL;
}
pdd->int_num = i;
if (adxl345->sensor.s_itf.si_ints[pdd->int_num].active) {
trig = HAL_GPIO_TRIG_RISING;
} else {
trig = HAL_GPIO_TRIG_FALLING;
}
if (adxl345->sensor.s_itf.si_ints[pdd->int_num].device_pin == 1) {
pdd->int_route = 0x00;
} else if (adxl345->sensor.s_itf.si_ints[pdd->int_num].device_pin == 2) {
pdd->int_route = 0xFF;
} else {
ADXL345_LOG(ERROR, "Route not configured\n");
return SYS_EINVAL;
}
rc = hal_gpio_irq_init(pin,
handler,
arg,
trig,
HAL_GPIO_PULL_NONE);
if (rc != 0) {
ADXL345_LOG(ERROR, "Failed to initialise interrupt pin %d\n", pin);
return rc;
}
return 0;
}
/**
* Link Layer task.
*
* This is the task that runs the Link Layer.
*
* @param arg
*/
void
ble_ll_task(void *arg)
{
/* Init ble phy */
ble_phy_init();
/* Set output power to 1mW (0 dBm) */
ble_phy_txpwr_set(MYNEWT_VAL(BLE_LL_TX_PWR_DBM));
/* Tell the host that we are ready to receive packets */
ble_ll_hci_send_noop();
ble_ll_rand_start();
while (1) {
os_eventq_run(&g_ble_ll_data.ll_evq);
}
}
int
ble_hs_pvcy_ensure_started(void)
{
int rc;
if (ble_hs_pvcy_started) {
return 0;
}
/* Set up the periodic change of our RPA. */
rc = ble_hs_pvcy_set_addr_timeout(MYNEWT_VAL(BLE_RPA_TIMEOUT));
if (rc != 0) {
return rc;
}
ble_hs_pvcy_started = 1;
return 0;
}
/**
* Read byte data from ADXL345 sensor over different interfaces
*
* @param The sensor interface
* @param The register address to read from
* @param Pointer to where the register value should be written
*
* @return 0 on success, non-zero on failure
*/
int
adxl345_read8(struct sensor_itf *itf, uint8_t reg, uint8_t *value)
{
int rc;
rc = sensor_itf_lock(itf, MYNEWT_VAL(ADXL345_ITF_LOCK_TMO));
if (rc) {
return rc;
}
if (itf->si_type == SENSOR_ITF_I2C) {
rc = adxl345_i2c_read8(itf, reg, value);
} else {
rc = adxl345_spi_read8(itf, reg, value);
}
sensor_itf_unlock(itf);
return rc;
}
/**
* Read local version
*
* @param rspbuf
* @param rsplen
*
* @return int
*/
static int
ble_ll_hci_rd_local_version(uint8_t *rspbuf, uint8_t *rsplen)
{
uint16_t hci_rev;
uint16_t lmp_subver;
uint16_t mfrg;
hci_rev = 0;
lmp_subver = 0;
mfrg = MYNEWT_VAL(BLE_LL_MFRG_ID);
/* Place the data packet length and number of packets in the buffer */
rspbuf[0] = BLE_HCI_VER_BCS_4_2;
put_le16(rspbuf + 1, hci_rev);
rspbuf[3] = BLE_LMP_VER_BCS_4_2;
put_le16(rspbuf + 4, mfrg);
put_le16(rspbuf + 6, lmp_subver);
*rsplen = BLE_HCI_RD_LOC_VER_INFO_RSPLEN;
return BLE_ERR_SUCCESS;
}
static int
init_intpin(struct lis2dw12 * lis2dw12, hal_gpio_irq_handler_t handler,
void * arg)
{
struct lis2dw12_private_driver_data *pdd = &lis2dw12->pdd;
hal_gpio_irq_trig_t trig;
int pin = -1;
int rc;
int i;
for (i = 0; i < MYNEWT_VAL(SENSOR_MAX_INTERRUPTS_PINS); i++){
pin = lis2dw12->sensor.s_itf.si_ints[i].host_pin;
if (pin >= 0) {
break;
}
}
if (pin < 0) {
LIS2DW12_ERR("Interrupt pin not configured\n");
return SYS_EINVAL;
}
pdd->int_num = i;
if (lis2dw12->sensor.s_itf.si_ints[pdd->int_num].active) {
trig = HAL_GPIO_TRIG_RISING;
} else {
trig = HAL_GPIO_TRIG_FALLING;
}
rc = hal_gpio_irq_init(pin,
handler,
arg,
trig,
HAL_GPIO_PULL_NONE);
if (rc != 0) {
LIS2DW12_ERR("Failed to initialise interrupt pin %d\n", pin);
return rc;
}
return 0;
}
static int
console_hist_move(struct console_ring *rx, uint8_t *tx_buf, uint8_t direction)
{
struct console_hist *ch = &console_hist;
uint8_t *str = NULL;
int space = 0;
int i;
uint8_t limit = direction == CONSOLE_UP ? ch->ch_tail : ch->ch_head;
/* no more history to return in this direction */
if (ch->ch_curr == limit) {
return 0;
}
if (direction == CONSOLE_UP) {
ch->ch_curr = (ch->ch_curr - 1) & (ch->ch_size - 1);
} else {
ch->ch_curr = (ch->ch_curr + 1) & (ch->ch_size - 1);
}
/* consume all chars */
while (console_pull_char_head(rx) == 0) {
/* do nothing */
}
str = ch->ch_buf[ch->ch_curr];
for (i = 0; i < MYNEWT_VAL(CONSOLE_RX_BUF_SIZE); ++i) {
if (str[i] == '\0') {
break;
}
tx_buf[i] = str[i];
console_add_char(rx, str[i]);
space++;
}
return space;
}
int
imgr_core_list(struct mgmt_cbuf *cb)
{
const struct flash_area *fa;
struct coredump_header hdr;
int rc;
rc = flash_area_open(MYNEWT_VAL(COREDUMP_FLASH_AREA), &fa);
if (rc) {
rc = MGMT_ERR_EINVAL;
} else {
rc = flash_area_read(fa, 0, &hdr, sizeof(hdr));
if (rc != 0) {
rc = MGMT_ERR_EINVAL;
} else if (hdr.ch_magic != COREDUMP_MAGIC) {
rc = MGMT_ERR_ENOENT;
} else {
rc = 0;
}
}
mgmt_cbuf_setoerr(cb, rc);
return 0;
}
void
hal_bsp_init(void)
{
int rc;
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_4)
rc = hal_timer_init(4, NULL);
assert(rc == 0);
#endif
/* Set cputime to count at 1 usec increments */
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
}
#include "lps33hw_priv.h"
#if MYNEWT_VAL(LPS33HW_CLI)
#include "shell/shell.h"
#include "parse/parse.h"
static int lps33hw_shell_cmd(int argc, char **argv);
static struct shell_cmd lps33hw_shell_cmd_struct = {
.sc_cmd = "lps33hw",
.sc_cmd_func = lps33hw_shell_cmd
};
static struct sensor_itf g_sensor_itf = {
.si_type = MYNEWT_VAL(LPS33HW_SHELL_ITF_TYPE),
.si_num = MYNEWT_VAL(LPS33HW_SHELL_ITF_NUM),
.si_addr = MYNEWT_VAL(LPS33HW_SHELL_ITF_ADDR)
};
static int
lps33hw_shell_err_too_many_args(char *cmd_name)
{
console_printf("Error: too many arguments for command \"%s\"\n",
cmd_name);
return EINVAL;
}
static int
lps33hw_shell_err_unknown_arg(char *cmd_name)
{
#include "hal/hal_bsp.h"
#include "mcu/nrf52_hal.h"
#include "os/os_cputime.h"
#include "sysflash/sysflash.h"
#include "flash_map/flash_map.h"
#include "hal/hal_flash.h"
#include "hal/hal_spi.h"
#include "hal/hal_watchdog.h"
#include "uart/uart.h"
#include "uart_hal/uart_hal.h"
#include "os/os_dev.h"
#if MYNEWT_VAL(UART_0)
static struct uart_dev os_bsp_uart0;
static const struct nrf52_uart_cfg os_bsp_uart0_cfg = {
.suc_pin_tx = MYNEWT_VAL(UART_0_PIN_TX),
.suc_pin_rx = MYNEWT_VAL(UART_0_PIN_RX),
.suc_pin_rts = MYNEWT_VAL(UART_0_PIN_RTS),
.suc_pin_cts = MYNEWT_VAL(UART_0_PIN_CTS),
};
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
/*
* NOTE: Our HAL expects that the SS pin, if used, is treated as a gpio line
* and is handled outside the SPI routines.
*/
static const struct nrf52_hal_spi_cfg os_bsp_spi0m_cfg = {
.sck_pin = 23,
.mosi_pin = 24,
.miso_pin = 25,
#if MYNEWT_VAL(ADC_0)
#include <adc_nrf51/adc_nrf51.h>
#include <nrfx_adc.h>
#endif
#if MYNEWT_VAL(UART_0) || MYNEWT_VAL(UART_1)
#include "uart/uart.h"
#endif
#if MYNEWT_VAL(UART_0)
#include "uart_hal/uart_hal.h"
#endif
#if MYNEWT_VAL(UART_0)
static struct uart_dev os_bsp_uart0;
static const struct nrf51_uart_cfg os_bsp_uart0_cfg = {
.suc_pin_tx = MYNEWT_VAL(UART_0_PIN_TX),
.suc_pin_rx = MYNEWT_VAL(UART_0_PIN_RX),
.suc_pin_rts = MYNEWT_VAL(UART_0_PIN_RTS),
.suc_pin_cts = MYNEWT_VAL(UART_0_PIN_CTS),
};
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
/*
* NOTE: Our HAL expects that the SS pin, if used, is treated as a gpio line
* and is handled outside the SPI routines.
*/
static const struct nrf51_hal_spi_cfg os_bsp_spi0m_cfg = {
.sck_pin = MYNEWT_VAL(SPI_0_MASTER_PIN_SCK),
.mosi_pin = MYNEWT_VAL(SPI_0_MASTER_PIN_MOSI),
.miso_pin = MYNEWT_VAL(SPI_0_MASTER_PIN_MISO),
int
tsl2561_write8(struct sensor_itf *itf, uint8_t reg, uint32_t value)
{
int rc;
uint8_t payload[2] = { reg, value & 0xFF };
struct hal_i2c_master_data data_struct = {
.address = itf->si_addr,
.len = 2,
.buffer = payload
};
rc = sensor_itf_lock(itf, MYNEWT_VAL(TSL2561_ITF_LOCK_TMO));
if (rc) {
return rc;
}
rc = hal_i2c_master_write(itf->si_num, &data_struct,
OS_TICKS_PER_SEC / 10, 1);
if (rc) {
TSL2561_LOG(ERROR,
"Failed to write 0x%02X:0x%02X with value 0x%02lX\n",
data_struct.address, reg, value);
STATS_INC(g_tsl2561stats, errors);
}
sensor_itf_unlock(itf);
return rc;
}
int
tsl2561_write16(struct sensor_itf *itf, uint8_t reg, uint16_t value)
{
int rc;
uint8_t payload[3] = { reg, value & 0xFF, (value >> 8) & 0xFF };
struct hal_i2c_master_data data_struct = {
.address = itf->si_addr,
.len = 3,
.buffer = payload
};
rc = sensor_itf_lock(itf, MYNEWT_VAL(TSL2561_ITF_LOCK_TMO));
if (rc) {
return rc;
}
rc = hal_i2c_master_write(itf->si_num, &data_struct,
OS_TICKS_PER_SEC / 10, 1);
if (rc) {
TSL2561_LOG(ERROR,
"Failed to write @0x%02X with value 0x%02X 0x%02X\n",
reg, payload[0], payload[1]);
}
sensor_itf_unlock(itf);
return rc;
}
int
tsl2561_read8(struct sensor_itf *itf, uint8_t reg, uint8_t *value)
{
int rc;
uint8_t payload;
struct hal_i2c_master_data data_struct = {
.address = itf->si_addr,
.len = 1,
.buffer = &payload
};
rc = sensor_itf_lock(itf, MYNEWT_VAL(TSL2561_ITF_LOCK_TMO));
if (rc) {
return rc;
}
/* Register write */
payload = reg;
rc = hal_i2c_master_write(itf->si_num, &data_struct,
OS_TICKS_PER_SEC / 10, 1);
if (rc) {
TSL2561_LOG(ERROR, "Failed to address sensor\n");
goto err;
}
/* Read one byte back */
payload = 0;
rc = hal_i2c_master_read(itf->si_num, &data_struct,
OS_TICKS_PER_SEC / 10, 1);
*value = payload;
if (rc) {
TSL2561_LOG(ERROR, "Failed to read @0x%02X\n", reg);
}
err:
sensor_itf_unlock(itf);
return rc;
}
int
tsl2561_read16(struct sensor_itf *itf, uint8_t reg, uint16_t *value)
{
int rc;
uint8_t payload[2] = { reg, 0 };
struct hal_i2c_master_data data_struct = {
.address = itf->si_addr,
.len = 1,
.buffer = payload
};
rc = sensor_itf_lock(itf, MYNEWT_VAL(TSL2561_ITF_LOCK_TMO));
if (rc) {
return rc;
}
/* Register write */
rc = hal_i2c_master_write(itf->si_num, &data_struct,
OS_TICKS_PER_SEC / 10, 1);
if (rc) {
TSL2561_LOG(ERROR, "Failed to address sensor\n");
goto err;
}
/* Read two bytes back */
memset(payload, 0, 2);
data_struct.len = 2;
rc = hal_i2c_master_read(itf->si_num, &data_struct,
OS_TICKS_PER_SEC / 10, 1);
*value = (uint16_t)payload[0] | ((uint16_t)payload[1] << 8);
if (rc) {
TSL2561_LOG(ERROR, "Failed to read @0x%02X\n", reg);
goto err;
}
err:
sensor_itf_unlock(itf);
return rc;
}
/**
* Enable or disables the sensor to save power
*
* @param The sensor interface
* @param state 1 to enable the sensor, 0 to disable it
*
* @return 0 on success, non-zero on failure
*/
int
tsl2561_enable(struct sensor_itf *itf, uint8_t state)
{
/* Enable the device by setting the control bit to 0x03 */
return tsl2561_write8(itf, TSL2561_COMMAND_BIT | TSL2561_REGISTER_CONTROL,
state ? TSL2561_CONTROL_POWERON :
TSL2561_CONTROL_POWEROFF);
}
/**
* Checks if the sensor in enabled or not
*
* @param The sensor interface
* @param ptr to enabled
*
* @return 0 on success, non-zero on fialure
*/
int
tsl2561_get_enable(struct sensor_itf *itf, uint8_t *enabled)
{
int rc;
uint8_t reg;
/* Enable the device by setting the control bit to 0x03 */
rc = tsl2561_read8(itf, TSL2561_COMMAND_BIT | TSL2561_REGISTER_CONTROL,
®);
if (rc) {
goto err;
}
*enabled = reg & 0x03 ? 1 : 0;
return 0;
err:
return rc;
}
/**
* Sets the integration time used when sampling light values.
*
* @param The sensor interface
* @param int_time The integration time which can be one of:
* - 0x00: 13ms
* - 0x01: 101ms
* - 0x02: 402ms
*
* @return 0 on success, non-zero on failure
*/
int
tsl2561_set_integration_time(struct sensor_itf *itf,
uint8_t int_time)
{
int rc;
uint8_t gain;
rc = tsl2561_get_gain(itf, &gain);
if (rc) {
goto err;
}
rc = tsl2561_write8(itf, TSL2561_COMMAND_BIT | TSL2561_REGISTER_TIMING,
int_time | gain);
if (rc) {
goto err;
}
return 0;
err:
return rc;
}
#include "shell/shell.h"
#include "parse/parse.h"
#define LIS2DW12_CLI_FIRST_REGISTER 0x0D
#define LIS2DW12_CLI_LAST_REGISTER 0x3F
static int lis2dw12_shell_cmd(int argc, char **argv);
static struct shell_cmd lis2dw12_shell_cmd_struct = {
.sc_cmd = "lis2dw12",
.sc_cmd_func = lis2dw12_shell_cmd
};
static struct sensor_itf g_sensor_itf = {
.si_type = MYNEWT_VAL(LIS2DW12_SHELL_ITF_TYPE),
.si_num = MYNEWT_VAL(LIS2DW12_SHELL_ITF_NUM),
.si_cs_pin = MYNEWT_VAL(LIS2DW12_SHELL_CSPIN),
.si_addr = MYNEWT_VAL(LIS2DW12_SHELL_ITF_ADDR)
};
static int
lis2dw12_shell_err_too_many_args(char *cmd_name)
{
console_printf("Error: too many arguments for command \"%s\"\n",
cmd_name);
return EINVAL;
}
static int
lis2dw12_shell_err_too_few_args(char *cmd_name)
void
hal_bsp_init(void)
{
int rc;
#if MYNEWT_VAL(SOFT_PWM)
int idx;
#endif
(void)rc;
/* Make sure system clocks have started */
hal_system_clock_start();
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_4)
rc = hal_timer_init(4, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_5)
rc = hal_timer_init(5, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(ADC_0)
rc = os_dev_create((struct os_dev *) &os_bsp_adc0,
"adc0",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_adc_dev_init,
&os_bsp_adc0_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_0)
pwm0_idx = 0;
rc = os_dev_create((struct os_dev *) &os_bsp_pwm0,
"pwm0",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_pwm_dev_init,
&pwm0_idx);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_1)
pwm1_idx = 1;
rc = os_dev_create((struct os_dev *) &os_bsp_pwm1,
"pwm1",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_pwm_dev_init,
&pwm1_idx);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_2)
pwm2_idx = 2;
rc = os_dev_create((struct os_dev *) &os_bsp_pwm2,
"pwm2",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_pwm_dev_init,
&pwm2_idx);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SOFT_PWM)
for (idx = 0; idx < MYNEWT_VAL(SOFT_PWM_DEVS); idx++)
{
spwm_name[idx] = "spwm0";
spwm_name[idx][4] = '0' + idx;
spwm_idx[idx] = idx;
rc = os_dev_create((struct os_dev *) &os_bsp_spwm[idx],
spwm_name[idx],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
soft_pwm_dev_init,
&spwm_idx[idx]);
assert(rc == 0);
}
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, (void *)&hal_i2c_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_MASTER)
rc = hal_spi_init(1, (void *)&os_bsp_spi1m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_1)
rc = os_dev_create((struct os_dev *) &os_bsp_bitbang_uart1, "uart1",
OS_DEV_INIT_PRIMARY, 0, uart_bitbang_init, (void *)&os_bsp_uart1_cfg);
assert(rc == 0);
#endif
}
#include "bsp.h"
#if MYNEWT_VAL(ADC_0)
#include <adc_nrf52/adc_nrf52.h>
#include <nrfx_saadc.h>
#endif
#if MYNEWT_VAL(PWM_0) || MYNEWT_VAL(PWM_1) || MYNEWT_VAL(PWM_2)
#include <pwm_nrf52/pwm_nrf52.h>
#endif
#if MYNEWT_VAL(SOFT_PWM)
#include <soft_pwm/soft_pwm.h>
#endif
#if MYNEWT_VAL(UART_0)
static struct uart_dev os_bsp_uart0;
static const struct nrf52_uart_cfg os_bsp_uart0_cfg = {
.suc_pin_tx = MYNEWT_VAL(UART_0_PIN_TX),
.suc_pin_rx = MYNEWT_VAL(UART_0_PIN_RX),
.suc_pin_rts = MYNEWT_VAL(UART_0_PIN_RTS),
.suc_pin_cts = MYNEWT_VAL(UART_0_PIN_CTS),
};
#endif
#if MYNEWT_VAL(UART_1)
static struct uart_dev os_bsp_bitbang_uart1;
static const struct uart_bitbang_conf os_bsp_uart1_cfg = {
.ubc_txpin = MYNEWT_VAL(UART_1_PIN_TX),
.ubc_rxpin = MYNEWT_VAL(UART_1_PIN_RX),
.ubc_cputimer_freq = MYNEWT_VAL(OS_CPUTIME_FREQ),
};
#endif
#include "os/os_dev.h"
#include "bsp.h"
#if MYNEWT_VAL(ADC_0)
#include <adc_nrf52/adc_nrf52.h>
#endif
#if MYNEWT_VAL(PWM_0) || MYNEWT_VAL(PWM_1) || MYNEWT_VAL(PWM_2)
#include <pwm_nrf52/pwm_nrf52.h>
#endif
#if MYNEWT_VAL(SOFT_PWM)
#include <soft_pwm/soft_pwm.h>
#endif
#if MYNEWT_VAL(UART_0)
static struct uart_dev os_bsp_uart0;
static const struct nrf52_uart_cfg os_bsp_uart0_cfg = {
.suc_pin_tx = MYNEWT_VAL(UART_0_PIN_TX),
.suc_pin_rx = MYNEWT_VAL(UART_0_PIN_RX),
.suc_pin_rts = MYNEWT_VAL(UART_0_PIN_RTS),
.suc_pin_cts = MYNEWT_VAL(UART_0_PIN_CTS),
};
#endif
#if MYNEWT_VAL(UART_1)
static struct uart_dev os_bsp_bitbang_uart1;
static const struct uart_bitbang_conf os_bsp_uart1_cfg = {
.ubc_txpin = MYNEWT_VAL(UART_1_PIN_TX),
.ubc_rxpin = MYNEWT_VAL(UART_1_PIN_RX),
.ubc_cputimer_freq = MYNEWT_VAL(OS_CPUTIME_FREQ),
};
#endif
void
select_clock(const clock_config_t *cfg)
{
uint32_t new_qspi_div = 0;
uint32_t old_qspi_div = SPI0_REG(SPI_REG_SCKDIV);
/* Clock based on external escilator */
if (!cfg->xosc || cfg->pll) {
/* Turn on internal oscillator */
PRCI_REG(PRCI_HFROSCCFG) = ROSC_DIV(cfg->osc_div) |
ROSC_TRIM(MYNEWT_VAL(HFROSC_DEFAULT_TRIM_VAL)) |
ROSC_EN(1);
while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0) {
}
/* Compute CPU frequency on demand */
cpu_freq = 0;
}
if (cfg->xosc) {
/* Turn on external oscillator if not ready yet */
if ((PRCI_REG(PRCI_HFXOSCCFG) & XOSC_RDY(1)) == 0) {
PRCI_REG(PRCI_HFXOSCCFG) = XOSC_EN(1);
while ((PRCI_REG(PRCI_HFXOSCCFG) & XOSC_RDY(1)) == 0) {
}
}
cpu_freq = cfg->frq;
}
/*
* If reqested closk is higher then FLASH_MAX_CLOCK change divider so QSPI
* clock is in rage.
*/
if (cfg->frq >= MYNEWT_VAL(FLASH_MAX_CLOCK) * 2) {
new_qspi_div = (cfg->frq + MYNEWT_VAL(FLASH_MAX_CLOCK) - 1) / (2 * MYNEWT_VAL(FLASH_MAX_CLOCK)) - 1;
}
/* New qspi divider is higher, reduce qspi clock before switching to higher clock */
if (new_qspi_div > old_qspi_div) {
SPI0_REG(SPI_REG_SCKDIV) = new_qspi_div;
}
PRCI_REG(PRCI_PLLDIV) = PLL_FINAL_DIV_BY_1(cfg->pll_outdiv1) |
PLL_FINAL_DIV(cfg->pll_out_div);
if (cfg->pll) {
uint32_t now;
uint32_t pllcfg = PLL_REFSEL(cfg->xosc) |
PLL_R(cfg->pll_div_r) | PLL_F(cfg->pll_mul_f) | PLL_Q(cfg->pll_div_q);
PRCI_REG(PRCI_PLLCFG) = PLL_BYPASS(1) | pllcfg;
PRCI_REG(PRCI_PLLCFG) ^= PLL_BYPASS(1);
/* 100us lock grace period */
now = mtime_lo();
while (mtime_lo() - now < 4) {
}
/* Now it is safe to check for PLL Lock */
while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0) {
}
/* Select PLL as clock source */
PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(1) | pllcfg;
} else {
/* Select bypassed PLL as source signal, it allows to use HFXOSC */
PRCI_REG(PRCI_PLLCFG) = PLL_BYPASS(1) | PLL_REFSEL(cfg->xosc) | PLL_SEL(1);
}
/*
* Old qspi divider was higher, now it's safe to reduce divider, increasing
* qspi clock for better performance
*/
if (new_qspi_div < old_qspi_div) {
SPI0_REG(SPI_REG_SCKDIV) = new_qspi_div;
}
}
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#include <string.h>
#include "mcu/cmsis_nvic.h"
#include "trng/trng.h"
#include "trng_nrf52/trng_nrf52.h"
static uint8_t rng_cache[ MYNEWT_VAL(NRF52_TRNG_CACHE_LEN) ];
static uint16_t rng_cache_out;
static uint16_t rng_cache_in;
static void
nrf52_rng_start(void)
{
os_sr_t sr;
OS_ENTER_CRITICAL(sr);
NRF_RNG->EVENTS_VALRDY = 0;
NRF_RNG->INTENSET = 1;
NRF_RNG->TASKS_START = 1;
OS_EXIT_CRITICAL(sr);
void
hal_bsp_init(void)
{
int rc;
(void)rc;
hal_system_clock_start();
#if MYNEWT_VAL(TRNG)
rc = os_dev_create(&os_bsp_trng.dev, "trng", OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT, stm32_trng_dev_init, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, &i2c_cfg0);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(TIMER_1)
hal_timer_init(1, TIM10);
#endif
#if MYNEWT_VAL(TIMER_2)
hal_timer_init(2, TIM11);
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
assert(rc == 0);
#endif
#if MYNEWT_VAL(ETH_0)
stm32_eth_init(ð_cfg);
#endif
#if MYNEWT_VAL(PWM_0)
rc = os_dev_create((struct os_dev *) &stm32_pwm_dev_driver[PWM_0_DEV_ID],
(char*)stm32_pwm_dev_name[PWM_0_DEV_ID],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
stm32_pwm_dev_init,
&stm32_pwm_config[PWM_0_DEV_ID]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_1)
rc = os_dev_create((struct os_dev *) &stm32_pwm_dev_driver[PWM_1_DEV_ID],
(char*)stm32_pwm_dev_name[PWM_1_DEV_ID],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
stm32_pwm_dev_init,
&stm32_pwm_config[PWM_1_DEV_ID]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_2)
rc = os_dev_create((struct os_dev *) &stm32_pwm_dev_driver[PWM_2_DEV_ID],
(char*)stm32_pwm_dev_name[PWM_2_DEV_ID],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
stm32_pwm_dev_init,
&stm32_pwm_config[PWM_2_DEV_ID]);
assert(rc == 0);
#endif
}
