## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License along ## with this program; if not, write to the Free Software Foundation, Inc., ## 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.. ## { #if $has_spi ## FIXME: care about mega spi flag! spi=new HWSpi(this, irqSystem, PinAtPort(port$pkg_portlet["MOSI"],$pkg_portbit["MOSI"]), PinAtPort(port$pkg_portlet["MISO"],$pkg_portbit["MISO"]), PinAtPort(port$pkg_portlet["SCK"],$pkg_portbit["SCK"]), PinAtPort(port$pkg_portlet["'SS"],$pkg_portbit["'SS"]), $irq_bysrc["SPI, STC"].addr, true); rw[$io["SPCR"].addr]=& spi->spcr_reg; rw[$io["SPSR"].addr]=& spi->spsr_reg; rw[$io["SPDR"].addr]=& spi->spdr_reg; #end if }
AvrDevice_at90s8515::AvrDevice_at90s8515(): AvrDevice(64, 512, 0xfda0, 8192), portx(this, "X"), ocr1b(portx.GetPin(0)) { flagJMPInstructions = false; flagMULInstructions = false; flagMOVWInstruction = false; fuses->SetFuseConfiguration(2, 0xdf); irqSystem = new HWIrqSystem(this, 2, 13); eeprom= new HWEeprom(this, NULL, 512, 0, HWEeprom::DEVMODE_AT90S); // no irq available stack = new HWStackSram(this, 16); porta= new HWPort(this, "A"); portb= new HWPort(this, "B"); portc= new HWPort(this, "C"); portd= new HWPort(this, "D"); // portx is internaly used for ocr1b and icp, this 2 pins are not gpio! // set DDR Bit 0 to output: ocr1b // set DDT Bit 1 to input: icp portx.SetDdr(0x01); spi= new HWSpi(this, irqSystem, PinAtPort( portb, 5), PinAtPort( portb, 6), PinAtPort( portb, 7), PinAtPort(portb, 4),/*irqvec*/ 8, false); uart= new HWUart( this, irqSystem, PinAtPort(portd,1), PinAtPort(portd, 0),9,10,11) ; wado= new HWWado(this); prescaler = new HWPrescaler(this, "01"); timer01irq = new TimerIRQRegister(this, irqSystem); timer01irq->registerLine(1, new IRQLine("TOV0", 7)); timer01irq->registerLine(3, new IRQLine("ICF1", 3)); timer01irq->registerLine(5, new IRQLine("OCF1B", 5)); timer01irq->registerLine(6, new IRQLine("OCF1A", 4)); timer01irq->registerLine(7, new IRQLine("TOV1", 6)); timer0 = new HWTimer8_0C(this, new PrescalerMultiplexerExt(prescaler, PinAtPort(portb, 0)), 0, timer01irq->getLine("TOV0")); inputCapture1 = new ICaptureSource(PinAtPort(&portx, 1)); timer1 = new HWTimer16_2C2(this, new PrescalerMultiplexerExt(prescaler, PinAtPort(portb, 1)), 1, timer01irq->getLine("TOV1"), timer01irq->getLine("OCF1A"), new PinAtPort(portd, 5), timer01irq->getLine("OCF1B"), new PinAtPort(&portx, 0), timer01irq->getLine("ICF1"), inputCapture1, true); // analog comparator: no bandgap, no ADC-connection acomp = new HWAcomp(this, irqSystem, PinAtPort(portb,2), PinAtPort(portb, 3), 12, NULL, timer1, NULL, NULL, false); gimsk_reg = new IOSpecialReg(&coreTraceGroup, "GIMSK"); gifr_reg = new IOSpecialReg(&coreTraceGroup, "GIFR"); mcucr_reg = new IOSpecialReg(&coreTraceGroup, "MCUCR"); extirq = new ExternalIRQHandler(this, irqSystem, gimsk_reg, gifr_reg); extirq->registerIrq(1, 6, new ExternalIRQSingle(mcucr_reg, 0, 2, GetPin("D2"), true)); extirq->registerIrq(2, 7, new ExternalIRQSingle(mcucr_reg, 2, 2, GetPin("D3"), true)); rw[0x5f]= statusRegister; rw[0x5e]= & ((HWStackSram *)stack)->sph_reg; rw[0x5d]= & ((HWStackSram *)stack)->spl_reg; // 0x5c reserved rw[0x5b]= gimsk_reg; rw[0x5a]= gifr_reg; rw[0x59]= & timer01irq->timsk_reg; rw[0x58]= & timer01irq->tifr_reg; rw[0x55]= mcucr_reg; rw[0x53]= & timer0->tccr_reg; rw[0x52]= & timer0->tcnt_reg; rw[0x4f]= & timer1->tccra_reg; rw[0x4e]= & timer1->tccrb_reg; rw[0x4d]= & timer1->tcnt_h_reg; rw[0x4c]= & timer1->tcnt_l_reg; rw[0x4b]= & timer1->ocra_h_reg; rw[0x4a]= & timer1->ocra_l_reg; rw[0x49]= & timer1->ocrb_h_reg; rw[0x48]= & timer1->ocrb_l_reg; rw[0x45]= & timer1->icr_h_reg; rw[0x44]= & timer1->icr_l_reg; rw[0x41]= & wado->wdtcr_reg; rw[0x3f]= & eeprom->eearh_reg; rw[0x3e]= & eeprom->eearl_reg; rw[0x3d]= & eeprom->eedr_reg; rw[0x3c]= & eeprom->eecr_reg; rw[0x3b]= & porta->port_reg; rw[0x3a]= & porta->ddr_reg; rw[0x39]= & porta->pin_reg; rw[0x38]= & portb->port_reg; rw[0x37]= & portb->ddr_reg; rw[0x36]= & portb->pin_reg; rw[0x35]= & portc->port_reg; rw[0x34]= & portc->ddr_reg; rw[0x33]= & portc->pin_reg; rw[0x32]= & portd->port_reg; rw[0x31]= & portd->ddr_reg; rw[0x30]= & portd->pin_reg; rw[0x2f]= & spi->spdr_reg; rw[0x2e]= & spi->spsr_reg; rw[0x2d]= & spi->spcr_reg; rw[0x2c]= & uart->udr_reg; rw[0x2b]= & uart->usr_reg; rw[0x2a]= & uart->ucr_reg; rw[0x29]= & uart->ubrr_reg; rw[0x28]= & acomp->acsr_reg; Reset(); }
AvrDevice_at90s4433::AvrDevice_at90s4433(): AvrDevice(64, 128, 0, 4*1024) { flagJMPInstructions = false; flagMULInstructions = false; flagMOVWInstruction = false; fuses->SetFuseConfiguration(6, 0xda); v_bandgap.SetAnalogValue(1.22); // reference voltage is 1.22V! irqSystem = new HWIrqSystem(this, 2, 14); eeprom= new HWEeprom(this, irqSystem, 256, 12, HWEeprom::DEVMODE_AT90S); stack = new HWStackSram(this, 8); portb= new HWPort(this, "B"); portc= new HWPort(this, "C"); portd= new HWPort(this, "D"); admux = new HWAdmux6(this, &portc->GetPin(0), &portc->GetPin(1), &portc->GetPin(2), &portc->GetPin(3), &portc->GetPin(4), &portc->GetPin(5)); aref = new HWARefPin(this); ad = new HWAd(this, HWAd::AD_4433, irqSystem, 11, admux, aref); // vec 11 ADConversion Complete spi= new HWSpi(this, irqSystem, PinAtPort( portb, 3), PinAtPort( portb, 4), PinAtPort( portb, 5), PinAtPort(portb, 2),/*irqvec*/ 7, false); uart= new HWUart( this, irqSystem, PinAtPort(portd,1), PinAtPort(portd, 0),8,9,10) ; wado= new HWWado(this); prescaler = new HWPrescaler(this, "01"); timer01irq = new TimerIRQRegister(this, irqSystem); timer01irq->registerLine(1, new IRQLine("TOV0", 6)); timer01irq->registerLine(3, new IRQLine("ICF1", 3)); timer01irq->registerLine(6, new IRQLine("OCF1", 4)); timer01irq->registerLine(7, new IRQLine("TOV1", 5)); timer0 = new HWTimer8_0C(this, new PrescalerMultiplexerExt(prescaler, PinAtPort(portd, 4)), 0, timer01irq->getLine("TOV0")); inputCapture1 = new ICaptureSource(PinAtPort(portb, 0)); timer1 = new HWTimer16_1C(this, new PrescalerMultiplexerExt(prescaler, PinAtPort(portd, 5)), 1, timer01irq->getLine("TOV1"), timer01irq->getLine("OCF1"), new PinAtPort(portb, 1), timer01irq->getLine("ICF1"), inputCapture1); // analog comparator: no ADC-connection acomp = new HWAcomp(this, irqSystem, PinAtPort(portd, 6), PinAtPort(portd, 7), 13, NULL, timer1); gimsk_reg = new IOSpecialReg(&coreTraceGroup, "GIMSK"); gifr_reg = new IOSpecialReg(&coreTraceGroup, "GIFR"); mcucr_reg = new IOSpecialReg(&coreTraceGroup, "MCUCR"); extirq = new ExternalIRQHandler(this, irqSystem, gimsk_reg, gifr_reg); extirq->registerIrq(1, 6, new ExternalIRQSingle(mcucr_reg, 0, 2, GetPin("D2"))); extirq->registerIrq(2, 7, new ExternalIRQSingle(mcucr_reg, 2, 2, GetPin("D3"))); rw[0x5f]= statusRegister; rw[0x5e]= & ((HWStackSram *)stack)->sph_reg; rw[0x5d]= & ((HWStackSram *)stack)->spl_reg; rw[0x5b]= gimsk_reg; rw[0x5a]= gifr_reg; rw[0x59]= & timer01irq->timsk_reg; rw[0x58]= & timer01irq->tifr_reg; rw[0x55]= mcucr_reg; //0x54: MCUSR reset status flag (reset, wado, brown out...) //TODO XXX rw[0x53]= & timer0->tccr_reg; rw[0x52]= & timer0->tcnt_reg; rw[0x4f]= & timer1->tccra_reg; rw[0x4e]= & timer1->tccrb_reg; rw[0x4d]= & timer1->tcnt_h_reg; rw[0x4c]= & timer1->tcnt_l_reg; rw[0x4b]= & timer1->ocra_h_reg; rw[0x4a]= & timer1->ocra_l_reg; // 0x49, 0x48 reserved rw[0x47]= & timer1->icr_h_reg; rw[0x46]= & timer1->icr_l_reg; rw[0x41]= & wado->wdtcr_reg; rw[0x3f]= & eeprom->eearh_reg; // register normally reserved, but used by avr-libc! rw[0x3e]= & eeprom->eearl_reg; rw[0x3d]= & eeprom->eedr_reg; rw[0x3c]= & eeprom->eecr_reg; // 0x3b-0x39: no port a here rw[0x38]= & portb->port_reg; rw[0x37]= & portb->ddr_reg; rw[0x36]= & portb->pin_reg; rw[0x35]= & portc->port_reg; rw[0x34]= & portc->ddr_reg; rw[0x33]= & portc->pin_reg; rw[0x32]= & portd->port_reg; rw[0x31]= & portd->ddr_reg; rw[0x30]= & portd->pin_reg; rw[0x2f]= & spi->spdr_reg; rw[0x2e]= & spi->spsr_reg; rw[0x2d]= & spi->spcr_reg; rw[0x2c]= & uart->udr_reg; rw[0x2b]= & uart->usr_reg; rw[0x2a]= & uart->ucr_reg; rw[0x29]= & uart->ubrr_reg; rw[0x28]= & acomp->acsr_reg; rw[0x27]= & ad->admux_reg; rw[0x26]= & ad->adcsra_reg; rw[0x25]= & ad->adch_reg; rw[0x24]= & ad->adcl_reg; rw[0x23]= & uart->ubrrhi_reg; Reset(); }
AvrDevice_attinyX5::AvrDevice_attinyX5(unsigned ram_bytes, unsigned flash_bytes, unsigned ee_bytes): AvrDevice(64 , // I/O space above General Purpose Registers ram_bytes, // RAM size 0, // External RAM size flash_bytes) // Flash Size { flagJMPInstructions = false; flagMULInstructions = false; fuses->SetFuseConfiguration(17, 0xffdf62); irqSystem = new HWIrqSystem(this, 2, 15); // 2 bytes per vector, 15 vectors eeprom = new HWEeprom(this, irqSystem, ee_bytes, 6, HWEeprom::DEVMODE_EXTENDED); stack = new HWStackSram(this, 12); clkpr_reg = new CLKPRRegister(this, &coreTraceGroup); osccal_reg = new OSCCALRegister(this, &coreTraceGroup, OSCCALRegister::OSCCAL_V5); portb = new HWPort(this, "B", true, 6); gpior0_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR0"); gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1"); gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2"); gimsk_reg = new IOSpecialReg(&coreTraceGroup, "GIMSK"); gifr_reg = new IOSpecialReg(&coreTraceGroup, "GIFR"); mcucr_reg = new IOSpecialReg(&coreTraceGroup, "MCUCR"); pcmsk_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK"); extirq = new ExternalIRQHandler(this, irqSystem, gimsk_reg, gifr_reg); extirq->registerIrq(1, 6, new ExternalIRQSingle(mcucr_reg, 0, 2, GetPin("B2"))); extirq->registerIrq(2, 5, new ExternalIRQPort(pcmsk_reg, portb)); // GTCCR register and timer 0 gtccr_reg = new IOSpecialReg(&coreTraceGroup, "GTCCR"); prescaler0 = new HWPrescaler(this, "0", gtccr_reg, 0, 7); timer01irq = new TimerIRQRegister(this, irqSystem); timer01irq->registerLine(1, new IRQLine("TOV0", 5)); timer01irq->registerLine(2, new IRQLine("TOV1", 4)); timer01irq->registerLine(3, new IRQLine("OCF0B", 11)); timer01irq->registerLine(4, new IRQLine("OCF0A", 10)); timer01irq->registerLine(5, new IRQLine("OCF1B", 9)); timer01irq->registerLine(6, new IRQLine("OCF1A", 3)); timer0 = new HWTimer8_2C(this, new PrescalerMultiplexerExt(prescaler0, PinAtPort(portb, 2)), 0, timer01irq->getLine("TOV0"), timer01irq->getLine("OCF0A"), new PinAtPort(portb, 0), timer01irq->getLine("OCF0B"), new PinAtPort(portb, 1)); // PLLCSR register and timer 1 pllcsr_reg = new IOSpecialReg(&coreTraceGroup, "PLLCSR"); timer1 = new HWTimerTinyX5(this, gtccr_reg, pllcsr_reg, timer01irq->getLine("TOV1"), timer01irq->getLine("OCF1A"), new PinAtPort(portb, 1), new PinAtPort(portb, 0), timer01irq->getLine("OCF1B"), new PinAtPort(portb, 4), new PinAtPort(portb, 3)); // ADC admux = new HWAdmuxT25(this, &portb->GetPin(5), &portb->GetPin(2), &portb->GetPin(4), &portb->GetPin(3)); aref = new HWARef8(this, &portb->GetPin(0)); ad = new HWAd(this, HWAd::AD_T25, irqSystem, 8, admux, aref); // Analog comparator acomp = new HWAcomp(this, irqSystem, PinAtPort(portb, 0), PinAtPort(portb, 1), 7, ad, NULL); // USI usi = new HWUSI_BR(this, irqSystem, PinAtPort(portb, 0), PinAtPort(portb, 1), PinAtPort(portb, 2), 13, 14); timer0->SetTimerEventListener(usi); // IO register set rw[0x5f]= statusRegister; rw[0x5e]= & ((HWStackSram *)stack)->sph_reg; rw[0x5d]= & ((HWStackSram *)stack)->spl_reg; //rw[0x5c] reserved rw[0x5b]= gimsk_reg; rw[0x5a]= gifr_reg; rw[0x59]= & timer01irq->timsk_reg; rw[0x58]= & timer01irq->tifr_reg; //rw[0x57] reserved //rw[0x56] reserved rw[0x55]= mcucr_reg; //rw[0x54] reserved rw[0x53]= & timer0->tccrb_reg; rw[0x52]= & timer0->tcnt_reg; rw[0x51]= osccal_reg; rw[0x50]= & timer1->tccr_reg; rw[0x4f]= & timer1->tcnt_reg; rw[0x4e]= & timer1->tocra_reg; rw[0x4d]= & timer1->tocrc_reg; rw[0x4c]= gtccr_reg; rw[0x4b]= & timer1->tocrb_reg; rw[0x4a]= & timer0->tccra_reg; rw[0x49]= & timer0->ocra_reg; rw[0x48]= & timer0->ocrb_reg; rw[0x47]= pllcsr_reg; rw[0x46]= clkpr_reg; rw[0x45]= & timer1->dt1a_reg; rw[0x44]= & timer1->dt1b_reg; rw[0x43]= & timer1->dtps1_reg; //rw[0x42] reserved //rw[0x41] reserved //rw[0x40] reserved rw[0x3f]= & eeprom->eearh_reg; rw[0x3e]= & eeprom->eearl_reg; rw[0x3d]= & eeprom->eedr_reg; rw[0x3c]= & eeprom->eecr_reg; //rw[0x3b] reserved //rw[0x3a] reserved //rw[0x39] reserved rw[0x38]= & portb->port_reg; rw[0x37]= & portb->ddr_reg; rw[0x36]= & portb->pin_reg; rw[0x35]= pcmsk_reg; //rw[0x34] reserved rw[0x33]= gpior2_reg; rw[0x32]= gpior1_reg; rw[0x31]= gpior0_reg; rw[0x30]= &usi->usibr_reg; rw[0x2f]= &usi->usidr_reg; rw[0x2e]= &usi->usisr_reg; rw[0x2d]= &usi->usicr_reg; //rw[0x2c] reserved //rw[0x2b] reserved //rw[0x2a] reserved //rw[0x29] reserved rw[0x28]= &acomp->acsr_reg; rw[0x27]= &ad->admux_reg; rw[0x26]= &ad->adcsra_reg; rw[0x25]= &ad->adch_reg; rw[0x24]= &ad->adcl_reg; rw[0x23]= &ad->adcsrb_reg; //rw[0x22] reserved //rw[0x21] reserved //rw[0x20] reserved Reset(); }
AvrDevice_atmega128base::AvrDevice_atmega128base(unsigned flash_bytes, unsigned ee_bytes): AvrDevice(224, 4096, 0xef00, flash_bytes) { // detect ATMega128 configuration bool is_m128 = (flash_bytes == 128 * 1024); if(is_m128) flagELPMInstructions = true; else flagELPMInstructions = false; fuses->SetFuseConfiguration(18, 0xfd99e1); irqSystem = new HWIrqSystem(this, 4, 35); //4 bytes per vector, 35 vectors eeprom = new HWEeprom( this, irqSystem, ee_bytes, 22); stack = new HWStackSram(this, 16); xdiv_reg = new XDIVRegister(this, &coreTraceGroup); osccal_reg = new OSCCALRegister(this, &coreTraceGroup, OSCCALRegister::OSCCAL_V3); porta = new HWPort(this, "A"); portb = new HWPort(this, "B"); portc = new HWPort(this, "C"); portd = new HWPort(this, "D"); porte = new HWPort(this, "E"); portf = new HWPort(this, "F"); portg = new HWPort(this, "G", false, 5); if(is_m128) rampz = new AddressExtensionRegister(this, "RAMPZ", 1); else rampz = NULL; sfior_reg = new IOSpecialReg(&coreTraceGroup, "SFIOR"); admux = new HWAdmuxM16(this, &portf->GetPin(0), &portf->GetPin(1), &portf->GetPin(2), &portf->GetPin(3), &portf->GetPin(4), &portf->GetPin(5), &portf->GetPin(6), &portf->GetPin(7)); aref = new HWARef4(this, HWARef4::REFTYPE_NOBG); // vector 21 ADConversion Complete ad = new HWAd(this, (is_m128) ? HWAd::AD_M128 : HWAd::AD_M64, irqSystem, 21, admux, aref); spi = new HWSpi(this, irqSystem, PinAtPort(portb, 2), PinAtPort(portb, 3), PinAtPort(portb, 1), PinAtPort(portb, 0),/*irqvec*/ 17, true); eicra_reg = new IOSpecialReg(&coreTraceGroup, "EICRA"); eicrb_reg = new IOSpecialReg(&coreTraceGroup, "EICRB"); eimsk_reg = new IOSpecialReg(&coreTraceGroup, "EIMSK"); eifr_reg = new IOSpecialReg(&coreTraceGroup, "EIFR"); extirq = new ExternalIRQHandler(this, irqSystem, eimsk_reg, eifr_reg); extirq->registerIrq(1, 0, new ExternalIRQSingle(eicra_reg, 0, 2, GetPin("D0"))); extirq->registerIrq(2, 1, new ExternalIRQSingle(eicra_reg, 2, 2, GetPin("D1"))); extirq->registerIrq(3, 2, new ExternalIRQSingle(eicra_reg, 4, 2, GetPin("D2"))); extirq->registerIrq(4, 3, new ExternalIRQSingle(eicra_reg, 6, 2, GetPin("D3"))); extirq->registerIrq(5, 4, new ExternalIRQSingle(eicrb_reg, 0, 2, GetPin("E4"))); extirq->registerIrq(6, 5, new ExternalIRQSingle(eicrb_reg, 2, 2, GetPin("E5"))); extirq->registerIrq(7, 6, new ExternalIRQSingle(eicrb_reg, 4, 2, GetPin("E6"))); extirq->registerIrq(8, 7, new ExternalIRQSingle(eicrb_reg, 6, 2, GetPin("E7"))); assr_reg = new IOSpecialReg(&coreTraceGroup, "ASSR"); prescaler0 = new HWPrescalerAsync(this, "0", PinAtPort(portg, 4), assr_reg, 3, sfior_reg, 1, 7); prescaler123 = new HWPrescaler(this, "123", sfior_reg, 0, 7); wado = new HWWado(this); usart0 = new HWUsart(this, irqSystem, PinAtPort(porte,1), PinAtPort(porte,0), PinAtPort(porte, 2), 18, 19, 20, 0); usart1 = new HWUsart(this, irqSystem, PinAtPort(portd,3), PinAtPort(portd,2), PinAtPort(portd, 5), 30, 31, 32, 1); timer012irq = new TimerIRQRegister(this, irqSystem); timer012irq->registerLine(0, new IRQLine("TOV0", 16)); timer012irq->registerLine(1, new IRQLine("OCF0", 15)); timer012irq->registerLine(2, new IRQLine("TOV1", 14)); timer012irq->registerLine(3, new IRQLine("OCF1B", 13)); timer012irq->registerLine(4, new IRQLine("OCF1A", 12)); timer012irq->registerLine(5, new IRQLine("ICF1", 11)); timer012irq->registerLine(6, new IRQLine("TOV2", 10)); timer012irq->registerLine(7, new IRQLine("OCF2", 9)); timer3irq = new TimerIRQRegister(this, irqSystem, -2); timer3irq->registerLine(0, new IRQLine("OCF1C", 24)); timer3irq->registerLine(1, new IRQLine("OCF3C", 28)); timer3irq->registerLine(2, new IRQLine("TOV3", 29)); timer3irq->registerLine(3, new IRQLine("OCF3B", 27)); timer3irq->registerLine(4, new IRQLine("OCF3A", 26)); timer3irq->registerLine(5, new IRQLine("ICF3", 25)); timer0 = new HWTimer8_1C(this, new PrescalerMultiplexer(prescaler0), 0, timer012irq->getLine("TOV0"), timer012irq->getLine("OCF0"), new PinAtPort(portb, 4)); inputCapture1 = new ICaptureSource(PinAtPort(portd, 4)); timer1 = new HWTimer16_3C(this, new PrescalerMultiplexerExt(prescaler123, PinAtPort(portd, 6)), 1, timer012irq->getLine("TOV1"), timer012irq->getLine("OCF1A"), new PinAtPort(portb, 5), timer012irq->getLine("OCF1B"), new PinAtPort(portb, 6), timer3irq->getLine("OCF1C"), new PinAtPort(portb, 7), timer012irq->getLine("ICF1"), inputCapture1); timer2 = new HWTimer8_1C(this, new PrescalerMultiplexerExt(prescaler123, PinAtPort(portd, 7)), 2, timer012irq->getLine("TOV2"), timer012irq->getLine("OCF2"), new PinAtPort(portb, 7)); inputCapture3 = new ICaptureSource(PinAtPort(porte, 7)); timer3 = new HWTimer16_3C(this, new PrescalerMultiplexerExt(prescaler123, PinAtPort(porte, 6)), 3, timer3irq->getLine("TOV3"), timer3irq->getLine("OCF3A"), new PinAtPort(porte, 3), timer3irq->getLine("OCF3B"), new PinAtPort(porte, 4), timer3irq->getLine("OCF3C"), new PinAtPort(porte, 5), timer3irq->getLine("ICF3"), inputCapture3); acomp = new HWAcomp(this, irqSystem, PinAtPort(porte, 2), PinAtPort(porte, 3), 23, ad, timer1, sfior_reg); rw[0x9d]= & usart1->ucsrc_reg; rw[0x9c]= & usart1->udr_reg; rw[0x9b]= & usart1->ucsra_reg; rw[0x9a]= & usart1->ucsrb_reg; rw[0x99]= & usart1->ubrr_reg; rw[0x98]= & usart1->ubrrhi_reg; // 0x97, 0x96 reserved rw[0x95]= & usart0->ucsrc_reg; // 0x94 - 0x91 reserved rw[0x90]= & usart0->ubrrhi_reg; // 0x8f reserved if(!is_m128) rw[0x8e]= & ad->adcsrb_reg; // 0x8d reserved rw[0x8c]= & timer3->tccrc_reg; rw[0x8b]= & timer3->tccra_reg; rw[0x8a]= & timer3->tccrb_reg; rw[0x89]= & timer3->tcnt_h_reg; rw[0x88]= & timer3->tcnt_l_reg; rw[0x87]= & timer3->ocra_h_reg; rw[0x86]= & timer3->ocra_l_reg; rw[0x85]= & timer3->ocrb_h_reg; rw[0x84]= & timer3->ocrb_l_reg; rw[0x83]= & timer3->ocrc_h_reg; rw[0x82]= & timer3->ocrc_l_reg; rw[0x81]= & timer3->icr_h_reg; rw[0x80]= & timer3->icr_l_reg; // 0x7f, 0x7e reserved rw[0x7d]= & timer3irq->timsk_reg; rw[0x7c]= & timer3irq->tifr_reg; // 0x7b reserved rw[0x7a]= & timer1->tccrc_reg; rw[0x79]= & timer1->ocrc_h_reg; rw[0x78]= & timer1->ocrc_l_reg; rw[0x6f]= osccal_reg; rw[0x6a]= eicra_reg; rw[0x65]= & portg->port_reg; rw[0x64]= & portg->ddr_reg; rw[0x63]= & portg->pin_reg; rw[0x62]= & portf->port_reg; rw[0x61]= & portf->ddr_reg; rw[0x5f]= statusRegister; rw[0x5e]= & ((HWStackSram *)stack)->sph_reg; rw[0x5d]= & ((HWStackSram *)stack)->spl_reg; rw[0x5c]= xdiv_reg; if(is_m128) rw[0x5b]= & rampz->ext_reg; rw[0x5a]= eicrb_reg; rw[0x59]= eimsk_reg; rw[0x58]= eifr_reg; rw[0x57]= & timer012irq->timsk_reg; rw[0x56]= & timer012irq->tifr_reg; rw[0x53]= & timer0->tccr_reg; rw[0x52]= & timer0->tcnt_reg; rw[0x51]= & timer0->ocra_reg; rw[0x50]= assr_reg; rw[0x4f]= & timer1->tccra_reg; rw[0x4e]= & timer1->tccrb_reg; rw[0x4d]= & timer1->tcnt_h_reg; rw[0x4c]= & timer1->tcnt_l_reg; rw[0x4b]= & timer1->ocra_h_reg; rw[0x4a]= & timer1->ocra_l_reg; rw[0x49]= & timer1->ocrb_h_reg; rw[0x48]= & timer1->ocrb_l_reg; rw[0x47]= & timer1->icr_h_reg; rw[0x46]= & timer1->icr_l_reg; rw[0x45]= & timer2->tccr_reg; rw[0x44]= & timer2->tcnt_reg; rw[0x43]= & timer2->ocra_reg; //0x42: on chip debug rw[0x40]= sfior_reg; rw[0x3f]= & eeprom->eearh_reg; rw[0x3e]= & eeprom->eearl_reg; rw[0x3d]= & eeprom->eedr_reg; rw[0x3c]= & eeprom->eecr_reg; rw[0x3b]= & porta->port_reg; rw[0x3a]= & porta->ddr_reg; rw[0x39]= & porta->pin_reg; rw[0x38]= & portb->port_reg; rw[0x37]= & portb->ddr_reg; rw[0x36]= & portb->pin_reg; rw[0x35]= & portc->port_reg; rw[0x34]= & portc->ddr_reg; rw[0x33]= & portc->pin_reg; rw[0x32]= & portd->port_reg; rw[0x31]= & portd->ddr_reg; rw[0x30]= & portd->pin_reg; rw[0x2f]= & spi->spdr_reg; rw[0x2e]= & spi->spsr_reg; rw[0x2d]= & spi->spcr_reg; rw[0x2c]= & usart0->udr_reg; rw[0x2b]= & usart0->ucsra_reg; rw[0x2a]= & usart0->ucsrb_reg; rw[0x29]= & usart0->ubrr_reg; rw[0x28]= & acomp->acsr_reg; rw[0x27]= & ad->admux_reg; rw[0x26]= & ad->adcsra_reg; rw[0x25]= & ad->adch_reg; rw[0x24]= & ad->adcl_reg; rw[0x23]= & porte->port_reg; rw[0x22]= & porte->ddr_reg; rw[0x21]= & porte->pin_reg; rw[0x20]= & portf->pin_reg; Reset(); }
AvrDevice_atmega1284Abase::AvrDevice_atmega1284Abase(unsigned ram_bytes, unsigned flash_bytes, unsigned ee_bytes ): AvrDevice(256-32, // I/O space size (above ALU registers) ram_bytes, // RAM size 0, // External RAM size flash_bytes), // Flash Size porta(this, "A", true), portb(this, "B", true), portc(this, "C", true), portd(this, "D", true), gtccr_reg(&coreTraceGroup, "GTCCR"), assr_reg(&coreTraceGroup, "ASSR"), prescaler01(this, "01", >ccr_reg, 0, 7), prescaler2(this, "2", PinAtPort(&portb, 6), &assr_reg, 5, >ccr_reg, 1, 7) { flagELPMInstructions = true; fuses->SetFuseConfiguration(19, 0xff9962); irqSystem = new HWIrqSystem(this, 4, 31); eeprom = new HWEeprom(this, irqSystem, ee_bytes, 25, HWEeprom::DEVMODE_EXTENDED); stack = new HWStackSram(this, 16); clkpr_reg = new CLKPRRegister(this, &coreTraceGroup); osccal_reg = new OSCCALRegister(this, &coreTraceGroup, OSCCALRegister::OSCCAL_V5); rampz = new AddressExtensionRegister(this, "RAMPZ", 1); eicra_reg = new IOSpecialReg(&coreTraceGroup, "EICRA"); eimsk_reg = new IOSpecialReg(&coreTraceGroup, "EIMSK"); eifr_reg = new IOSpecialReg(&coreTraceGroup, "EIFR"); extirq012 = new ExternalIRQHandler(this, irqSystem, eimsk_reg, eifr_reg); extirq012->registerIrq(1, 0, new ExternalIRQSingle(eicra_reg, 0, 2, GetPin("D2"))); extirq012->registerIrq(2, 1, new ExternalIRQSingle(eicra_reg, 2, 2, GetPin("D3"))); extirq012->registerIrq(3, 2, new ExternalIRQSingle(eicra_reg, 4, 2, GetPin("B2"))); pcicr_reg = new IOSpecialReg(&coreTraceGroup, "PCICR"); pcifr_reg = new IOSpecialReg(&coreTraceGroup, "PCIFR"); pcmsk0_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK0"); pcmsk1_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK1"); pcmsk2_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK2"); pcmsk3_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK3"); extirqpc = new ExternalIRQHandler(this, irqSystem, pcicr_reg, pcifr_reg); extirqpc->registerIrq(4, 0, new ExternalIRQPort(pcmsk0_reg, &porta)); extirqpc->registerIrq(5, 1, new ExternalIRQPort(pcmsk1_reg, &portb)); extirqpc->registerIrq(6, 2, new ExternalIRQPort(pcmsk2_reg, &portc)); extirqpc->registerIrq(7, 3, new ExternalIRQPort(pcmsk3_reg, &portd)); timerIrq0 = new TimerIRQRegister(this, irqSystem, 0); timerIrq0->registerLine(0, new IRQLine("TOV0", 18)); timerIrq0->registerLine(1, new IRQLine("OCF0A", 16)); timerIrq0->registerLine(2, new IRQLine("OCF0B", 17)); timer0 = new HWTimer8_2C(this, new PrescalerMultiplexerExt(&prescaler01, PinAtPort(&portd, 4)), 0, timerIrq0->getLine("TOV0"), timerIrq0->getLine("OCF0A"), new PinAtPort(&portb, 3), timerIrq0->getLine("OCF0B"), new PinAtPort(&portb, 4)); timerIrq1 = new TimerIRQRegister(this, irqSystem, 1); timerIrq1->registerLine(0, new IRQLine("TOV1", 15)); timerIrq1->registerLine(1, new IRQLine("OCF1A", 13)); timerIrq1->registerLine(2, new IRQLine("OCF1B", 14)); timerIrq1->registerLine(5, new IRQLine("ICF1", 12)); inputCapture1 = new ICaptureSource(PinAtPort(&portb, 0)); timer1 = new HWTimer16_2C3(this, new PrescalerMultiplexerExt(&prescaler01, PinAtPort(&portd, 5)), 1, timerIrq1->getLine("TOV1"), timerIrq1->getLine("OCF1A"), new PinAtPort(&portd, 5), timerIrq1->getLine("OCF1B"), new PinAtPort(&portd, 4), timerIrq1->getLine("ICF1"), inputCapture1); timerIrq2 = new TimerIRQRegister(this, irqSystem, 2); timerIrq2->registerLine(0, new IRQLine("TOV2", 11)); timerIrq2->registerLine(1, new IRQLine("OCF2A", 9)); timerIrq2->registerLine(2, new IRQLine("OCF2B", 10)); timer2 = new HWTimer8_2C(this, new PrescalerMultiplexer(&prescaler2), 2, timerIrq2->getLine("TOV2"), timerIrq2->getLine("OCF2A"), new PinAtPort(&portd, 7), timerIrq2->getLine("OCF2B"), new PinAtPort(&portd, 6)); gpior0_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR0"); gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1"); gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2"); admux = new HWAdmuxM16(this, &porta.GetPin(0), &porta.GetPin(1), &porta.GetPin(2), &porta.GetPin(3), &porta.GetPin(4), &porta.GetPin(5), &porta.GetPin(6), &porta.GetPin(7)); aref = new HWARef4(this, HWARef4::REFTYPE_BG3); ad = new HWAd(this, HWAd::AD_M164, irqSystem, 24, admux, aref); acomp = new HWAcomp(this, irqSystem, PinAtPort(&portb, 2), PinAtPort(&portb, 3), 23, ad, timer1); spi = new HWSpi(this, irqSystem, PinAtPort(&portb, 5), // MOSI PinAtPort(&portb, 6), // MISO PinAtPort(&portb, 7), // SCK PinAtPort(&portb, 4), // /SS 19, // irqvec true); wado = new HWWado(this); usart0 = new HWUsart(this, irqSystem, PinAtPort(&portd, 1), // TXD0 PinAtPort(&portd, 0), // RXD0 PinAtPort(&portb, 0), // XCK0 20, // (21) RX complete vector 21, // (22) UDRE vector 22); // (23) TX complete vector usart1 = new HWUsart(this, irqSystem, PinAtPort(&portd, 3), // TXD1 PinAtPort(&portd, 2), // RXD1 PinAtPort(&portd, 4), // XCK1 28, // (29) RX complete vector 29, // (30) UDRE vector 30, // (31) TX complete vector 1); // instance_id for tracking in UI // 0xCF - 0xFF reserved rw[0xCE]= & usart1->udr_reg; rw[0xCD]= & usart1->ubrrhi_reg; rw[0xCC]= & usart1->ubrr_reg; // 0xCB reserved rw[0xCA]= & usart1->ucsrc_reg; rw[0xC9]= & usart1->ucsrb_reg; rw[0xC8]= & usart1->ucsra_reg; // 0xC7 reserved rw[0xC6]= & usart0->udr_reg; rw[0xC5]= & usart0->ubrrhi_reg; rw[0xC4]= & usart0->ubrr_reg; // 0xC3 reserved rw[0xC2]= & usart0->ucsrc_reg; rw[0xC1]= & usart0->ucsrb_reg; rw[0xC0]= & usart0->ucsra_reg; // 0xBF reserved // 0xBE reserved rw[0xBD]= new NotSimulatedRegister("TWI register TWAMR not simulated"); rw[0xBC]= new NotSimulatedRegister("TWI register TWCR not simulated"); rw[0xBB]= new NotSimulatedRegister("TWI register TWDR not simulated"); rw[0xBA]= new NotSimulatedRegister("TWI register TWAR not simulated"); rw[0xB9]= new NotSimulatedRegister("TWI register TWSR not simulated"); rw[0xB8]= new NotSimulatedRegister("TWI register TWBR not simulated"); // 0xB7 reserved rw[0xb6]= & assr_reg; // 0xb5 reserved rw[0xb4]= & timer2->ocrb_reg; rw[0xb3]= & timer2->ocra_reg; rw[0xb2]= & timer2->tcnt_reg; rw[0xb1]= & timer2->tccrb_reg; rw[0xb0]= & timer2->tccra_reg; // 0x8c - 0xaf reserved rw[0x8b]= & timer1->ocrb_h_reg; rw[0x8a]= & timer1->ocrb_l_reg; rw[0x89]= & timer1->ocra_h_reg; rw[0x88]= & timer1->ocra_l_reg; rw[0x87]= & timer1->icr_h_reg; rw[0x86]= & timer1->icr_l_reg; rw[0x85]= & timer1->tcnt_h_reg; rw[0x84]= & timer1->tcnt_l_reg; // 0x83 reserved rw[0x82]= & timer1->tccrc_reg; rw[0x81]= & timer1->tccrb_reg; rw[0x80]= & timer1->tccra_reg; rw[0x7F]= new NotSimulatedRegister("ADC register DIDR1 not simulated"); rw[0x7E]= new NotSimulatedRegister("ADC register DIDR0 not simulated"); // 0x7D reserved rw[0x7C]= & ad->admux_reg; rw[0x7B]= & ad->adcsrb_reg; rw[0x7A]= & ad->adcsra_reg; rw[0x79]= & ad->adch_reg; rw[0x78]= & ad->adcl_reg; // 0x74, 0x75, 0x76, 0x77 reserved rw[0x73]= pcmsk3_reg; // 0x72 reserved // 0x71 reserved rw[0x70]= & timerIrq2->timsk_reg; rw[0x6F]= & timerIrq1->timsk_reg; rw[0x6E]= & timerIrq0->timsk_reg; rw[0x6d]= pcmsk2_reg; rw[0x6c]= pcmsk1_reg; rw[0x6b]= pcmsk0_reg; // 0x6A reserved rw[0x69]= eicra_reg; rw[0x68]= pcicr_reg; // 0x67 reserved rw[0x66]= osccal_reg; // 0x65 reserved rw[0x64]= new NotSimulatedRegister("MCU register PRR not simulated"); // 0x63 reserved // 0x62 reserved rw[0x61]= clkpr_reg; rw[0x60]= new NotSimulatedRegister("MCU register WDTCSR not simulated"); rw[0x5f]= statusRegister; rw[0x5e]= & ((HWStackSram *)stack)->sph_reg; rw[0x5d]= & ((HWStackSram *)stack)->spl_reg; // 0x5c reserved rw[0x5b]= & rampz->ext_reg; // 0x58 - 0x5a reserved rw[0x57]= new NotSimulatedRegister("Self-programming register SPMCSR not simulated"); // 0x56 reserved rw[0x55]= new NotSimulatedRegister("MCU register MCUCR not simulated"); rw[0x54]= new NotSimulatedRegister("MCU register MCUSR not simulated"); rw[0x53]= new NotSimulatedRegister("MCU register SMCR not simulated"); // 0x52 reserved rw[0x51]= new NotSimulatedRegister("On-chip debug register OCDR not simulated"); rw[0x50]= & acomp->acsr_reg; // 0x4F reserved rw[0x4E]= & spi->spdr_reg; rw[0x4D]= & spi->spsr_reg; rw[0x4C]= & spi->spcr_reg; rw[0x4B]= gpior2_reg; rw[0x4A]= gpior1_reg; // 0x49 reserved rw[0x48]= & timer0->ocrb_reg; rw[0x47]= & timer0->ocra_reg; rw[0x46]= & timer0->tcnt_reg; rw[0x45]= & timer0->tccrb_reg; rw[0x44]= & timer0->tccra_reg; rw[0x43]= & gtccr_reg; rw[0x42]= & eeprom->eearh_reg; rw[0x41]= & eeprom->eearl_reg; rw[0x40]= & eeprom->eedr_reg; rw[0x3F]= & eeprom->eecr_reg; rw[0x3E]= gpior0_reg; rw[0x3D]= eimsk_reg; rw[0x3C]= eifr_reg; rw[0x3b]= pcifr_reg; // 0x38, 0x39, 0x3A reserved rw[0x37]= & timerIrq2->tifr_reg; rw[0x36]= & timerIrq1->tifr_reg; rw[0x35]= & timerIrq0->tifr_reg; // 0x2C - 0x34 reserved rw[0x2B]= & portd.port_reg; rw[0x2A]= & portd.ddr_reg; rw[0x29]= & portd.pin_reg; rw[0x28]= & portc.port_reg; rw[0x27]= & portc.ddr_reg; rw[0x26]= & portc.pin_reg; rw[0x25]= & portb.port_reg; rw[0x24]= & portb.ddr_reg; rw[0x23]= & portb.pin_reg; rw[0x22]= & porta.port_reg; rw[0x21]= & porta.ddr_reg; rw[0x20]= & porta.pin_reg; Reset(); }
AvrDevice_atmega8::AvrDevice_atmega8() : AvrDevice(64, // I/O space above General Purpose Registers 1024, // RAM size 0, // External RAM size 8 * 1024), // Flash Size aref() { irqSystem = new HWIrqSystem(this, 2, 19); //2 bytes per vector, 19 vectors eeprom = new HWEeprom(this, irqSystem, 512, 15); HWStackSram * stack_ram = new HWStackSram(this, 11); // Stack Pointer data space used 11 Bit wide. stack = stack_ram; portb = new HWPort(this, "B"); portc = new HWPort(this, "C"); portd = new HWPort(this, "D"); spmRegister = new FlashProgramming(this, // defined device 32, // 32 words per page * 2 bytes per page * 128 pages = 8192 Bytes 0xC000, // No Read-While-Write section starts at 0xC00 FlashProgramming::SPM_MEGA_MODE); // RegisterPin("AREF", &aref); admux = new HWAdmux(this, &portc->GetPin(0), // ADC0 &portc->GetPin(1), // ADC1 &portc->GetPin(2), // ADC2 &portc->GetPin(3), // ADC3 &portc->GetPin(4), // ADC4 &portc->GetPin(5), // ADC5 &portc->GetPin(19), // ADC6 only TQFP version &portc->GetPin(22)); // ADC7 only TQFP version ad = new HWAd(this, admux, irqSystem, aref, 14); // Interrupt Vector ADC Conversion Complete spi = new HWSpi(this, irqSystem, PinAtPort(portb, 3), // MOSI PinAtPort(portb, 4), // MISO PinAtPort(portb, 5), // SCK PinAtPort(portb, 2), // SS 10, // Interrupt Vector Serial Transfer Complete true); gicr_reg = new IOSpecialReg(&coreTraceGroup, "GICR"); gifr_reg = new IOSpecialReg(&coreTraceGroup, "GIFR"); mcucr_reg = new IOSpecialReg(&coreTraceGroup, "MCUCR"); mcucsr_reg = new IOSpecialReg(&coreTraceGroup, "MCUCSR"); extirq = new ExternalIRQHandler(this, irqSystem, gicr_reg, gifr_reg); extirq->registerIrq(1, // INT0 External Interrupt Request 0 6, // GICR Bit 6 - INT0: External Interrupt Request 0 Enable new ExternalIRQSingle(mcucr_reg,0, 2, GetPin("D2"))); // INT0 extirq->registerIrq(2, // INT1 External Interrupt Request 1 7, // GICR Bit 7 - INT1: External Interrupt Request 1 Enable new ExternalIRQSingle(mcucr_reg, 2, 2, GetPin("D3"))); // INT1 sfior_reg = new IOSpecialReg(&coreTraceGroup, "SFIOR"); assr_reg = new IOSpecialReg(&coreTraceGroup, "ASSR"); prescaler01 = new HWPrescaler(this, "01", sfior_reg, 0); prescaler2 = new HWPrescalerAsync(this, "2", PinAtPort(portb, 6), assr_reg, 3, sfior_reg, 1); wado = new HWWado(this); usart = new HWUsart(this, irqSystem, PinAtPort(portd, 1), // TX PinAtPort(portd, 0), // RX PinAtPort(portd, 4), // XCK 11, // USART, RX Complete 12, // USART Data Register Empty 13); // USART, TX Complete timer012irq = new TimerIRQRegister(this, irqSystem); timer012irq->registerLine(0, new IRQLine("TOV0", 9)); timer012irq->registerLine(2, new IRQLine("TOV1", 8)); timer012irq->registerLine(3, new IRQLine("OCF1B", 7)); timer012irq->registerLine(4, new IRQLine("OCF1A", 6)); timer012irq->registerLine(5, new IRQLine("ICF1", 5)); timer012irq->registerLine(6, new IRQLine("TOV2", 4)); timer012irq->registerLine(7, new IRQLine("OCF2", 3)); timer0 = new HWTimer8_0C(this, new PrescalerMultiplexerExt(prescaler01, PinAtPort(portd, 4)), // T0 0, timer012irq->getLine("TOV0")); inputCapture1 = new ICaptureSource(PinAtPort(portb, 0)); // ICP1 timer1 = new HWTimer16_2C2(this, new PrescalerMultiplexerExt(prescaler01, PinAtPort(portd, 5)), // T1 1, timer012irq->getLine("TOV1"), timer012irq->getLine("OCF1A"), new PinAtPort(portb, 1), // OC1A timer012irq->getLine("OCF1B"), new PinAtPort(portb, 2), // OC1B timer012irq->getLine("ICF1"), inputCapture1, false); timer2 = new HWTimer8_1C(this, new PrescalerMultiplexer(prescaler2), 2, timer012irq->getLine("TOV2"), timer012irq->getLine("OCF2"), new PinAtPort(portb, 3)); // OC2 rw[0x5f] = statusRegister; rw[0x5e] = &stack_ram->sph_reg; rw[0x5d] = &stack_ram->spl_reg; // rw[0x5c] Reserved rw[0x5b] = gicr_reg; rw[0x5a] = gifr_reg; rw[0x59] = &timer012irq->timsk_reg; rw[0x58] = &timer012irq->tifr_reg; rw[0x57] = &spmRegister->spmcr_reg; // rw[0x56] TWCR rw[0x55] = mcucr_reg; rw[0x54] = mcucsr_reg; rw[0x53] = &timer0->tccr_reg; rw[0x52] = &timer0->tcnt_reg; // rw[0x51] OSCCAL/OCDR rw[0x50] = sfior_reg; rw[0x4f] = &timer1->tccra_reg; rw[0x4e] = &timer1->tccrb_reg; rw[0x4d] = &timer1->tcnt_h_reg; rw[0x4c] = &timer1->tcnt_l_reg; rw[0x4b] = &timer1->ocra_h_reg; rw[0x4a] = &timer1->ocra_l_reg; rw[0x49] = &timer1->ocrb_h_reg; rw[0x48] = &timer1->ocrb_l_reg; rw[0x47] = &timer1->icr_h_reg; rw[0x46] = &timer1->icr_l_reg; rw[0x45] = &timer2->tccr_reg; rw[0x44] = &timer2->tcnt_reg; rw[0x43] = &timer2->ocra_reg; rw[0x42] = assr_reg; rw[0x41] = &wado->wdtcr_reg; rw[0x40] = &usart->ucsrc_ubrrh_reg; rw[0x3f] = &eeprom->eearh_reg; rw[0x3e] = &eeprom->eearl_reg; rw[0x3d] = &eeprom->eedr_reg; rw[0x3c] = &eeprom->eecr_reg; // rw[0x3b] Reserved // rw[0x3a] Reserved // rw[0x39] Reserved rw[0x38] = &portb->port_reg; rw[0x37] = &portb->ddr_reg; rw[0x36] = &portb->pin_reg; rw[0x35] = &portc->port_reg; rw[0x34] = &portc->ddr_reg; rw[0x33] = &portc->pin_reg; rw[0x32] = &portd->port_reg; rw[0x31] = &portd->ddr_reg; rw[0x30] = &portd->pin_reg; rw[0x2f] = &spi->spdr_reg; rw[0x2e] = &spi->spsr_reg; rw[0x2d] = &spi->spcr_reg; rw[0x2c] = &usart->udr_reg; rw[0x2b] = &usart->ucsra_reg; rw[0x2a] = &usart->ucsrb_reg; rw[0x29] = &usart->ubrr_reg; // rw[0x28] ACSR rw[0x27] = &admux->admux_reg; rw[0x26] = &ad->adcsr_reg; rw[0x25] = &ad->adch_reg; rw[0x24] = &ad->adcl_reg; // rw[0x23] TWDR // rw[0x22] TWAR // rw[0x21] TWSR // rw[0x20] TWBR Reset(); }
AvrDevice_at90canbase::AvrDevice_at90canbase(unsigned ram_bytes, unsigned flash_bytes, unsigned ee_bytes ): AvrDevice(224, // I/O space above General Purpose Registers ram_bytes, // RAM size 0, // External RAM size flash_bytes), // Flash Size porta(this, "A", true), portb(this, "B", true), portc(this, "C", true, 7), portd(this, "D", true), porte(this, "E", true), portf(this, "F", true), portg(this, "G", true), gtccr_reg(&coreTraceGroup, "GTCCR"), assr_reg(&coreTraceGroup, "ASSR"), prescaler013(this, "01", >ccr_reg, 0, 7), prescaler2(this, "2", PinAtPort(&portc, 7), &assr_reg, 5, >ccr_reg, 1, 7) { flagELPMInstructions = true; fuses->SetFuseConfiguration(20, 0xff9962); irqSystem = new HWIrqSystem(this, (flash_bytes > 8U * 1024U) ? 4 : 2, 37); eeprom = new HWEeprom(this, irqSystem, ee_bytes, 26, HWEeprom::DEVMODE_EXTENDED); stack = new HWStackSram(this, 16); clkpr_reg = new CLKPRRegister(this, &coreTraceGroup); osccal_reg = new OSCCALRegister(this, &coreTraceGroup, OSCCALRegister::OSCCAL_V4); rampz = new AddressExtensionRegister(this, "RAMPZ", 1); eicra_reg = new IOSpecialReg(&coreTraceGroup, "EICRA"); eicrb_reg = new IOSpecialReg(&coreTraceGroup, "EICRB"); eimsk_reg = new IOSpecialReg(&coreTraceGroup, "EIMSK"); eifr_reg = new IOSpecialReg(&coreTraceGroup, "EIFR"); extirq01 = new ExternalIRQHandler(this, irqSystem, eimsk_reg, eifr_reg); extirq01->registerIrq(1, 0, new ExternalIRQSingle(eicra_reg, 0, 2, GetPin("D0"))); extirq01->registerIrq(2, 1, new ExternalIRQSingle(eicra_reg, 2, 2, GetPin("D1"))); extirq01->registerIrq(3, 2, new ExternalIRQSingle(eicra_reg, 4, 2, GetPin("D2"))); extirq01->registerIrq(4, 3, new ExternalIRQSingle(eicra_reg, 6, 2, GetPin("D3"))); extirq01->registerIrq(5, 4, new ExternalIRQSingle(eicrb_reg, 0, 2, GetPin("E4"))); extirq01->registerIrq(6, 5, new ExternalIRQSingle(eicrb_reg, 2, 2, GetPin("E5"))); extirq01->registerIrq(7, 6, new ExternalIRQSingle(eicrb_reg, 4, 2, GetPin("E6"))); extirq01->registerIrq(8, 7, new ExternalIRQSingle(eicrb_reg, 6, 2, GetPin("E7"))); timerIrq0 = new TimerIRQRegister(this, irqSystem, 0); timerIrq0->registerLine(0, new IRQLine("TOV0", 17)); // TIMER0 OVF timerIrq0->registerLine(1, new IRQLine("OCF0A", 16)); // TIMER0 COMP timer0 = new HWTimer8_1C(this, new PrescalerMultiplexerExt(&prescaler013, PinAtPort(&portd, 7)), 0, timerIrq0->getLine("TOV0"), timerIrq0->getLine("OCF0A"), new PinAtPort(&portb, 7)); timerIrq1 = new TimerIRQRegister(this, irqSystem, 1); timerIrq1->registerLine(0, new IRQLine("TOV1", 15)); // TIMER1 OVF timerIrq1->registerLine(1, new IRQLine("OCF1A", 12)); // TIMER1 COMPA timerIrq1->registerLine(2, new IRQLine("OCF1B", 13)); // TIMER1 COMPB timerIrq1->registerLine(3, new IRQLine("OCF1C", 14)); // TIMER1 COMPC timerIrq1->registerLine(5, new IRQLine("ICF1", 11)); // TIMER1 CAPT inputCapture1 = new ICaptureSource(PinAtPort(&portd, 4)); timer1 = new HWTimer16_3C(this, new PrescalerMultiplexer(&prescaler013), 1, timerIrq1->getLine("TOV1"), timerIrq1->getLine("OCF1A"), new PinAtPort(&portb, 1), timerIrq1->getLine("OCF1B"), new PinAtPort(&portb, 2), timerIrq1->getLine("OCF1C"), new PinAtPort(&portb, 3), timerIrq1->getLine("ICF1"), inputCapture1); timerIrq2 = new TimerIRQRegister(this, irqSystem, 2); timerIrq2->registerLine(0, new IRQLine("TOV2", 10)); // TIMER2 OVF timerIrq2->registerLine(1, new IRQLine("OCF2A", 9)); // TIMER2 COMP timer2 = new HWTimer8_1C(this, new PrescalerMultiplexer(&prescaler2), 2, timerIrq2->getLine("TOV2"), timerIrq2->getLine("OCF2A"), new PinAtPort(&portb, 4)); timerIrq3 = new TimerIRQRegister(this, irqSystem, 3); timerIrq3->registerLine(0, new IRQLine("TOV3", 31)); // TIMER3 OVF timerIrq3->registerLine(1, new IRQLine("OCF3A", 28)); // TIMER3 COMPA timerIrq3->registerLine(2, new IRQLine("OCF3B", 29)); // TIMER3 COMPB timerIrq3->registerLine(3, new IRQLine("OCF3C", 30)); // TIMER3 COMPC timerIrq3->registerLine(5, new IRQLine("ICF3", 27)); // TIMER3 CAPT inputCapture3 = new ICaptureSource(PinAtPort(&porte, 7)); timer3 = new HWTimer16_3C(this, new PrescalerMultiplexerExt(&prescaler013, PinAtPort(&porte, 6)), 3, timerIrq3->getLine("TOV3"), timerIrq3->getLine("OCF3A"), new PinAtPort(&portb, 1), timerIrq3->getLine("OCF3B"), new PinAtPort(&portb, 2), timerIrq3->getLine("OCF3C"), new PinAtPort(&portb, 3), timerIrq3->getLine("ICF3"), inputCapture3); gpior0_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR0"); gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1"); gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2"); admux = new HWAdmuxM16(this, &portf.GetPin(0), &portf.GetPin(1), &portf.GetPin(2), &portf.GetPin(3), &portf.GetPin(4), &portf.GetPin(5), &portf.GetPin(6), &portf.GetPin(7)); aref = new HWARef4(this, HWARef4::REFTYPE_NOBG); ad = new HWAd(this, HWAd::AD_M164, irqSystem, 25, admux, aref); spi = new HWSpi(this, irqSystem, PinAtPort(&portb, 2), // MOSI PinAtPort(&portb, 3), // MISO PinAtPort(&portb, 1), // SCK PinAtPort(&portb, 0), // /SS 20, // irqvec true); wado = new HWWado(this); acomp = new HWAcomp(this, irqSystem, PinAtPort(&porte, 2), PinAtPort(&porte, 3), 24, ad, timer1); usart0 = new HWUsart(this, irqSystem, PinAtPort(&porte,1), // TXD PinAtPort(&porte,0), // RXD PinAtPort(&porte,2), // XCK 21, // RX complete vector 22, // UDRE vector 23, // TX complete vector 0); usart1 = new HWUsart(this, irqSystem, PinAtPort(&portd,3), // TXD PinAtPort(&portd,2), // RXD PinAtPort(&portd,5), // XCK 32, // RX complete vector 33, // UDRE vector 34, // TX complete vector 1); /* 0xfb - 0xff reserved */ /* 0xd8 - 0xfa CANBUS TODO */ /* 0xcf - 0xd7 reserved */ rw[0xce]= & usart1->udr_reg; rw[0xcd]= & usart1->ubrrhi_reg; /* 0xcb reserved */ rw[0xca]= & usart1->ucsrc_reg; rw[0xcc]= & usart1->ubrr_reg; rw[0xc9]= & usart1->ucsrb_reg; rw[0xc8]= & usart1->ucsra_reg; /* 0xc7 reserved */ rw[0xc6]= & usart0->udr_reg; rw[0xc5]= & usart0->ubrrhi_reg; rw[0xc4]= & usart0->ubrr_reg; /* 0xc3 reserved */ rw[0xc2]= & usart0->ucsrc_reg; rw[0xc1]= & usart0->ucsrb_reg; rw[0xc0]= & usart0->ucsra_reg; /* 0xbd - 0xbf reserved */ rw[0xBC]= new NotSimulatedRegister("TWI register TWCR not simulated"); rw[0xBB]= new NotSimulatedRegister("TWI register TWDR not simulated"); rw[0xBA]= new NotSimulatedRegister("TWI register TWAR not simulated"); rw[0xB9]= new NotSimulatedRegister("TWI register TWSR not simulated"); rw[0xB8]= new NotSimulatedRegister("TWI register TWBR not simulated"); /* 0xb7 reserved */ rw[0xb6]= & assr_reg; /* 0xb4 - 0xb5 reserved */ rw[0xb3]= & timer2->ocra_reg; rw[0xb2]= & timer2->tcnt_reg; /* 0xb1 reserved */ rw[0xb0]= & timer2->tccr_reg; /* 0x9e - 0xaf reserved */ rw[0x9d]= & timer3->ocrc_h_reg; rw[0x9c]= & timer3->ocrc_l_reg; rw[0x9b]= & timer3->ocrb_h_reg; rw[0x9a]= & timer3->ocrb_l_reg; rw[0x99]= & timer3->ocra_h_reg; rw[0x98]= & timer3->ocra_l_reg; rw[0x97]= & timer3->icr_h_reg; rw[0x96]= & timer3->icr_l_reg; rw[0x95]= & timer3->tcnt_h_reg; rw[0x94]= & timer3->tcnt_l_reg; /* 0x93 reserved */ rw[0x92]= & timer3->tccrc_reg; rw[0x91]= & timer3->tccrb_reg; rw[0x90]= & timer3->tccra_reg; /* 0x8e - 0x8f reserved */ rw[0x8d]= & timer1->ocrc_h_reg; rw[0x8c]= & timer1->ocrc_l_reg; rw[0x8b]= & timer1->ocrb_h_reg; rw[0x8a]= & timer1->ocrb_l_reg; rw[0x89]= & timer1->ocra_h_reg; rw[0x88]= & timer1->ocra_l_reg; rw[0x87]= & timer1->icr_h_reg; rw[0x86]= & timer1->icr_l_reg; rw[0x85]= & timer1->tcnt_h_reg; rw[0x84]= & timer1->tcnt_l_reg; // 0x83 reserved rw[0x82]= & timer1->tccrc_reg; rw[0x81]= & timer1->tccrb_reg; rw[0x80]= & timer1->tccra_reg; /* 0x7e-0x7f DIDR TODO */ rw[0x7C]= & ad->admux_reg; rw[0x7B]= & ad->adcsrb_reg; rw[0x7A]= & ad->adcsra_reg; rw[0x79]= & ad->adch_reg; rw[0x78]= & ad->adcl_reg; /* 0x76-0x77 reserved */ /* 0x74-0x75 External memory control registers TODO */ /* 0x72-0x73 reserved */ rw[0x70]= & timerIrq2->timsk_reg; rw[0x6F]= & timerIrq1->timsk_reg; rw[0x6E]= & timerIrq0->timsk_reg; /* 0x6b-0x6d Reserved */ rw[0x6A]= eicrb_reg; rw[0x69]= eicra_reg; /* 0x67-0x68 Reserved */ rw[0x66]= osccal_reg; /* 0x62-0x65 Reserved */ rw[0x61]= clkpr_reg; rw[0x60]= & wado->wdtcr_reg; rw[0x5f]= statusRegister; rw[0x5e]= & ((HWStackSram *)stack)->sph_reg; rw[0x5d]= & ((HWStackSram *)stack)->spl_reg; /* 0x5c reserved */ rw[0x5b]= & rampz->ext_reg; /* 0x58-0x5A Reserved */ /* 0x57 SPMCSR TODO?? */ /* 0x56 Reserved */ /* 0x55 MCUCR -- Memory control TODO */ /* 0x54 MCUSR -- Memory control TODO */ /* 0x53 SMCR -- sleep register TODO */ /* 0x52 Reserved */ /* 0x51 OCDR */ rw[0x50]= & acomp->acsr_reg; /* 0x4f reserved */ rw[0x4E]= & spi->spdr_reg; rw[0x4D]= & spi->spsr_reg; rw[0x4C]= & spi->spcr_reg; rw[0x4B]= gpior2_reg; rw[0x4A]= gpior1_reg; /* 0x48 - 0x49 reserved */ rw[0x47]= & timer0->ocra_reg; rw[0x46]= & timer0->tcnt_reg; /* 0x45 reserved */ rw[0x44]= & timer0->tccr_reg; rw[0x43]= & gtccr_reg; rw[0x42]= & eeprom->eearh_reg; rw[0x41]= & eeprom->eearl_reg; rw[0x40]= & eeprom->eedr_reg; rw[0x3F]= & eeprom->eecr_reg; rw[0x3E]= gpior0_reg; rw[0x3D]= eimsk_reg; rw[0x3C]= eifr_reg; /* 0x39-0x3b Reserved */ rw[0x38]= & timerIrq3->tifr_reg; rw[0x37]= & timerIrq2->tifr_reg; rw[0x36]= & timerIrq1->tifr_reg; rw[0x35]= & timerIrq0->tifr_reg; rw[0x34]= & portg.port_reg; rw[0x33]= & portg.ddr_reg; rw[0x32]= & portg.pin_reg; rw[0x31]= & portf.port_reg; rw[0x30]= & portf.ddr_reg; rw[0x2F]= & portf.pin_reg; rw[0x2E]= & porte.port_reg; rw[0x2D]= & porte.ddr_reg; rw[0x2C]= & porte.pin_reg; rw[0x2B]= & portd.port_reg; rw[0x2A]= & portd.ddr_reg; rw[0x29]= & portd.pin_reg; rw[0x28]= & portc.port_reg; rw[0x27]= & portc.ddr_reg; rw[0x26]= & portc.pin_reg; rw[0x25]= & portb.port_reg; rw[0x24]= & portb.ddr_reg; rw[0x23]= & portb.pin_reg; rw[0x22]= & porta.port_reg; rw[0x21]= & porta.ddr_reg; rw[0x20]= & porta.pin_reg; Reset(); }
AvrDevice_atmega16_32::AvrDevice_atmega16_32(unsigned ram_bytes, unsigned flash_bytes, unsigned ee_bytes, unsigned nrww_start, bool atmega16): AvrDevice(64 , // I/O space above General Purpose Registers ram_bytes, // RAM size 0, // External RAM size flash_bytes) // Flash Size { fuses->SetFuseConfiguration(16, 0x99e1); irqSystem = new HWIrqSystem(this, 4, 21); //4 bytes per vector, 21 vectors eeprom = new HWEeprom(this, irqSystem, ee_bytes, atmega16 ? 15 : 17); stack = new HWStackSram(this, atmega16 ? 11 : 12); osccal_reg = new OSCCALRegister(this, &coreTraceGroup, OSCCALRegister::OSCCAL_V3); porta = new HWPort(this, "A"); portb = new HWPort(this, "B"); portc = new HWPort(this, "C"); portd = new HWPort(this, "D"); spmRegister = new FlashProgramming(this, 64, nrww_start, FlashProgramming::SPM_MEGA_MODE); // TWI/I2C not implemented yet, vectors 17/19 // Analog Comparator not implemented yet, vectors 16/18 // Store Program Memory Ready not implemented yet, vectors 21/21 sfior_reg = new IOSpecialReg(&coreTraceGroup, "SFIOR"); admux = new HWAdmuxM16(this, &porta->GetPin(0), &porta->GetPin(1), &porta->GetPin(2), &porta->GetPin(3), &porta->GetPin(4), &porta->GetPin(5), &porta->GetPin(6), &porta->GetPin(7)); aref = new HWARef4(this, HWARef4::REFTYPE_NOBG); ad = new HWAd_SFIOR(this, HWAd::AD_M16, irqSystem, atmega16 ? 14 : 16, admux, aref, sfior_reg); spi = new HWSpi(this, irqSystem, PinAtPort(portb, 5), PinAtPort(portb, 6), PinAtPort(portb, 7), PinAtPort(portb, 4),/*irqvec*/ atmega16 ? 10 : 12, true); gicr_reg = new IOSpecialReg(&coreTraceGroup, "GICR"); gifr_reg = new IOSpecialReg(&coreTraceGroup, "GIFR"); mcucr_reg = new IOSpecialReg(&coreTraceGroup, "MCUCR"); mcucsr_reg = new IOSpecialReg(&coreTraceGroup, "MCUCSR"); extirq = new ExternalIRQHandler(this, irqSystem, gicr_reg, gifr_reg); extirq->registerIrq(1, 6, new ExternalIRQSingle(mcucr_reg, 0, 2, GetPin("D2"))); // INT0 extirq->registerIrq(2, 7, new ExternalIRQSingle(mcucr_reg, 2, 2, GetPin("D3"))); // INT1 extirq->registerIrq(atmega16 ? 18 : 3, 5, new ExternalIRQSingle(mcucsr_reg, 6, 1, GetPin("B2"))); // INT2 assr_reg = new IOSpecialReg(&coreTraceGroup, "ASSR"); prescaler01 = new HWPrescaler(this, "01", sfior_reg, 0); prescaler2 = new HWPrescalerAsync(this, "2", PinAtPort(portc, 6), assr_reg, 3, sfior_reg, 1); wado = new HWWado(this); usart = new HWUsart(this, irqSystem, PinAtPort(portd,1), PinAtPort(portd,0), PinAtPort(portb, 0), atmega16 ? 11 : 13, atmega16 ? 12 : 14, atmega16 ? 13 : 15); timer012irq = new TimerIRQRegister(this, irqSystem); timer012irq->registerLine(0, new IRQLine("TOV0", atmega16 ? 9 : 11)); // Timer/Counter0 Overflow timer012irq->registerLine(1, new IRQLine("OCF0", atmega16 ? 19 : 10)); // Timer/Counter0 Compare Match timer012irq->registerLine(2, new IRQLine("TOV1", atmega16 ? 8 : 9)); // Timer/Counter1 Overflow timer012irq->registerLine(3, new IRQLine("OCF1B", atmega16 ? 7 : 8)); // Timer/Counter1 Compare Match B timer012irq->registerLine(4, new IRQLine("OCF1A", atmega16 ? 6 : 7)); // Timer/Counter1 Compare Match A timer012irq->registerLine(5, new IRQLine("ICF1", atmega16 ? 5 : 6)); // Timer/Counter1 Capture Even timer012irq->registerLine(6, new IRQLine("TOV2", atmega16 ? 4 : 5)); // Timer/Counter2 Overflow timer012irq->registerLine(7, new IRQLine("OCF2", atmega16 ? 3 : 4)); // Timer/Counter2 Compare Match timer0 = new HWTimer8_1C(this, new PrescalerMultiplexerExt(prescaler01, PinAtPort(portb, 0)), 0, timer012irq->getLine("TOV0"), timer012irq->getLine("OCF0"), new PinAtPort(portb, 3)); inputCapture1 = new ICaptureSource(PinAtPort(portd, 6)); timer1 = new HWTimer16_2C2(this, new PrescalerMultiplexerExt(prescaler01, PinAtPort(portb, 1)), 1, timer012irq->getLine("TOV1"), timer012irq->getLine("OCF1A"), new PinAtPort(portd, 5), timer012irq->getLine("OCF1B"), new PinAtPort(portd, 4), timer012irq->getLine("ICF1"), inputCapture1, false); timer2 = new HWTimer8_1C(this, new PrescalerMultiplexer(prescaler2), 2, timer012irq->getLine("TOV2"), timer012irq->getLine("OCF2"), new PinAtPort(portd, 7)); acomp = new HWAcomp(this, irqSystem, PinAtPort(portb, 2), PinAtPort(portb, 3), atmega16 ? 16 : 18, ad, timer1, sfior_reg); rw[0x5f]= statusRegister; rw[0x5e]= & ((HWStackSram *)stack)->sph_reg; rw[0x5d]= & ((HWStackSram *)stack)->spl_reg; rw[0x5c]= & timer0->ocra_reg; rw[0x5b]= gicr_reg; rw[0x5a]= gifr_reg; rw[0x59]= & timer012irq->timsk_reg; rw[0x58]= & timer012irq->tifr_reg; rw[0x57]= & spmRegister->spmcr_reg; //rw[0x56] TWCR rw[0x55] = mcucr_reg; rw[0x54] = mcucsr_reg; rw[0x53]= & timer0->tccr_reg; rw[0x52]= & timer0->tcnt_reg; rw[0x51]= osccal_reg; // Attention! OCDR register isn't simulated! rw[0x50]= sfior_reg; rw[0x4f]= & timer1->tccra_reg; rw[0x4e]= & timer1->tccrb_reg; rw[0x4d]= & timer1->tcnt_h_reg; rw[0x4c]= & timer1->tcnt_l_reg; rw[0x4b]= & timer1->ocra_h_reg; rw[0x4a]= & timer1->ocra_l_reg; rw[0x49]= & timer1->ocrb_h_reg; rw[0x48]= & timer1->ocrb_l_reg; rw[0x47]= & timer1->icr_h_reg; rw[0x46]= & timer1->icr_l_reg; rw[0x45]= & timer2->tccr_reg; rw[0x44]= & timer2->tcnt_reg; rw[0x43]= & timer2->ocra_reg; rw[0x42]= assr_reg; rw[0x41]= & wado->wdtcr_reg; rw[0x40]= & usart->ucsrc_ubrrh_reg; rw[0x3f]= & eeprom->eearh_reg; rw[0x3e]= & eeprom->eearl_reg; rw[0x3d]= & eeprom->eedr_reg; rw[0x3c]= & eeprom->eecr_reg; rw[0x3b]= & porta->port_reg; rw[0x3a]= & porta->ddr_reg; rw[0x39]= & porta->pin_reg; rw[0x38]= & portb->port_reg; rw[0x37]= & portb->ddr_reg; rw[0x36]= & portb->pin_reg; rw[0x35]= & portc->port_reg; rw[0x34]= & portc->ddr_reg; rw[0x33]= & portc->pin_reg; rw[0x32]= & portd->port_reg; rw[0x31]= & portd->ddr_reg; rw[0x30]= & portd->pin_reg; rw[0x2f]= & spi->spdr_reg; rw[0x2e]= & spi->spsr_reg; rw[0x2d]= & spi->spcr_reg; rw[0x2c]= & usart->udr_reg; rw[0x2b]= & usart->ucsra_reg; rw[0x2a]= & usart->ucsrb_reg; rw[0x29]= & usart->ubrr_reg; rw[0x28]= & acomp->acsr_reg; rw[0x27]= & ad->admux_reg; rw[0x26]= & ad->adcsra_reg; rw[0x25]= & ad->adch_reg; rw[0x24]= & ad->adcl_reg; //rw[0x23] TWDR //rw[0x22] TWAR //rw[0x21] TWSR //rw[0x20] TWBR Reset(); }