void rtl8225_host_usb_init(struct net_device *dev)
{
#if 0
write_nic_byte(dev,RFPinsSelect+1,0);
write_nic_byte(dev,GPIO,0);
write_nic_byte_E(dev,0x53,read_nic_byte_E(dev,0x53) | (1<<7));
write_nic_byte(dev,RFPinsSelect+1,4);
write_nic_byte(dev,GPIO,0x20);
write_nic_byte(dev,GP_ENABLE,0);
/* Config BB & RF */
write_nic_word(dev, RFPinsOutput, 0x80);
write_nic_word(dev, RFPinsSelect, 0x80);
write_nic_word(dev, RFPinsEnable, 0x80);
mdelay(100);
mdelay(1000);
#endif
}
bool FirmwareEnableCPU(struct net_device *dev)
{
bool rtStatus = true;
u8 tmpU1b, CPUStatus = 0;
u16 tmpU2b;
u32 iCheckTime = 200;
/* Enable CPU. */
tmpU1b = read_nic_byte(dev, SYS_CLKR);
/* AFE source */
write_nic_byte(dev, SYS_CLKR, (tmpU1b|SYS_CPU_CLKSEL));
tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|FEN_CPUEN));
/* Poll IMEM Ready after CPU has refilled. */
do {
CPUStatus = read_nic_byte(dev, TCR);
if (CPUStatus & IMEM_RDY)
/* success */
break;
udelay(100);
} while (iCheckTime--);
if (!(CPUStatus & IMEM_RDY)) {
RT_TRACE(COMP_ERR, "%s(): failed to enable CPU", __func__);
rtStatus = false;
}
return rtStatus;
}
static void rtl8225_host_pci_init(struct net_device *dev)
{
write_nic_word(dev, RFPinsOutput, 0x480);
rtl8185_rf_pins_enable(dev);
write_nic_word(dev, RFPinsSelect, 0x88 | SW_CONTROL_GPIO);
write_nic_byte(dev, GP_ENABLE, 0);
force_pci_posting(dev);
mdelay(200);
/* bit 6 is for RF on/off detection */
write_nic_word(dev, GP_ENABLE, 0xff & (~(1 << 6)));
}
static void PlatformIOWrite2Byte(struct net_device *dev, u32 offset, u16 data)
{
write_nic_word(dev, offset, data);
/*
* To make sure write operation is completed,
* 2005.11.09, by rcnjko.
*/
read_nic_word(dev, offset);
}
void rtl8225_host_pci_init(struct net_device *dev)
{
write_nic_word(dev, RFPinsOutput, 0x480);
rtl8185_rf_pins_enable(dev);
//if(priv->card_8185 == 2 && priv->enable_gpio0 ) /* version D */
//write_nic_word(dev, RFPinsSelect, 0x88);
//else
write_nic_word(dev, RFPinsSelect, 0x88 | SW_CONTROL_GPIO); /* 0x488 | SW_CONTROL_GPIO */
write_nic_byte(dev, GP_ENABLE, 0);
force_pci_posting(dev);
mdelay(200);
write_nic_word(dev, GP_ENABLE, 0xff & (~(1<<6))); /* bit 6 is for RF on/off detection */
}
static void MlmeDisassociateRequest(struct r8192_priv *priv, u8 *asSta,
u8 asRsn)
{
u8 i;
RemovePeerTS(priv->ieee80211, asSta);
SendDisassociation( priv->ieee80211, asSta, asRsn );
if(memcpy(priv->ieee80211->current_network.bssid,asSta,6) == NULL)
{
//ShuChen TODO: change media status.
//ShuChen TODO: What to do when disassociate.
priv->ieee80211->state = IEEE80211_NOLINK;
for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x22;
priv->OpMode = RT_OP_MODE_NO_LINK;
{
RT_OP_MODE OpMode = priv->OpMode;
u8 btMsr = read_nic_byte(priv, MSR);
btMsr &= 0xfc;
switch(OpMode)
{
case RT_OP_MODE_INFRASTRUCTURE:
btMsr |= MSR_LINK_MANAGED;
break;
case RT_OP_MODE_IBSS:
btMsr |= MSR_LINK_ADHOC;
// led link set separate
break;
case RT_OP_MODE_AP:
btMsr |= MSR_LINK_MASTER;
break;
default:
btMsr |= MSR_LINK_NONE;
break;
}
write_nic_byte(priv, MSR, btMsr);
}
ieee80211_disassociate(priv->ieee80211);
write_nic_word(priv, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]);
write_nic_dword(priv, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]);
}
}
RT_STATUS
FirmwareEnableCPU(struct net_device *dev)
{
RT_STATUS rtStatus = RT_STATUS_SUCCESS;
u8 tmpU1b, CPUStatus = 0;
u16 tmpU2b;
u32 iCheckTime = 200;
RT_TRACE(COMP_FIRMWARE, "-->FirmwareEnableCPU()\n" );
// Enable CPU.
tmpU1b = read_nic_byte(dev, SYS_CLKR);
write_nic_byte(dev, SYS_CLKR, (tmpU1b|SYS_CPU_CLKSEL)); //AFE source
tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|FEN_CPUEN));
//Polling IMEM Ready after CPU has refilled.
do
{
CPUStatus = read_nic_byte(dev, TCR);
if(CPUStatus& IMEM_RDY)
{
RT_TRACE(COMP_FIRMWARE, "IMEM Ready after CPU has refilled.\n");
break;
}
//usleep(100);
udelay(100);
}while(iCheckTime--);
if(!(CPUStatus & IMEM_RDY))
return RT_STATUS_FAILURE;
RT_TRACE(COMP_FIRMWARE, "<--FirmwareEnableCPU(): rtStatus(%#x)\n", rtStatus);
return rtStatus;
}
bool
FirmwareEnableCPU(struct net_device *dev)
{
bool rtStatus = true;
u8 tmpU1b, CPUStatus = 0;
u16 tmpU2b;
u32 iCheckTime = 200;
RT_TRACE(COMP_FIRMWARE, "-->FirmwareEnableCPU()\n" );
fw_SetRQPN(dev);
tmpU1b = read_nic_byte(dev, SYS_CLKR);
write_nic_byte(dev, SYS_CLKR, (tmpU1b|SYS_CPU_CLKSEL));
tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|FEN_CPUEN));
do
{
CPUStatus = read_nic_byte(dev, TCR);
if(CPUStatus& IMEM_RDY)
{
RT_TRACE(COMP_FIRMWARE, "IMEM Ready after CPU has refilled.\n");
break;
}
udelay(100);
}while(iCheckTime--);
if(!(CPUStatus & IMEM_RDY))
return false;
RT_TRACE(COMP_FIRMWARE, "<--FirmwareEnableCPU(): rtStatus(%#x)\n", rtStatus);
return rtStatus;
}
void StaRateAdaptive87SE(struct net_device *dev)
{
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
unsigned long CurrTxokCnt;
u16 CurrRetryCnt;
u16 CurrRetryRate;
unsigned long CurrRxokCnt;
bool bTryUp = false;
bool bTryDown = false;
u8 TryUpTh = 1;
u8 TryDownTh = 2;
u32 TxThroughput;
long CurrSignalStrength;
bool bUpdateInitialGain = false;
u8 u1bOfdm = 0, u1bCck = 0;
char OfdmTxPwrIdx, CckTxPwrIdx;
priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
CurrRetryCnt = priv->CurrRetryCnt;
CurrTxokCnt = priv->NumTxOkTotal - priv->LastTxokCnt;
CurrRxokCnt = priv->ieee80211->NumRxOkTotal - priv->LastRxokCnt;
CurrSignalStrength = priv->Stats_RecvSignalPower;
TxThroughput = (u32)(priv->NumTxOkBytesTotal - priv->LastTxOKBytes);
priv->LastTxOKBytes = priv->NumTxOkBytesTotal;
priv->CurrentOperaRate = priv->ieee80211->rate / 5;
if (CurrTxokCnt > 0) {
CurrRetryRate = (u16)(CurrRetryCnt * 100 / CurrTxokCnt);
} else {
CurrRetryRate = (u16)(CurrRetryCnt * 100 / 1);
}
priv->LastRetryCnt = priv->CurrRetryCnt;
priv->LastTxokCnt = priv->NumTxOkTotal;
priv->LastRxokCnt = priv->ieee80211->NumRxOkTotal;
priv->CurrRetryCnt = 0;
if (CurrRetryRate == 0 && CurrTxokCnt == 0) {
priv->TryupingCountNoData++;
if (priv->TryupingCountNoData > 30) {
priv->TryupingCountNoData = 0;
priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
priv->LastFailTxRate = 0;
priv->LastFailTxRateSS = -200;
priv->FailTxRateCount = 0;
}
goto SetInitialGain;
} else {
priv->TryupingCountNoData = 0;
}
if (priv->CurrentOperaRate == 22 || priv->CurrentOperaRate == 72)
TryUpTh += 9;
if (MgntIsCckRate(priv->CurrentOperaRate) || priv->CurrentOperaRate == 36)
TryDownTh += 1;
if (priv->bTryuping == true) {
if ((CurrRetryRate > 25) && TxThroughput < priv->LastTxThroughput) {
bTryDown = true;
} else {
priv->bTryuping = false;
}
} else if (CurrSignalStrength > -47 && (CurrRetryRate < 50)) {
if (priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate) {
bTryUp = true;
priv->TryupingCount += TryUpTh;
}
} else if (CurrTxokCnt > 9 && CurrTxokCnt < 100 && CurrRetryRate >= 600) {
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
} else if (priv->CurrentOperaRate == 108) {
if ((CurrRetryRate > 26) && (priv->LastRetryRate > 25)) {
bTryDown = true;
}
else if ((CurrRetryRate > 17) && (priv->LastRetryRate > 16) && (CurrSignalStrength > -72)) {
bTryDown = true;
}
if (bTryDown && (CurrSignalStrength < -75))
priv->TryDownCountLowData += TryDownTh;
}
else if (priv->CurrentOperaRate == 96) {
if (((CurrRetryRate > 48) && (priv->LastRetryRate > 47))) {
bTryDown = true;
} else if (((CurrRetryRate > 21) && (priv->LastRetryRate > 20)) && (CurrSignalStrength > -74)) {
bTryDown = true;
} else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
} else if ((CurrRetryRate < 8) && (priv->LastRetryRate < 8)) {
bTryUp = true;
}
if (bTryDown && (CurrSignalStrength < -75)){
priv->TryDownCountLowData += TryDownTh;
}
} else if (priv->CurrentOperaRate == 72) {
if ((CurrRetryRate > 43) && (priv->LastRetryRate > 41)) {
bTryDown = true;
} else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
} else if ((CurrRetryRate < 15) && (priv->LastRetryRate < 16)) {
bTryUp = true;
}
if (bTryDown && (CurrSignalStrength < -80))
priv->TryDownCountLowData += TryDownTh;
} else if (priv->CurrentOperaRate == 48) {
if (((CurrRetryRate > 63) && (priv->LastRetryRate > 62))) {
bTryDown = true;
} else if (((CurrRetryRate > 33) && (priv->LastRetryRate > 32)) && (CurrSignalStrength > -82)) {
bTryDown = true;
} else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2 )) {
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
} else if ((CurrRetryRate < 20) && (priv->LastRetryRate < 21)) {
bTryUp = true;
}
if (bTryDown && (CurrSignalStrength < -82))
priv->TryDownCountLowData += TryDownTh;
} else if (priv->CurrentOperaRate == 36) {
if (((CurrRetryRate > 85) && (priv->LastRetryRate > 86))) {
bTryDown = true;
} else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
} else if ((CurrRetryRate < 22) && (priv->LastRetryRate < 23)) {
bTryUp = true;
}
} else if (priv->CurrentOperaRate == 22) {
if (CurrRetryRate > 95) {
bTryDown = true;
}
else if ((CurrRetryRate < 29) && (priv->LastRetryRate < 30)) {
bTryUp = true;
}
} else if (priv->CurrentOperaRate == 11) {
if (CurrRetryRate > 149) {
bTryDown = true;
} else if ((CurrRetryRate < 60) && (priv->LastRetryRate < 65)) {
bTryUp = true;
}
} else if (priv->CurrentOperaRate == 4) {
if ((CurrRetryRate > 99) && (priv->LastRetryRate > 99)) {
bTryDown = true;
} else if ((CurrRetryRate < 65) && (priv->LastRetryRate < 70)) {
bTryUp = true;
}
} else if (priv->CurrentOperaRate == 2) {
if ((CurrRetryRate < 70) && (priv->LastRetryRate < 75)) {
bTryUp = true;
}
}
if (bTryUp && bTryDown)
printk("StaRateAdaptive87B(): Tx Rate tried upping and downing simultaneously!\n");
if (!bTryUp && !bTryDown && (priv->TryupingCount == 0) && (priv->TryDownCountLowData == 0)
&& priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate && priv->FailTxRateCount < 2) {
if (jiffies % (CurrRetryRate + 101) == 0) {
bTryUp = true;
priv->bTryuping = true;
}
}
if (bTryUp) {
priv->TryupingCount++;
priv->TryDownCountLowData = 0;
if ((priv->TryupingCount > (TryUpTh + priv->FailTxRateCount * priv->FailTxRateCount)) ||
(CurrSignalStrength > priv->LastFailTxRateSS) || priv->bTryuping) {
priv->TryupingCount = 0;
if (priv->CurrentOperaRate == 22)
bUpdateInitialGain = true;
if (((priv->CurrentOperaRate == 72) || (priv->CurrentOperaRate == 48) || (priv->CurrentOperaRate == 36)) &&
(priv->FailTxRateCount > 2))
priv->RateAdaptivePeriod = (RATE_ADAPTIVE_TIMER_PERIOD / 2);
priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
if (priv->CurrentOperaRate == 36) {
priv->bUpdateARFR = true;
write_nic_word(dev, ARFR, 0x0F8F);
} else if(priv->bUpdateARFR) {
priv->bUpdateARFR = false;
write_nic_word(dev, ARFR, 0x0FFF);
}
if (priv->LastFailTxRate != priv->CurrentOperaRate) {
priv->LastFailTxRate = priv->CurrentOperaRate;
priv->FailTxRateCount = 0;
priv->LastFailTxRateSS = -200;
}
}
} else {
if (priv->TryupingCount > 0)
priv->TryupingCount --;
}
if (bTryDown) {
priv->TryDownCountLowData++;
priv->TryupingCount = 0;
if (priv->TryDownCountLowData > TryDownTh || priv->bTryuping) {
priv->TryDownCountLowData = 0;
priv->bTryuping = false;
if (priv->LastFailTxRate == priv->CurrentOperaRate) {
priv->FailTxRateCount++;
if (CurrSignalStrength > priv->LastFailTxRateSS)
priv->LastFailTxRateSS = CurrSignalStrength;
} else {
priv->LastFailTxRate = priv->CurrentOperaRate;
priv->FailTxRateCount = 1;
priv->LastFailTxRateSS = CurrSignalStrength;
}
priv->CurrentOperaRate = GetDegradeTxRate(dev, priv->CurrentOperaRate);
if ((CurrSignalStrength < -80) && (priv->CurrentOperaRate > 72 )) {
priv->CurrentOperaRate = 72;
}
if (priv->CurrentOperaRate == 36) {
priv->bUpdateARFR = true;
write_nic_word(dev, ARFR, 0x0F8F);
} else if (priv->bUpdateARFR) {
priv->bUpdateARFR = false;
write_nic_word(dev, ARFR, 0x0FFF);
}
if (MgntIsCckRate(priv->CurrentOperaRate)) {
bUpdateInitialGain = true;
}
}
} else {
if (priv->TryDownCountLowData > 0)
priv->TryDownCountLowData--;
}
if (priv->FailTxRateCount >= 0x15 ||
(!bTryUp && !bTryDown && priv->TryDownCountLowData == 0 && priv->TryupingCount && priv->FailTxRateCount > 0x6)) {
priv->FailTxRateCount--;
}
OfdmTxPwrIdx = priv->chtxpwr_ofdm[priv->ieee80211->current_network.channel];
CckTxPwrIdx = priv->chtxpwr[priv->ieee80211->current_network.channel];
if ((priv->CurrentOperaRate < 96) && (priv->CurrentOperaRate > 22)) {
u1bCck = read_nic_byte(dev, CCK_TXAGC);
u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
if (u1bCck == CckTxPwrIdx) {
if (u1bOfdm != (OfdmTxPwrIdx + 2)) {
priv->bEnhanceTxPwr = true;
u1bOfdm = ((u1bOfdm + 2) > 35) ? 35: (u1bOfdm + 2);
write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
}
} else if (u1bCck < CckTxPwrIdx) {
if (!priv->bEnhanceTxPwr) {
priv->bEnhanceTxPwr = true;
u1bOfdm = ((u1bOfdm + 2) > 35) ? 35: (u1bOfdm + 2);
write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
}
}
} else if (priv->bEnhanceTxPwr) {
u1bCck = read_nic_byte(dev, CCK_TXAGC);
u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
if (u1bCck == CckTxPwrIdx) {
priv->bEnhanceTxPwr = false;
write_nic_byte(dev, OFDM_TXAGC, OfdmTxPwrIdx);
}
else if (u1bCck < CckTxPwrIdx) {
priv->bEnhanceTxPwr = false;
u1bOfdm = ((u1bOfdm - 2) > 0) ? (u1bOfdm - 2): 0;
write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
}
}
SetInitialGain:
if (bUpdateInitialGain) {
if (MgntIsCckRate(priv->CurrentOperaRate)) {
if (priv->InitialGain > priv->RegBModeGainStage) {
priv->InitialGainBackUp = priv->InitialGain;
if (CurrSignalStrength < -85)
priv->InitialGain = priv->RegBModeGainStage;
else if (priv->InitialGain > priv->RegBModeGainStage + 1)
priv->InitialGain -= 2;
else
priv->InitialGain--;
printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n",priv->InitialGain, priv->CurrentOperaRate);
UpdateInitialGain(dev);
}
} else {
if (priv->InitialGain < 4) {
priv->InitialGainBackUp = priv->InitialGain;
priv->InitialGain++;
printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n",priv->InitialGain, priv->CurrentOperaRate);
UpdateInitialGain(dev);
}
}
}
priv->LastRetryRate = CurrRetryRate;
priv->LastTxThroughput = TxThroughput;
priv->ieee80211->rate = priv->CurrentOperaRate * 5;
}
static void StaRateAdaptive87SE(struct net_device *dev)
{
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
unsigned long CurrTxokCnt;
u16 CurrRetryCnt;
u16 CurrRetryRate;
unsigned long CurrRxokCnt;
bool bTryUp = false;
bool bTryDown = false;
u8 TryUpTh = 1;
u8 TryDownTh = 2;
u32 TxThroughput;
long CurrSignalStrength;
bool bUpdateInitialGain = false;
u8 u1bOfdm = 0, u1bCck = 0;
char OfdmTxPwrIdx, CckTxPwrIdx;
priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
CurrRetryCnt = priv->CurrRetryCnt;
CurrTxokCnt = priv->NumTxOkTotal - priv->LastTxokCnt;
CurrRxokCnt = priv->ieee80211->NumRxOkTotal - priv->LastRxokCnt;
CurrSignalStrength = priv->Stats_RecvSignalPower;
TxThroughput = (u32)(priv->NumTxOkBytesTotal - priv->LastTxOKBytes);
priv->LastTxOKBytes = priv->NumTxOkBytesTotal;
priv->CurrentOperaRate = priv->ieee80211->rate / 5;
/* 2 Compute retry ratio. */
if (CurrTxokCnt > 0) {
CurrRetryRate = (u16)(CurrRetryCnt * 100 / CurrTxokCnt);
} else {
/* It may be serious retry. To distinguish serious retry or no packets modified by Bruce */
CurrRetryRate = (u16)(CurrRetryCnt * 100 / 1);
}
priv->LastRetryCnt = priv->CurrRetryCnt;
priv->LastTxokCnt = priv->NumTxOkTotal;
priv->LastRxokCnt = priv->ieee80211->NumRxOkTotal;
priv->CurrRetryCnt = 0;
/* 2No Tx packets, return to init_rate or not? */
if (CurrRetryRate == 0 && CurrTxokCnt == 0) {
/*
* After 9 (30*300ms) seconds in this condition, we try to raise rate.
*/
priv->TryupingCountNoData++;
/* [TRC Dell Lab] Extend raised period from 4.5sec to 9sec, Isaiah 2008-02-15 18:00 */
if (priv->TryupingCountNoData > 30) {
priv->TryupingCountNoData = 0;
priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
/* Reset Fail Record */
priv->LastFailTxRate = 0;
priv->LastFailTxRateSS = -200;
priv->FailTxRateCount = 0;
}
goto SetInitialGain;
} else {
priv->TryupingCountNoData = 0; /*Reset trying up times. */
}
/*
* For Netgear case, I comment out the following signal strength estimation,
* which can results in lower rate to transmit when sample is NOT enough (e.g. PING request).
*
* Restructure rate adaptive as the following main stages:
* (1) Add retry threshold in 54M upgrading condition with signal strength.
* (2) Add the mechanism to degrade to CCK rate according to signal strength
* and retry rate.
* (3) Remove all Initial Gain Updates over OFDM rate. To avoid the complicated
* situation, Initial Gain Update is upon on DIG mechanism except CCK rate.
* (4) Add the mechanism of trying to upgrade tx rate.
* (5) Record the information of upping tx rate to avoid trying upping tx rate constantly.
*
*/
/*
* 11Mbps or 36Mbps
* Check more times in these rate(key rates).
*/
if (priv->CurrentOperaRate == 22 || priv->CurrentOperaRate == 72)
TryUpTh += 9;
/*
* Let these rates down more difficult.
*/
if (MgntIsCckRate(priv->CurrentOperaRate) || priv->CurrentOperaRate == 36)
TryDownTh += 1;
/* 1 Adjust Rate. */
if (priv->bTryuping == true) {
/* 2 For Test Upgrading mechanism
* Note:
* Sometimes the throughput is upon on the capability between the AP and NIC,
* thus the low data rate does not improve the performance.
* We randomly upgrade the data rate and check if the retry rate is improved.
*/
/* Upgrading rate did not improve the retry rate, fallback to the original rate. */
if ((CurrRetryRate > 25) && TxThroughput < priv->LastTxThroughput) {
/*Not necessary raising rate, fall back rate. */
bTryDown = true;
} else {
priv->bTryuping = false;
}
} else if (CurrSignalStrength > -47 && (CurrRetryRate < 50)) {
/*
* 2For High Power
*
* Return to highest data rate, if signal strength is good enough.
* SignalStrength threshold(-50dbm) is for RTL8186.
* Revise SignalStrength threshold to -51dbm.
*/
/* Also need to check retry rate for safety, by Bruce, 2007-06-05. */
if (priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate) {
bTryUp = true;
/* Upgrade Tx Rate directly. */
priv->TryupingCount += TryUpTh;
}
} else if (CurrTxokCnt > 9 && CurrTxokCnt < 100 && CurrRetryRate >= 600) {
/*
*2 For Serious Retry
*
* Traffic is not busy but our Tx retry is serious.
*/
bTryDown = true;
/* Let Rate Mechanism to degrade tx rate directly. */
priv->TryDownCountLowData += TryDownTh;
} else if (priv->CurrentOperaRate == 108) {
/* 2For 54Mbps */
/* Air Link */
if ((CurrRetryRate > 26) && (priv->LastRetryRate > 25)) {
bTryDown = true;
}
/* Cable Link */
else if ((CurrRetryRate > 17) && (priv->LastRetryRate > 16) && (CurrSignalStrength > -72)) {
bTryDown = true;
}
if (bTryDown && (CurrSignalStrength < -75)) /* cable link */
priv->TryDownCountLowData += TryDownTh;
} else if (priv->CurrentOperaRate == 96) {
/* 2For 48Mbps */
/* Air Link */
if (((CurrRetryRate > 48) && (priv->LastRetryRate > 47))) {
bTryDown = true;
} else if (((CurrRetryRate > 21) && (priv->LastRetryRate > 20)) && (CurrSignalStrength > -74)) { /* Cable Link */
/* Down to rate 36Mbps. */
bTryDown = true;
} else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
} else if ((CurrRetryRate < 8) && (priv->LastRetryRate < 8)) { /* TO DO: need to consider (RSSI) */
bTryUp = true;
}
if (bTryDown && (CurrSignalStrength < -75)) {
priv->TryDownCountLowData += TryDownTh;
}
} else if (priv->CurrentOperaRate == 72) {
/* 2For 36Mbps */
if ((CurrRetryRate > 43) && (priv->LastRetryRate > 41)) {
/* Down to rate 24Mbps. */
bTryDown = true;
} else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
} else if ((CurrRetryRate < 15) && (priv->LastRetryRate < 16)) { /* TO DO: need to consider (RSSI) */
bTryUp = true;
}
if (bTryDown && (CurrSignalStrength < -80))
priv->TryDownCountLowData += TryDownTh;
} else if (priv->CurrentOperaRate == 48) {
/* 2For 24Mbps */
/* Air Link */
if (((CurrRetryRate > 63) && (priv->LastRetryRate > 62))) {
bTryDown = true;
} else if (((CurrRetryRate > 33) && (priv->LastRetryRate > 32)) && (CurrSignalStrength > -82)) { /* Cable Link */
bTryDown = true;
} else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
} else if ((CurrRetryRate < 20) && (priv->LastRetryRate < 21)) { /* TO DO: need to consider (RSSI) */
bTryUp = true;
}
if (bTryDown && (CurrSignalStrength < -82))
priv->TryDownCountLowData += TryDownTh;
} else if (priv->CurrentOperaRate == 36) {
if (((CurrRetryRate > 85) && (priv->LastRetryRate > 86))) {
bTryDown = true;
} else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
} else if ((CurrRetryRate < 22) && (priv->LastRetryRate < 23)) { /* TO DO: need to consider (RSSI) */
bTryUp = true;
}
} else if (priv->CurrentOperaRate == 22) {
/* 2For 11Mbps */
if (CurrRetryRate > 95) {
bTryDown = true;
} else if ((CurrRetryRate < 29) && (priv->LastRetryRate < 30)) { /*TO DO: need to consider (RSSI) */
bTryUp = true;
}
} else if (priv->CurrentOperaRate == 11) {
/* 2For 5.5Mbps */
if (CurrRetryRate > 149) {
bTryDown = true;
} else if ((CurrRetryRate < 60) && (priv->LastRetryRate < 65)) {
bTryUp = true;
}
} else if (priv->CurrentOperaRate == 4) {
/* 2For 2 Mbps */
if ((CurrRetryRate > 99) && (priv->LastRetryRate > 99)) {
bTryDown = true;
} else if ((CurrRetryRate < 65) && (priv->LastRetryRate < 70)) {
bTryUp = true;
}
} else if (priv->CurrentOperaRate == 2) {
/* 2For 1 Mbps */
if ((CurrRetryRate < 70) && (priv->LastRetryRate < 75)) {
bTryUp = true;
}
}
if (bTryUp && bTryDown)
printk("StaRateAdaptive87B(): Tx Rate tried upping and downing simultaneously!\n");
/* 1 Test Upgrading Tx Rate
* Sometimes the cause of the low throughput (high retry rate) is the compatibility between the AP and NIC.
* To test if the upper rate may cause lower retry rate, this mechanism randomly occurs to test upgrading tx rate.
*/
if (!bTryUp && !bTryDown && (priv->TryupingCount == 0) && (priv->TryDownCountLowData == 0)
&& priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate && priv->FailTxRateCount < 2) {
if (jiffies % (CurrRetryRate + 101) == 0) {
bTryUp = true;
priv->bTryuping = true;
}
}
/* 1 Rate Mechanism */
if (bTryUp) {
priv->TryupingCount++;
priv->TryDownCountLowData = 0;
/*
* Check more times if we need to upgrade indeed.
* Because the largest value of pHalData->TryupingCount is 0xFFFF and
* the largest value of pHalData->FailTxRateCount is 0x14,
* this condition will be satisfied at most every 2 min.
*/
if ((priv->TryupingCount > (TryUpTh + priv->FailTxRateCount * priv->FailTxRateCount)) ||
(CurrSignalStrength > priv->LastFailTxRateSS) || priv->bTryuping) {
priv->TryupingCount = 0;
/*
* When transferring from CCK to OFDM, DIG is an important issue.
*/
if (priv->CurrentOperaRate == 22)
bUpdateInitialGain = true;
/*
* The difference in throughput between 48Mbps and 36Mbps is 8M.
* So, we must be careful in this rate scale. Isaiah 2008-02-15.
*/
if (((priv->CurrentOperaRate == 72) || (priv->CurrentOperaRate == 48) || (priv->CurrentOperaRate == 36)) &&
(priv->FailTxRateCount > 2))
priv->RateAdaptivePeriod = (RATE_ADAPTIVE_TIMER_PERIOD / 2);
/* (1)To avoid upgrade frequently to the fail tx rate, add the FailTxRateCount into the threshold. */
/* (2)If the signal strength is increased, it may be able to upgrade. */
priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
if (priv->CurrentOperaRate == 36) {
priv->bUpdateARFR = true;
write_nic_word(dev, ARFR, 0x0F8F); /* bypass 12/9/6 */
} else if (priv->bUpdateARFR) {
priv->bUpdateARFR = false;
write_nic_word(dev, ARFR, 0x0FFF); /* set 1M ~ 54Mbps. */
}
/* Update Fail Tx rate and count. */
if (priv->LastFailTxRate != priv->CurrentOperaRate) {
priv->LastFailTxRate = priv->CurrentOperaRate;
priv->FailTxRateCount = 0;
priv->LastFailTxRateSS = -200; /* Set lowest power. */
}
}
} else {
if (priv->TryupingCount > 0)
priv->TryupingCount--;
}
if (bTryDown) {
priv->TryDownCountLowData++;
priv->TryupingCount = 0;
/* Check if Tx rate can be degraded or Test trying upgrading should fallback. */
if (priv->TryDownCountLowData > TryDownTh || priv->bTryuping) {
priv->TryDownCountLowData = 0;
priv->bTryuping = false;
/* Update fail information. */
if (priv->LastFailTxRate == priv->CurrentOperaRate) {
priv->FailTxRateCount++;
/* Record the Tx fail rate signal strength. */
if (CurrSignalStrength > priv->LastFailTxRateSS)
priv->LastFailTxRateSS = CurrSignalStrength;
} else {
priv->LastFailTxRate = priv->CurrentOperaRate;
priv->FailTxRateCount = 1;
priv->LastFailTxRateSS = CurrSignalStrength;
}
priv->CurrentOperaRate = GetDegradeTxRate(dev, priv->CurrentOperaRate);
/* Reduce chariot training time at weak signal strength situation. SD3 ED demand. */
if ((CurrSignalStrength < -80) && (priv->CurrentOperaRate > 72)) {
priv->CurrentOperaRate = 72;
}
if (priv->CurrentOperaRate == 36) {
priv->bUpdateARFR = true;
write_nic_word(dev, ARFR, 0x0F8F); /* bypass 12/9/6 */
} else if (priv->bUpdateARFR) {
priv->bUpdateARFR = false;
write_nic_word(dev, ARFR, 0x0FFF); /* set 1M ~ 54Mbps. */
}
/*
* When it is CCK rate, it may need to update initial gain to receive lower power packets.
*/
if (MgntIsCckRate(priv->CurrentOperaRate)) {
bUpdateInitialGain = true;
}
}
} else {
if (priv->TryDownCountLowData > 0)
priv->TryDownCountLowData--;
}
/*
* Keep the Tx fail rate count to equal to 0x15 at most.
* Reduce the fail count at least to 10 sec if tx rate is tending stable.
*/
if (priv->FailTxRateCount >= 0x15 ||
(!bTryUp && !bTryDown && priv->TryDownCountLowData == 0 && priv->TryupingCount && priv->FailTxRateCount > 0x6)) {
priv->FailTxRateCount--;
}
OfdmTxPwrIdx = priv->chtxpwr_ofdm[priv->ieee80211->current_network.channel];
CckTxPwrIdx = priv->chtxpwr[priv->ieee80211->current_network.channel];
/* Mac0x9e increase 2 level in 36M~18M situation */
if ((priv->CurrentOperaRate < 96) && (priv->CurrentOperaRate > 22)) {
u1bCck = read_nic_byte(dev, CCK_TXAGC);
u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
/* case 1: Never enter High power */
if (u1bCck == CckTxPwrIdx) {
if (u1bOfdm != (OfdmTxPwrIdx + 2)) {
priv->bEnhanceTxPwr = true;
u1bOfdm = ((u1bOfdm + 2) > 35) ? 35 : (u1bOfdm + 2);
write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
}
} else if (u1bCck < CckTxPwrIdx) {
/* case 2: enter high power */
if (!priv->bEnhanceTxPwr) {
priv->bEnhanceTxPwr = true;
u1bOfdm = ((u1bOfdm + 2) > 35) ? 35 : (u1bOfdm + 2);
write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
}
}
} else if (priv->bEnhanceTxPwr) { /* 54/48/11/5.5/2/1 */
u1bCck = read_nic_byte(dev, CCK_TXAGC);
u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
/* case 1: Never enter High power */
if (u1bCck == CckTxPwrIdx) {
priv->bEnhanceTxPwr = false;
write_nic_byte(dev, OFDM_TXAGC, OfdmTxPwrIdx);
}
/* case 2: enter high power */
else if (u1bCck < CckTxPwrIdx) {
priv->bEnhanceTxPwr = false;
u1bOfdm = ((u1bOfdm - 2) > 0) ? (u1bOfdm - 2) : 0;
write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
}
}
/*
* We need update initial gain when we set tx rate "from OFDM to CCK" or
* "from CCK to OFDM".
*/
SetInitialGain:
if (bUpdateInitialGain) {
if (MgntIsCckRate(priv->CurrentOperaRate)) { /* CCK */
if (priv->InitialGain > priv->RegBModeGainStage) {
priv->InitialGainBackUp = priv->InitialGain;
if (CurrSignalStrength < -85) /* Low power, OFDM [0x17] = 26. */
/* SD3 SYs suggest that CurrSignalStrength < -65, ofdm 0x17=26. */
priv->InitialGain = priv->RegBModeGainStage;
else if (priv->InitialGain > priv->RegBModeGainStage + 1)
priv->InitialGain -= 2;
else
priv->InitialGain--;
printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n", priv->InitialGain, priv->CurrentOperaRate);
UpdateInitialGain(dev);
}
} else { /* OFDM */
if (priv->InitialGain < 4) {
priv->InitialGainBackUp = priv->InitialGain;
priv->InitialGain++;
printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n", priv->InitialGain, priv->CurrentOperaRate);
UpdateInitialGain(dev);
}
}
}
/* Record the related info */
priv->LastRetryRate = CurrRetryRate;
priv->LastTxThroughput = TxThroughput;
priv->ieee80211->rate = priv->CurrentOperaRate * 5;
}
void
StaRateAdaptive87SE(
struct net_device *dev
)
{
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
unsigned long CurrTxokCnt;
u16 CurrRetryCnt;
u16 CurrRetryRate;
//u16 i,idx;
unsigned long CurrRxokCnt;
bool bTryUp = false;
bool bTryDown = false;
u8 TryUpTh = 1;
u8 TryDownTh = 2;
u32 TxThroughput;
long CurrSignalStrength;
bool bUpdateInitialGain = false;
u8 u1bOfdm=0, u1bCck = 0;
char OfdmTxPwrIdx, CckTxPwrIdx;
priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
CurrRetryCnt = priv->CurrRetryCnt;
CurrTxokCnt = priv->NumTxOkTotal - priv->LastTxokCnt;
CurrRxokCnt = priv->ieee80211->NumRxOkTotal - priv->LastRxokCnt;
CurrSignalStrength = priv->Stats_RecvSignalPower;
TxThroughput = (u32)(priv->NumTxOkBytesTotal - priv->LastTxOKBytes);
priv->LastTxOKBytes = priv->NumTxOkBytesTotal;
priv->CurrentOperaRate = priv->ieee80211->rate/5;
//printk("priv->CurrentOperaRate is %d\n",priv->CurrentOperaRate);
//2 Compute retry ratio.
if (CurrTxokCnt>0)
{
CurrRetryRate = (u16)(CurrRetryCnt*100/CurrTxokCnt);
}
else
{ // It may be serious retry. To distinguish serious retry or no packets modified by Bruce
CurrRetryRate = (u16)(CurrRetryCnt*100/1);
}
//
// Added by Roger, 2007.01.02.
// For debug information.
//
//printk("\n(1) pHalData->LastRetryRate: %d \n",priv->LastRetryRate);
//printk("(2) RetryCnt = %d \n", CurrRetryCnt);
//printk("(3) TxokCnt = %d \n", CurrTxokCnt);
//printk("(4) CurrRetryRate = %d \n", CurrRetryRate);
//printk("(5) CurrSignalStrength = %d \n",CurrSignalStrength);
//printk("(6) TxThroughput is %d\n",TxThroughput);
//printk("priv->NumTxOkBytesTotal is %d\n",priv->NumTxOkBytesTotal);
priv->LastRetryCnt = priv->CurrRetryCnt;
priv->LastTxokCnt = priv->NumTxOkTotal;
priv->LastRxokCnt = priv->ieee80211->NumRxOkTotal;
priv->CurrRetryCnt = 0;
//2No Tx packets, return to init_rate or not?
if (CurrRetryRate==0 && CurrTxokCnt == 0)
{
//
//After 9 (30*300ms) seconds in this condition, we try to raise rate.
//
priv->TryupingCountNoData++;
// printk("No Tx packets, TryupingCountNoData(%d)\n", priv->TryupingCountNoData);
//[TRC Dell Lab] Extend raised period from 4.5sec to 9sec, Isaiah 2008-02-15 18:00
if (priv->TryupingCountNoData>30)
{
priv->TryupingCountNoData = 0;
priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
// Reset Fail Record
priv->LastFailTxRate = 0;
priv->LastFailTxRateSS = -200;
priv->FailTxRateCount = 0;
}
goto SetInitialGain;
}
else
{
priv->TryupingCountNoData=0; //Reset trying up times.
}
//
// For Netgear case, I comment out the following signal strength estimation,
// which can results in lower rate to transmit when sample is NOT enough (e.g. PING request).
// 2007.04.09, by Roger.
//
//
// Restructure rate adaptive as the following main stages:
// (1) Add retry threshold in 54M upgrading condition with signal strength.
// (2) Add the mechanism to degrade to CCK rate according to signal strength
// and retry rate.
// (3) Remove all Initial Gain Updates over OFDM rate. To avoid the complicated
// situation, Initial Gain Update is upon on DIG mechanism except CCK rate.
// (4) Add the mehanism of trying to upgrade tx rate.
// (5) Record the information of upping tx rate to avoid trying upping tx rate constantly.
// By Bruce, 2007-06-05.
//
//
// 11Mbps or 36Mbps
// Check more times in these rate(key rates).
//
if(priv->CurrentOperaRate == 22 || priv->CurrentOperaRate == 72)
{
TryUpTh += 9;
}
//
// Let these rates down more difficult.
//
if(MgntIsCckRate(priv->CurrentOperaRate) || priv->CurrentOperaRate == 36)
{
TryDownTh += 1;
}
//1 Adjust Rate.
if (priv->bTryuping == true)
{
//2 For Test Upgrading mechanism
// Note:
// Sometimes the throughput is upon on the capability bwtween the AP and NIC,
// thus the low data rate does not improve the performance.
// We randomly upgrade the data rate and check if the retry rate is improved.
// Upgrading rate did not improve the retry rate, fallback to the original rate.
if ( (CurrRetryRate > 25) && TxThroughput < priv->LastTxThroughput)
{
//Not necessary raising rate, fall back rate.
bTryDown = true;
//printk("case1-1: Not necessary raising rate, fall back rate....\n");
//printk("case1-1: pMgntInfo->CurrentOperaRate =%d, TxThroughput = %d, LastThroughput = %d\n",
// priv->CurrentOperaRate, TxThroughput, priv->LastTxThroughput);
}
else
{
priv->bTryuping = false;
}
}
else if (CurrSignalStrength > -47 && (CurrRetryRate < 50))
{
//2For High Power
//
// Added by Roger, 2007.04.09.
// Return to highest data rate, if signal strength is good enough.
// SignalStrength threshold(-50dbm) is for RTL8186.
// Revise SignalStrength threshold to -51dbm.
//
// Also need to check retry rate for safety, by Bruce, 2007-06-05.
if(priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate )
{
bTryUp = true;
// Upgrade Tx Rate directly.
priv->TryupingCount += TryUpTh;
}
// printk("case2: StaRateAdaptive87SE: Power(%d) is high enough!!. \n", CurrSignalStrength);
}
else if(CurrTxokCnt > 9 && CurrTxokCnt< 100 && CurrRetryRate >= 600)
{
//2 For Serious Retry
//
// Traffic is not busy but our Tx retry is serious.
//
bTryDown = true;
// Let Rate Mechanism to degrade tx rate directly.
priv->TryDownCountLowData += TryDownTh;
// printk("case3: RA: Tx Retry is serious. Degrade Tx Rate to %d directly...\n", priv->CurrentOperaRate);
}
else if ( priv->CurrentOperaRate == 108 )
{
//2For 54Mbps
// Air Link
if ( (CurrRetryRate>26)&&(priv->LastRetryRate>25))
// if ( (CurrRetryRate>40)&&(priv->LastRetryRate>39))
{
//Down to rate 48Mbps.
bTryDown = true;
}
// Cable Link
else if ( (CurrRetryRate>17)&&(priv->LastRetryRate>16) && (CurrSignalStrength > -72))
// else if ( (CurrRetryRate>17)&&(priv->LastRetryRate>16) && (CurrSignalStrength > -72))
{
//Down to rate 48Mbps.
bTryDown = true;
}
if(bTryDown && (CurrSignalStrength < -75)) //cable link
{
priv->TryDownCountLowData += TryDownTh;
}
//printk("case4---54M \n");
}
else if ( priv->CurrentOperaRate == 96 )
{
//2For 48Mbps
//Air Link
if ( ((CurrRetryRate>48) && (priv->LastRetryRate>47)))
// if ( ((CurrRetryRate>65) && (priv->LastRetryRate>64)))
{
//Down to rate 36Mbps.
bTryDown = true;
}
//Cable Link
else if ( ((CurrRetryRate>21) && (priv->LastRetryRate>20)) && (CurrSignalStrength > -74))
{
//Down to rate 36Mbps.
bTryDown = true;
}
else if((CurrRetryRate> (priv->LastRetryRate + 50 )) && (priv->FailTxRateCount >2 ))
// else if((CurrRetryRate> (priv->LastRetryRate + 70 )) && (priv->FailTxRateCount >2 ))
{
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
}
else if ( (CurrRetryRate<8) && (priv->LastRetryRate<8) ) //TO DO: need to consider (RSSI)
// else if ( (CurrRetryRate<28) && (priv->LastRetryRate<8) )
{
bTryUp = true;
}
if(bTryDown && (CurrSignalStrength < -75))
{
priv->TryDownCountLowData += TryDownTh;
}
//printk("case5---48M \n");
}
else if ( priv->CurrentOperaRate == 72 )
{
//2For 36Mbps
if ( (CurrRetryRate>43) && (priv->LastRetryRate>41))
// if ( (CurrRetryRate>60) && (priv->LastRetryRate>59))
{
//Down to rate 24Mbps.
bTryDown = true;
}
else if((CurrRetryRate> (priv->LastRetryRate + 50 )) && (priv->FailTxRateCount >2 ))
// else if((CurrRetryRate> (priv->LastRetryRate + 70 )) && (priv->FailTxRateCount >2 ))
{
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
}
else if ( (CurrRetryRate<15) && (priv->LastRetryRate<16)) //TO DO: need to consider (RSSI)
// else if ( (CurrRetryRate<35) && (priv->LastRetryRate<36))
{
bTryUp = true;
}
if(bTryDown && (CurrSignalStrength < -80))
{
priv->TryDownCountLowData += TryDownTh;
}
//printk("case6---36M \n");
}
else if ( priv->CurrentOperaRate == 48 )
{
//2For 24Mbps
// Air Link
if ( ((CurrRetryRate>63) && (priv->LastRetryRate>62)))
// if ( ((CurrRetryRate>83) && (priv->LastRetryRate>82)))
{
//Down to rate 18Mbps.
bTryDown = true;
}
//Cable Link
else if ( ((CurrRetryRate>33) && (priv->LastRetryRate>32)) && (CurrSignalStrength > -82) )
// else if ( ((CurrRetryRate>50) && (priv->LastRetryRate>49)) && (CurrSignalStrength > -82) )
{
//Down to rate 18Mbps.
bTryDown = true;
}
else if((CurrRetryRate> (priv->LastRetryRate + 50 )) && (priv->FailTxRateCount >2 ))
// else if((CurrRetryRate> (priv->LastRetryRate + 70 )) && (priv->FailTxRateCount >2 ))
{
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
}
else if ( (CurrRetryRate<20) && (priv->LastRetryRate<21)) //TO DO: need to consider (RSSI)
// else if ( (CurrRetryRate<40) && (priv->LastRetryRate<41))
{
bTryUp = true;
}
if(bTryDown && (CurrSignalStrength < -82))
{
priv->TryDownCountLowData += TryDownTh;
}
//printk("case7---24M \n");
}
else if ( priv->CurrentOperaRate == 36 )
{
//2For 18Mbps
// original (109, 109)
//[TRC Dell Lab] (90, 91), Isaiah 2008-02-18 23:24
// (85, 86), Isaiah 2008-02-18 24:00
if ( ((CurrRetryRate>85) && (priv->LastRetryRate>86)))
// if ( ((CurrRetryRate>115) && (priv->LastRetryRate>116)))
{
//Down to rate 11Mbps.
bTryDown = true;
}
//[TRC Dell Lab] Isaiah 2008-02-18 23:24
else if((CurrRetryRate> (priv->LastRetryRate + 50 )) && (priv->FailTxRateCount >2 ))
// else if((CurrRetryRate> (priv->LastRetryRate + 70 )) && (priv->FailTxRateCount >2 ))
{
bTryDown = true;
priv->TryDownCountLowData += TryDownTh;
}
else if ( (CurrRetryRate<22) && (priv->LastRetryRate<23)) //TO DO: need to consider (RSSI)
// else if ( (CurrRetryRate<42) && (priv->LastRetryRate<43))
{
bTryUp = true;
}
//printk("case8---18M \n");
}
else if ( priv->CurrentOperaRate == 22 )
{
//2For 11Mbps
if (CurrRetryRate>95)
// if (CurrRetryRate>155)
{
bTryDown = true;
}
else if ( (CurrRetryRate<29) && (priv->LastRetryRate <30) )//TO DO: need to consider (RSSI)
// else if ( (CurrRetryRate<49) && (priv->LastRetryRate <50) )
{
bTryUp = true;
}
//printk("case9---11M \n");
}
else if ( priv->CurrentOperaRate == 11 )
{
//2For 5.5Mbps
if (CurrRetryRate>149)
// if (CurrRetryRate>189)
{
bTryDown = true;
}
else if ( (CurrRetryRate<60) && (priv->LastRetryRate < 65))
// else if ( (CurrRetryRate<80) && (priv->LastRetryRate < 85))
{
bTryUp = true;
}
//printk("case10---5.5M \n");
}
else if ( priv->CurrentOperaRate == 4 )
{
//2For 2 Mbps
if((CurrRetryRate>99) && (priv->LastRetryRate>99))
// if((CurrRetryRate>199) && (priv->LastRetryRate>199))
{
bTryDown = true;
}
else if ( (CurrRetryRate < 65) && (priv->LastRetryRate < 70))
// else if ( (CurrRetryRate < 85) && (priv->LastRetryRate < 90))
{
bTryUp = true;
}
//printk("case11---2M \n");
}
else if ( priv->CurrentOperaRate == 2 )
{
//2For 1 Mbps
if( (CurrRetryRate<70) && (priv->LastRetryRate<75))
// if( (CurrRetryRate<90) && (priv->LastRetryRate<95))
{
bTryUp = true;
}
//printk("case12---1M \n");
}
if(bTryUp && bTryDown)
printk("StaRateAdaptive87B(): Tx Rate tried upping and downing simultaneously!\n");
//1 Test Upgrading Tx Rate
// Sometimes the cause of the low throughput (high retry rate) is the compatibility between the AP and NIC.
// To test if the upper rate may cause lower retry rate, this mechanism randomly occurs to test upgrading tx rate.
if(!bTryUp && !bTryDown && (priv->TryupingCount == 0) && (priv->TryDownCountLowData == 0)
&& priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate && priv->FailTxRateCount < 2)
{
if(jiffies% (CurrRetryRate + 101) == 0)
{
bTryUp = true;
priv->bTryuping = true;
//printk("StaRateAdaptive87SE(): Randomly try upgrading...\n");
}
}
//1 Rate Mechanism
if(bTryUp)
{
priv->TryupingCount++;
priv->TryDownCountLowData = 0;
{
// printk("UP: pHalData->TryupingCount = %d\n", priv->TryupingCount);
// printk("UP: TryUpTh(%d)+ (FailTxRateCount(%d))^2 =%d\n",
// TryUpTh, priv->FailTxRateCount, (TryUpTh + priv->FailTxRateCount * priv->FailTxRateCount) );
// printk("UP: pHalData->bTryuping=%d\n", priv->bTryuping);
}
//
// Check more times if we need to upgrade indeed.
// Because the largest value of pHalData->TryupingCount is 0xFFFF and
// the largest value of pHalData->FailTxRateCount is 0x14,
// this condition will be satisfied at most every 2 min.
//
if((priv->TryupingCount > (TryUpTh + priv->FailTxRateCount * priv->FailTxRateCount)) ||
(CurrSignalStrength > priv->LastFailTxRateSS) || priv->bTryuping)
{
priv->TryupingCount = 0;
//
// When transferring from CCK to OFDM, DIG is an important issue.
//
if(priv->CurrentOperaRate == 22)
bUpdateInitialGain = true;
// The difference in throughput between 48Mbps and 36Mbps is 8M.
// So, we must be carefully in this rate scale. Isaiah 2008-02-15.
//
if( ((priv->CurrentOperaRate == 72) || (priv->CurrentOperaRate == 48) || (priv->CurrentOperaRate == 36)) &&
(priv->FailTxRateCount > 2) )
priv->RateAdaptivePeriod= (RATE_ADAPTIVE_TIMER_PERIOD/2);
// (1)To avoid upgrade frequently to the fail tx rate, add the FailTxRateCount into the threshold.
// (2)If the signal strength is increased, it may be able to upgrade.
priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
// printk("StaRateAdaptive87SE(): Upgrade Tx Rate to %d\n", priv->CurrentOperaRate);
//[TRC Dell Lab] Bypass 12/9/6, Isaiah 2008-02-18 20:00
if(priv->CurrentOperaRate ==36)
{
priv->bUpdateARFR=true;
write_nic_word(dev, ARFR, 0x0F8F); //bypass 12/9/6
// printk("UP: ARFR=0xF8F\n");
}
else if(priv->bUpdateARFR)
{
priv->bUpdateARFR=false;
write_nic_word(dev, ARFR, 0x0FFF); //set 1M ~ 54Mbps.
// printk("UP: ARFR=0xFFF\n");
}
// Update Fail Tx rate and count.
if(priv->LastFailTxRate != priv->CurrentOperaRate)
{
priv->LastFailTxRate = priv->CurrentOperaRate;
priv->FailTxRateCount = 0;
priv->LastFailTxRateSS = -200; // Set lowest power.
}
}
}
else
{
if(priv->TryupingCount > 0)
priv->TryupingCount --;
}
if(bTryDown)
{
priv->TryDownCountLowData++;
priv->TryupingCount = 0;
{
// printk("DN: pHalData->TryDownCountLowData = %d\n",priv->TryDownCountLowData);
// printk("DN: TryDownTh =%d\n", TryDownTh);
// printk("DN: pHalData->bTryuping=%d\n", priv->bTryuping);
}
//Check if Tx rate can be degraded or Test trying upgrading should fallback.
if(priv->TryDownCountLowData > TryDownTh || priv->bTryuping)
{
priv->TryDownCountLowData = 0;
priv->bTryuping = false;
// Update fail information.
if(priv->LastFailTxRate == priv->CurrentOperaRate)
{
priv->FailTxRateCount ++;
// Record the Tx fail rate signal strength.
if(CurrSignalStrength > priv->LastFailTxRateSS)
{
priv->LastFailTxRateSS = CurrSignalStrength;
}
}
else
{
priv->LastFailTxRate = priv->CurrentOperaRate;
priv->FailTxRateCount = 1;
priv->LastFailTxRateSS = CurrSignalStrength;
}
priv->CurrentOperaRate = GetDegradeTxRate(dev, priv->CurrentOperaRate);
// Reduce chariot training time at weak signal strength situation. SD3 ED demand.
//[TRC Dell Lab] Revise Signal Threshold from -75 to -80 , Isaiah 2008-02-18 20:00
if( (CurrSignalStrength < -80) && (priv->CurrentOperaRate > 72 ))
{
priv->CurrentOperaRate = 72;
// printk("DN: weak signal strength (%d), degrade to 36Mbps\n", CurrSignalStrength);
}
//[TRC Dell Lab] Bypass 12/9/6, Isaiah 2008-02-18 20:00
if(priv->CurrentOperaRate ==36)
{
priv->bUpdateARFR=true;
write_nic_word(dev, ARFR, 0x0F8F); //bypass 12/9/6
// printk("DN: ARFR=0xF8F\n");
}
else if(priv->bUpdateARFR)
{
priv->bUpdateARFR=false;
write_nic_word(dev, ARFR, 0x0FFF); //set 1M ~ 54Mbps.
// printk("DN: ARFR=0xFFF\n");
}
//
// When it is CCK rate, it may need to update initial gain to receive lower power packets.
//
if(MgntIsCckRate(priv->CurrentOperaRate))
{
bUpdateInitialGain = true;
}
// printk("StaRateAdaptive87SE(): Degrade Tx Rate to %d\n", priv->CurrentOperaRate);
}
}
else
{
if(priv->TryDownCountLowData > 0)
priv->TryDownCountLowData --;
}
// Keep the Tx fail rate count to equal to 0x15 at most.
// Reduce the fail count at least to 10 sec if tx rate is tending stable.
if(priv->FailTxRateCount >= 0x15 ||
(!bTryUp && !bTryDown && priv->TryDownCountLowData == 0 && priv->TryupingCount && priv->FailTxRateCount > 0x6))
{
priv->FailTxRateCount --;
}
OfdmTxPwrIdx = priv->chtxpwr_ofdm[priv->ieee80211->current_network.channel];
CckTxPwrIdx = priv->chtxpwr[priv->ieee80211->current_network.channel];
//[TRC Dell Lab] Mac0x9e increase 2 level in 36M~18M situation, Isaiah 2008-02-18 24:00
if((priv->CurrentOperaRate < 96) &&(priv->CurrentOperaRate > 22))
{
u1bCck = read_nic_byte(dev, CCK_TXAGC);
u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
// case 1: Never enter High power
if(u1bCck == CckTxPwrIdx )
{
if(u1bOfdm != (OfdmTxPwrIdx+2) )
{
priv->bEnhanceTxPwr= true;
u1bOfdm = ((u1bOfdm+2) > 35) ? 35: (u1bOfdm+2);
write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
// printk("Enhance OFDM_TXAGC : +++++ u1bOfdm= 0x%x\n", u1bOfdm);
}
}
// case 2: enter high power
else if(u1bCck < CckTxPwrIdx)
{
if(!priv->bEnhanceTxPwr)
{
priv->bEnhanceTxPwr= true;
u1bOfdm = ((u1bOfdm+2) > 35) ? 35: (u1bOfdm+2);
write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
//RT_TRACE(COMP_RATE, DBG_TRACE, ("Enhance OFDM_TXAGC(2) : +++++ u1bOfdm= 0x%x\n", u1bOfdm));
}
}
}
else if(priv->bEnhanceTxPwr) //54/48/11/5.5/2/1
{
u1bCck = read_nic_byte(dev, CCK_TXAGC);
u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
// case 1: Never enter High power
if(u1bCck == CckTxPwrIdx )
{
priv->bEnhanceTxPwr= false;
write_nic_byte(dev, OFDM_TXAGC, OfdmTxPwrIdx);
//printk("Recover OFDM_TXAGC : ===== u1bOfdm= 0x%x\n", OfdmTxPwrIdx);
}
// case 2: enter high power
else if(u1bCck < CckTxPwrIdx)
{
priv->bEnhanceTxPwr= false;
u1bOfdm = ((u1bOfdm-2) > 0) ? (u1bOfdm-2): 0;
write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
//RT_TRACE(COMP_RATE, DBG_TRACE, ("Recover OFDM_TXAGC(2): ===== u1bOfdm= 0x%x\n", u1bOfdm));
}
}
//
// We need update initial gain when we set tx rate "from OFDM to CCK" or
// "from CCK to OFDM".
//
SetInitialGain:
if(bUpdateInitialGain)
{
if(MgntIsCckRate(priv->CurrentOperaRate)) // CCK
{
if(priv->InitialGain > priv->RegBModeGainStage)
{
priv->InitialGainBackUp= priv->InitialGain;
if(CurrSignalStrength < -85) // Low power, OFDM [0x17] = 26.
{
//SD3 SYs suggest that CurrSignalStrength < -65, ofdm 0x17=26.
priv->InitialGain = priv->RegBModeGainStage;
}
else if(priv->InitialGain > priv->RegBModeGainStage + 1)
{
priv->InitialGain -= 2;
}
else
{
priv->InitialGain --;
}
printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n",priv->InitialGain, priv->CurrentOperaRate);
UpdateInitialGain(dev);
}
}
else // OFDM
{
if(priv->InitialGain < 4)
{
priv->InitialGainBackUp= priv->InitialGain;
priv->InitialGain ++;
printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n",priv->InitialGain, priv->CurrentOperaRate);
UpdateInitialGain(dev);
}
}
}
//Record the related info
priv->LastRetryRate = CurrRetryRate;
priv->LastTxThroughput = TxThroughput;
priv->ieee80211->rate = priv->CurrentOperaRate * 5;
}
bool SetZebraRFPowerState8185(struct net_device *dev,
RT_RF_POWER_STATE eRFPowerState)
{
struct r8180_priv *priv = ieee80211_priv(dev);
u8 btCR9346, btConfig3;
bool bActionAllowed = true, bTurnOffBB = true;
u8 u1bTmp;
int i;
bool bResult = true;
u8 QueueID;
if (priv->SetRFPowerStateInProgress == true)
return false;
priv->SetRFPowerStateInProgress = true;
btCR9346 = read_nic_byte(dev, CR9346);
write_nic_byte(dev, CR9346, (btCR9346 | 0xC0));
btConfig3 = read_nic_byte(dev, CONFIG3);
write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En));
switch (eRFPowerState) {
case eRfOn:
write_nic_word(dev, 0x37C, 0x00EC);
/* turn on AFE */
write_nic_byte(dev, 0x54, 0x00);
write_nic_byte(dev, 0x62, 0x00);
/* turn on RF */
RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
/* turn on RF again */
RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
/* turn on BB */
write_phy_ofdm(dev, 0x10, 0x40);
write_phy_ofdm(dev, 0x12, 0x40);
/* Avoid power down at init time. */
write_nic_byte(dev, CONFIG4, priv->RFProgType);
u1bTmp = read_nic_byte(dev, 0x24E);
write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6))));
break;
case eRfSleep:
for (QueueID = 0, i = 0; QueueID < 6;) {
if (get_curr_tx_free_desc(dev, QueueID) ==
priv->txringcount) {
QueueID++;
continue;
} else {
priv->TxPollingTimes++;
if (priv->TxPollingTimes >=
LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
bActionAllowed = false;
break;
} else
udelay(10);
}
}
if (bActionAllowed) {
/* turn off BB RXIQ matrix to cut off rx signal */
write_phy_ofdm(dev, 0x10, 0x00);
write_phy_ofdm(dev, 0x12, 0x00);
/* turn off RF */
RF_WriteReg(dev, 0x4, 0x0000);
RF_WriteReg(dev, 0x0, 0x0000);
/* turn off AFE except PLL */
write_nic_byte(dev, 0x62, 0xff);
write_nic_byte(dev, 0x54, 0xec);
mdelay(1);
{
int i = 0;
while (true) {
u8 tmp24F = read_nic_byte(dev, 0x24f);
if ((tmp24F == 0x01) ||
(tmp24F == 0x09)) {
bTurnOffBB = true;
break;
} else {
udelay(10);
i++;
priv->TxPollingTimes++;
if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
bTurnOffBB = false;
break;
} else
udelay(10);
}
}
}
if (bTurnOffBB) {
/* turn off BB */
u1bTmp = read_nic_byte(dev, 0x24E);
write_nic_byte(dev, 0x24E,
(u1bTmp | BIT5 | BIT6));
/* turn off AFE PLL */
write_nic_byte(dev, 0x54, 0xFC);
write_nic_word(dev, 0x37C, 0x00FC);
}
}
break;
case eRfOff:
for (QueueID = 0, i = 0; QueueID < 6;) {
if (get_curr_tx_free_desc(dev, QueueID) ==
priv->txringcount) {
QueueID++;
continue;
} else {
udelay(10);
i++;
}
if (i >= MAX_DOZE_WAITING_TIMES_85B)
break;
}
/* turn off BB RXIQ matrix to cut off rx signal */
write_phy_ofdm(dev, 0x10, 0x00);
write_phy_ofdm(dev, 0x12, 0x00);
/* turn off RF */
RF_WriteReg(dev, 0x4, 0x0000);
RF_WriteReg(dev, 0x0, 0x0000);
/* turn off AFE except PLL */
write_nic_byte(dev, 0x62, 0xff);
write_nic_byte(dev, 0x54, 0xec);
mdelay(1);
{
int i = 0;
while (true) {
u8 tmp24F = read_nic_byte(dev, 0x24f);
if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
bTurnOffBB = true;
break;
} else {
bTurnOffBB = false;
udelay(10);
i++;
}
if (i > MAX_POLLING_24F_TIMES_87SE)
break;
}
}
if (bTurnOffBB) {
/* turn off BB */
u1bTmp = read_nic_byte(dev, 0x24E);
write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
/* turn off AFE PLL (80M) */
write_nic_byte(dev, 0x54, 0xFC);
write_nic_word(dev, 0x37C, 0x00FC);
}
break;
}
btConfig3 &= ~(CONFIG3_PARM_En);
write_nic_byte(dev, CONFIG3, btConfig3);
btCR9346 &= ~(0xC0);
write_nic_byte(dev, CR9346, btCR9346);
if (bResult && bActionAllowed)
priv->eRFPowerState = eRFPowerState;
priv->SetRFPowerStateInProgress = false;
return bResult && bActionAllowed;
}
static void
MgntDisconnectIBSS(
struct net_device* dev
)
{
struct r8192_priv *priv = ieee80211_priv(dev);
//RT_OP_MODE OpMode;
u8 i;
bool bFilterOutNonAssociatedBSSID = false;
//IEEE80211_DEBUG(IEEE80211_DL_TRACE, "XXXXXXXXXX MgntDisconnect IBSS\n");
priv->ieee80211->state = IEEE80211_NOLINK;
// PlatformZeroMemory( pMgntInfo->Bssid, 6 );
for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i]= 0x55;
priv->OpMode = RT_OP_MODE_NO_LINK;
write_nic_word(dev, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]);
write_nic_dword(dev, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]);
{
RT_OP_MODE OpMode = priv->OpMode;
//LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
u8 btMsr = read_nic_byte(dev, MSR);
btMsr &= 0xfc;
switch(OpMode)
{
case RT_OP_MODE_INFRASTRUCTURE:
btMsr |= MSR_LINK_MANAGED;
//LedAction = LED_CTL_LINK;
break;
case RT_OP_MODE_IBSS:
btMsr |= MSR_LINK_ADHOC;
// led link set seperate
break;
case RT_OP_MODE_AP:
btMsr |= MSR_LINK_MASTER;
//LedAction = LED_CTL_LINK;
break;
default:
btMsr |= MSR_LINK_NONE;
break;
}
write_nic_byte(dev, MSR, btMsr);
// LED control
//Adapter->HalFunc.LedControlHandler(Adapter, LedAction);
}
ieee80211_stop_send_beacons(priv->ieee80211);
// If disconnect, clear RCR CBSSID bit
bFilterOutNonAssociatedBSSID = false;
{
u32 RegRCR, Type;
Type = bFilterOutNonAssociatedBSSID;
RegRCR = read_nic_dword(dev,RCR);
priv->ReceiveConfig = RegRCR;
if (Type == true)
RegRCR |= (RCR_CBSSID);
else if (Type == false)
RegRCR &= (~RCR_CBSSID);
{
write_nic_dword(dev, RCR,RegRCR);
priv->ReceiveConfig = RegRCR;
}
}
//MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE );
notify_wx_assoc_event(priv->ieee80211);
}
static void MgntDisconnectIBSS(struct r8192_priv *priv)
{
u8 i;
bool bFilterOutNonAssociatedBSSID = false;
priv->ieee80211->state = IEEE80211_NOLINK;
for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i]= 0x55;
priv->OpMode = RT_OP_MODE_NO_LINK;
write_nic_word(priv, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]);
write_nic_dword(priv, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]);
{
RT_OP_MODE OpMode = priv->OpMode;
u8 btMsr = read_nic_byte(priv, MSR);
btMsr &= 0xfc;
switch(OpMode)
{
case RT_OP_MODE_INFRASTRUCTURE:
btMsr |= MSR_LINK_MANAGED;
break;
case RT_OP_MODE_IBSS:
btMsr |= MSR_LINK_ADHOC;
// led link set separate
break;
case RT_OP_MODE_AP:
btMsr |= MSR_LINK_MASTER;
break;
default:
btMsr |= MSR_LINK_NONE;
break;
}
write_nic_byte(priv, MSR, btMsr);
}
ieee80211_stop_send_beacons(priv->ieee80211);
// If disconnect, clear RCR CBSSID bit
bFilterOutNonAssociatedBSSID = false;
{
u32 RegRCR, Type;
Type = bFilterOutNonAssociatedBSSID;
RegRCR = read_nic_dword(priv, RCR);
priv->ReceiveConfig = RegRCR;
if (Type == true)
RegRCR |= (RCR_CBSSID);
else if (Type == false)
RegRCR &= (~RCR_CBSSID);
{
write_nic_dword(priv, RCR, RegRCR);
priv->ReceiveConfig = RegRCR;
}
}
notify_wx_assoc_event(priv->ieee80211);
}
static void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
{
int i;
u16 out, select;
u8 bit;
u32 bangdata = (data << 4) | (adr & 0xf);
out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
write_nic_word(dev, RFPinsEnable,
(read_nic_word(dev, RFPinsEnable) | 0x7));
select = read_nic_word(dev, RFPinsSelect);
write_nic_word(dev, RFPinsSelect, select | 0x7 |
SW_CONTROL_GPIO);
force_pci_posting(dev);
udelay(10);
write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
force_pci_posting(dev);
udelay(2);
write_nic_word(dev, RFPinsOutput, out);
force_pci_posting(dev);
udelay(10);
for (i = 15; i >= 0; i--) {
bit = (bangdata & (1 << i)) >> i;
write_nic_word(dev, RFPinsOutput, bit | out);
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
i--;
bit = (bangdata & (1 << i)) >> i;
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
write_nic_word(dev, RFPinsOutput, bit | out);
}
write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
force_pci_posting(dev);
udelay(10);
write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
write_nic_word(dev, RFPinsSelect, select | SW_CONTROL_GPIO);
rtl8185_rf_pins_enable(dev);
}
void rtl8225z2_rf_init(struct net_device *dev)
{
struct r8180_priv *priv = ieee80211_priv(dev);
int i;
short channel = 1;
u16 brsr;
u32 data,addr;
priv->chan = channel;
rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
if(priv->card_type == USB)
rtl8225_host_usb_init(dev);
else
rtl8225_host_pci_init(dev);
write_nic_dword(dev, RF_TIMING, 0x000a8008);
brsr = read_nic_word(dev, BRSR);
write_nic_word(dev, BRSR, 0xffff);
write_nic_dword(dev, RF_PARA, 0x100044);
#if 1 //0->1
rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
write_nic_byte(dev, CONFIG3, 0x44);
rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
#endif
rtl8185_rf_pins_enable(dev);
// mdelay(1000);
write_rtl8225(dev, 0x0, 0x2bf); mdelay(1);
write_rtl8225(dev, 0x1, 0xee0); mdelay(1);
write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
write_rtl8225(dev, 0x3, 0x441); mdelay(1);
write_rtl8225(dev, 0x4, 0x8c3);mdelay(1);
write_rtl8225(dev, 0x5, 0xc72);mdelay(1);
// }
write_rtl8225(dev, 0x6, 0xe6); mdelay(1);
write_rtl8225(dev, 0x7, ((priv->card_type == USB)? 0x82a : rtl8225_chan[channel])); mdelay(1);
write_rtl8225(dev, 0x8, 0x3f); mdelay(1);
write_rtl8225(dev, 0x9, 0x335); mdelay(1);
write_rtl8225(dev, 0xa, 0x9d4); mdelay(1);
write_rtl8225(dev, 0xb, 0x7bb); mdelay(1);
write_rtl8225(dev, 0xc, 0x850); mdelay(1);
write_rtl8225(dev, 0xd, 0xcdf); mdelay(1);
write_rtl8225(dev, 0xe, 0x2b); mdelay(1);
write_rtl8225(dev, 0xf, 0x114);
mdelay(100);
//if(priv->card_type != USB) /* maybe not needed even for 8185 */
// write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
write_rtl8225(dev, 0x0, 0x1b7);
for(i=0;i<95;i++){
write_rtl8225(dev, 0x1, (u8)(i+1));
#if 0
if(priv->phy_ver == 1)
/* version A */
write_rtl8225(dev, 0x2, rtl8225a_rxgain[i]);
else
#endif
/* version B & C & D*/
write_rtl8225(dev, 0x2, rtl8225z2_rxgain[i]);
}
write_rtl8225(dev, 0x3, 0x80);
write_rtl8225(dev, 0x5, 0x4);
write_rtl8225(dev, 0x0, 0xb7);
write_rtl8225(dev, 0x2, 0xc4d);
if(priv->card_type == USB){
// force_pci_posting(dev);
mdelay(200);
write_rtl8225(dev, 0x2, 0x44d);
// force_pci_posting(dev);
mdelay(100);
}//End of if(priv->card_type == USB)
/* FIXME!! rtl8187 we have to check if calibrarion
* is successful and eventually cal. again (repeat
* the two write on reg 2)
*/
// Check for calibration status, 2005.11.17,
data = read_rtl8225(dev, 6);
if (!(data&0x00000080))
{
write_rtl8225(dev, 0x02, 0x0c4d);
force_pci_posting(dev); mdelay(200);
write_rtl8225(dev, 0x02, 0x044d);
force_pci_posting(dev); mdelay(100);
data = read_rtl8225(dev, 6);
if (!(data&0x00000080))
{
DMESGW("RF Calibration Failed!!!!\n");
}
}
//force_pci_posting(dev);
mdelay(200); //200 for 8187
// //if(priv->card_type != USB){
// write_rtl8225(dev, 0x2, 0x44d);
// write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
// write_rtl8225(dev, 0x2, 0x47d);
//
// force_pci_posting(dev);
// mdelay(100);
//
// write_rtl8225(dev, 0x2, 0x44d);
// //}
write_rtl8225(dev, 0x0, 0x2bf);
if(priv->card_type != USB)
rtl8185_rf_pins_enable(dev);
//set up ZEBRA AGC table, 2005.11.17,
for(i=0;i<128;i++){
data = rtl8225_agc[i];
addr = i + 0x80; //enable writing AGC table
write_phy_ofdm(dev, 0xb, data);
mdelay(1);
write_phy_ofdm(dev, 0xa, addr);
mdelay(1);
}
#if 0
for(i=0;i<128;i++){
write_phy_ofdm(dev, 0xb, rtl8225_agc[i]);
mdelay(1);
write_phy_ofdm(dev, 0xa, (u8)i+ 0x80);
mdelay(1);
}
#endif
force_pci_posting(dev);
mdelay(1);
write_phy_ofdm(dev, 0x0, 0x1); mdelay(1);
write_phy_ofdm(dev, 0x1, 0x2); mdelay(1);
write_phy_ofdm(dev, 0x2, ((priv->card_type == USB)? 0x42 : 0x62)); mdelay(1);
write_phy_ofdm(dev, 0x3, 0x0); mdelay(1);
write_phy_ofdm(dev, 0x4, 0x0); mdelay(1);
write_phy_ofdm(dev, 0x5, 0x0); mdelay(1);
write_phy_ofdm(dev, 0x6, 0x40); mdelay(1);
write_phy_ofdm(dev, 0x7, 0x0); mdelay(1);
write_phy_ofdm(dev, 0x8, 0x40); mdelay(1);
write_phy_ofdm(dev, 0x9, 0xfe); mdelay(1);
write_phy_ofdm(dev, 0xa, 0x8); mdelay(1);
//write_phy_ofdm(dev, 0x18, 0xef);
// }
//}
write_phy_ofdm(dev, 0xb, 0x80); mdelay(1);
write_phy_ofdm(dev, 0xc, 0x1);mdelay(1);
//if(priv->card_type != USB)
write_phy_ofdm(dev, 0xd, 0x43);
write_phy_ofdm(dev, 0xe, 0xd3);mdelay(1);
#if 0
if(priv->card_8185 == 1){
if(priv->card_8185_Bversion)
write_phy_ofdm(dev, 0xf, 0x20);/*ver B*/
else
write_phy_ofdm(dev, 0xf, 0x28);/*ver C*/
}else{
#endif
write_phy_ofdm(dev, 0xf, 0x38);mdelay(1);
/*ver D & 8187*/
// }
// if(priv->card_8185 == 1 && priv->card_8185_Bversion)
// write_phy_ofdm(dev, 0x10, 0x04);/*ver B*/
// else
write_phy_ofdm(dev, 0x10, 0x84);mdelay(1);
/*ver C & D & 8187*/
write_phy_ofdm(dev, 0x11, 0x07);mdelay(1);
/*agc resp time 700*/
// if(priv->card_8185 == 2){
/* Ver D & 8187*/
write_phy_ofdm(dev, 0x12, 0x20);mdelay(1);
write_phy_ofdm(dev, 0x13, 0x20);mdelay(1);
#if 0
}else{
u32 read_rtl8225(struct net_device *dev, u8 adr)
{
u32 data2Write = ((u32)(adr & 0x1f)) << 27;
u32 dataRead;
u32 mask;
u16 oval,oval2,oval3,tmp;
// ThreeWireReg twreg;
// ThreeWireReg tdata;
int i;
short bit, rw;
u8 wLength = 6;
u8 rLength = 12;
u8 low2high = 0;
oval = read_nic_word(dev, RFPinsOutput);
oval2 = read_nic_word(dev, RFPinsEnable);
oval3 = read_nic_word(dev, RFPinsSelect);
write_nic_word(dev, RFPinsEnable, (oval2|0xf));
write_nic_word(dev, RFPinsSelect, (oval3|0xf));
dataRead = 0;
oval &= ~0xf;
write_nic_word(dev, RFPinsOutput, oval | BB_HOST_BANG_EN ); udelay(4);
write_nic_word(dev, RFPinsOutput, oval ); udelay(5);
rw = 0;
mask = (low2high) ? 0x01 : (((u32)0x01)<<(32-1));
for(i = 0; i < wLength/2; i++)
{
bit = ((data2Write&mask) != 0) ? 1 : 0;
write_nic_word(dev, RFPinsOutput, bit|oval | rw); udelay(1);
write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2);
write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2);
mask = (low2high) ? (mask<<1): (mask>>1);
if(i == 2)
{
rw = BB_HOST_BANG_RW;
write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2);
write_nic_word(dev, RFPinsOutput, bit|oval | rw); udelay(2);
break;
}
bit = ((data2Write&mask) != 0) ? 1: 0;
write_nic_word(dev, RFPinsOutput, oval|bit|rw| BB_HOST_BANG_CLK); udelay(2);
write_nic_word(dev, RFPinsOutput, oval|bit|rw| BB_HOST_BANG_CLK); udelay(2);
write_nic_word(dev, RFPinsOutput, oval| bit |rw); udelay(1);
mask = (low2high) ? (mask<<1) : (mask>>1);
}
//twreg.struc.clk = 0;
//twreg.struc.data = 0;
write_nic_word(dev, RFPinsOutput, rw|oval); udelay(2);
mask = (low2high) ? 0x01 : (((u32)0x01) << (12-1));
for(i = 0; i < rLength; i++)
{
write_nic_word(dev, RFPinsOutput, rw|oval); udelay(1);
write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2);
write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2);
write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2);
tmp = read_nic_word(dev, RFPinsInput);
dataRead |= (tmp & BB_HOST_BANG_CLK ? mask : 0);
write_nic_word(dev, RFPinsOutput, (rw|oval)); udelay(2);
mask = (low2high) ? (mask<<1) : (mask>>1);
}
write_nic_word(dev, RFPinsOutput, BB_HOST_BANG_EN|BB_HOST_BANG_RW|oval); udelay(2);
write_nic_word(dev, RFPinsEnable, oval2);
write_nic_word(dev, RFPinsSelect, oval3); // Set To SW Switch
write_nic_word(dev, RFPinsOutput, 0x3a0);
return dataRead;
}
static void
MlmeDisassociateRequest(
struct net_device* dev,
u8* asSta,
u8 asRsn
)
{
struct r8192_priv *priv = ieee80211_priv(dev);
u8 i;
RemovePeerTS(priv->ieee80211, asSta);
SendDisassociation( priv->ieee80211, asSta, asRsn );
if(memcpy(priv->ieee80211->current_network.bssid,asSta,6) == NULL)
{
//ShuChen TODO: change media status.
//ShuChen TODO: What to do when disassociate.
priv->ieee80211->state = IEEE80211_NOLINK;
//pMgntInfo->AsocTimestamp = 0;
for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x22;
// pMgntInfo->mBrates.Length = 0;
// Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) );
priv->OpMode = RT_OP_MODE_NO_LINK;
{
RT_OP_MODE OpMode = priv->OpMode;
//LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
u8 btMsr = read_nic_byte(dev, MSR);
btMsr &= 0xfc;
switch(OpMode)
{
case RT_OP_MODE_INFRASTRUCTURE:
btMsr |= MSR_LINK_MANAGED;
//LedAction = LED_CTL_LINK;
break;
case RT_OP_MODE_IBSS:
btMsr |= MSR_LINK_ADHOC;
// led link set seperate
break;
case RT_OP_MODE_AP:
btMsr |= MSR_LINK_MASTER;
//LedAction = LED_CTL_LINK;
break;
default:
btMsr |= MSR_LINK_NONE;
break;
}
write_nic_byte(dev, MSR, btMsr);
// LED control
//Adapter->HalFunc.LedControlHandler(Adapter, LedAction);
}
ieee80211_disassociate(priv->ieee80211);
write_nic_word(dev, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]);
write_nic_dword(dev, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]);
}
}
void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
{
int i;
u16 out,select;
u8 bit;
u32 bangdata = (data << 4) | (adr & 0xf);
struct r8180_priv *priv = ieee80211_priv(dev);
out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
write_nic_word(dev,RFPinsEnable,
(read_nic_word(dev,RFPinsEnable) | 0x7));
select = read_nic_word(dev, RFPinsSelect);
write_nic_word(dev, RFPinsSelect, select | 0x7 |
((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
force_pci_posting(dev);
udelay(10);
write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
force_pci_posting(dev);
udelay(2);
write_nic_word(dev, RFPinsOutput, out);
force_pci_posting(dev);
udelay(10);
for(i=15; i>=0;i--){
bit = (bangdata & (1<<i)) >> i;
write_nic_word(dev, RFPinsOutput, bit | out);
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
i--;
bit = (bangdata & (1<<i)) >> i;
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
write_nic_word(dev, RFPinsOutput, bit | out);
}
write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
force_pci_posting(dev);
udelay(10);
write_nic_word(dev, RFPinsOutput, out |
((priv->card_type == USB) ? 4 : BB_HOST_BANG_EN));
write_nic_word(dev, RFPinsSelect, select |
((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
if(priv->card_type == USB)
mdelay(2);
else
rtl8185_rf_pins_enable(dev);
}
void rtl8225z2_rf_init(struct net_device *dev)
{
struct r8180_priv *priv = ieee80211_priv(dev);
int i;
short channel = 1;
u16 brsr;
u32 data, addr;
priv->chan = channel;
rtl8225_host_pci_init(dev);
write_nic_dword(dev, RF_TIMING, 0x000a8008);
brsr = read_nic_word(dev, BRSR);
write_nic_word(dev, BRSR, 0xffff);
write_nic_dword(dev, RF_PARA, 0x100044);
rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
write_nic_byte(dev, CONFIG3, 0x44);
rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
rtl8185_rf_pins_enable(dev);
write_rtl8225(dev, 0x0, 0x2bf); mdelay(1);
write_rtl8225(dev, 0x1, 0xee0); mdelay(1);
write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
write_rtl8225(dev, 0x3, 0x441); mdelay(1);
write_rtl8225(dev, 0x4, 0x8c3); mdelay(1);
write_rtl8225(dev, 0x5, 0xc72); mdelay(1);
write_rtl8225(dev, 0x6, 0xe6); mdelay(1);
write_rtl8225(dev, 0x7, rtl8225_chan[channel]); mdelay(1);
write_rtl8225(dev, 0x8, 0x3f); mdelay(1);
write_rtl8225(dev, 0x9, 0x335); mdelay(1);
write_rtl8225(dev, 0xa, 0x9d4); mdelay(1);
write_rtl8225(dev, 0xb, 0x7bb); mdelay(1);
write_rtl8225(dev, 0xc, 0x850); mdelay(1);
write_rtl8225(dev, 0xd, 0xcdf); mdelay(1);
write_rtl8225(dev, 0xe, 0x2b); mdelay(1);
write_rtl8225(dev, 0xf, 0x114);
mdelay(100);
write_rtl8225(dev, 0x0, 0x1b7);
for (i = 0; i < 95; i++) {
write_rtl8225(dev, 0x1, (u8)(i + 1));
write_rtl8225(dev, 0x2, rtl8225z2_rxgain[i]);
}
write_rtl8225(dev, 0x3, 0x80);
write_rtl8225(dev, 0x5, 0x4);
write_rtl8225(dev, 0x0, 0xb7);
write_rtl8225(dev, 0x2, 0xc4d);
/* FIXME!! rtl8187 we have to check if calibrarion
* is successful and eventually cal. again (repeat
* the two write on reg 2)
*/
data = read_rtl8225(dev, 6);
if (!(data & 0x00000080)) {
write_rtl8225(dev, 0x02, 0x0c4d);
force_pci_posting(dev); mdelay(200);
write_rtl8225(dev, 0x02, 0x044d);
force_pci_posting(dev); mdelay(100);
data = read_rtl8225(dev, 6);
if (!(data & 0x00000080))
DMESGW("RF Calibration Failed!!!!\n");
}
mdelay(200);
write_rtl8225(dev, 0x0, 0x2bf);
for (i = 0; i < 128; i++) {
data = rtl8225_agc[i];
addr = i + 0x80; /* enable writing AGC table */
write_phy_ofdm(dev, 0xb, data);
mdelay(1);
write_phy_ofdm(dev, 0xa, addr);
mdelay(1);
}
force_pci_posting(dev);
mdelay(1);
write_phy_ofdm(dev, 0x00, 0x01); mdelay(1);
write_phy_ofdm(dev, 0x01, 0x02); mdelay(1);
write_phy_ofdm(dev, 0x02, 0x62); mdelay(1);
write_phy_ofdm(dev, 0x03, 0x00); mdelay(1);
write_phy_ofdm(dev, 0x04, 0x00); mdelay(1);
write_phy_ofdm(dev, 0x05, 0x00); mdelay(1);
write_phy_ofdm(dev, 0x06, 0x40); mdelay(1);
write_phy_ofdm(dev, 0x07, 0x00); mdelay(1);
write_phy_ofdm(dev, 0x08, 0x40); mdelay(1);
write_phy_ofdm(dev, 0x09, 0xfe); mdelay(1);
write_phy_ofdm(dev, 0x0a, 0x08); mdelay(1);
write_phy_ofdm(dev, 0x0b, 0x80); mdelay(1);
write_phy_ofdm(dev, 0x0c, 0x01); mdelay(1);
write_phy_ofdm(dev, 0x0d, 0x43);
write_phy_ofdm(dev, 0x0e, 0xd3); mdelay(1);
write_phy_ofdm(dev, 0x0f, 0x38); mdelay(1);
write_phy_ofdm(dev, 0x10, 0x84); mdelay(1);
write_phy_ofdm(dev, 0x11, 0x07); mdelay(1);
write_phy_ofdm(dev, 0x12, 0x20); mdelay(1);
write_phy_ofdm(dev, 0x13, 0x20); mdelay(1);
write_phy_ofdm(dev, 0x14, 0x00); mdelay(1);
write_phy_ofdm(dev, 0x15, 0x40); mdelay(1);
write_phy_ofdm(dev, 0x16, 0x00); mdelay(1);
write_phy_ofdm(dev, 0x17, 0x40); mdelay(1);
write_phy_ofdm(dev, 0x18, 0xef); mdelay(1);
write_phy_ofdm(dev, 0x19, 0x19); mdelay(1);
write_phy_ofdm(dev, 0x1a, 0x20); mdelay(1);
write_phy_ofdm(dev, 0x1b, 0x15); mdelay(1);
write_phy_ofdm(dev, 0x1c, 0x04); mdelay(1);
write_phy_ofdm(dev, 0x1d, 0xc5); mdelay(1);
write_phy_ofdm(dev, 0x1e, 0x95); mdelay(1);
write_phy_ofdm(dev, 0x1f, 0x75); mdelay(1);
write_phy_ofdm(dev, 0x20, 0x1f); mdelay(1);
write_phy_ofdm(dev, 0x21, 0x17); mdelay(1);
write_phy_ofdm(dev, 0x22, 0x16); mdelay(1);
write_phy_ofdm(dev, 0x23, 0x80); mdelay(1); /* FIXME maybe not needed */
write_phy_ofdm(dev, 0x24, 0x46); mdelay(1);
write_phy_ofdm(dev, 0x25, 0x00); mdelay(1);
write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
rtl8225z2_set_gain(dev, 4);
write_phy_cck(dev, 0x0, 0x98); mdelay(1);
write_phy_cck(dev, 0x3, 0x20); mdelay(1);
write_phy_cck(dev, 0x4, 0x7e); mdelay(1);
write_phy_cck(dev, 0x5, 0x12); mdelay(1);
write_phy_cck(dev, 0x6, 0xfc); mdelay(1);
write_phy_cck(dev, 0x7, 0x78); mdelay(1);
write_phy_cck(dev, 0x8, 0x2e); mdelay(1);
write_phy_cck(dev, 0x10, 0x93); mdelay(1);
write_phy_cck(dev, 0x11, 0x88); mdelay(1);
write_phy_cck(dev, 0x12, 0x47); mdelay(1);
write_phy_cck(dev, 0x13, 0xd0);
write_phy_cck(dev, 0x19, 0x00);
write_phy_cck(dev, 0x1a, 0xa0);
write_phy_cck(dev, 0x1b, 0x08);
write_phy_cck(dev, 0x40, 0x86); /* CCK Carrier Sense Threshold */
write_phy_cck(dev, 0x41, 0x8d); mdelay(1);
write_phy_cck(dev, 0x42, 0x15); mdelay(1);
write_phy_cck(dev, 0x43, 0x18); mdelay(1);
write_phy_cck(dev, 0x44, 0x36); mdelay(1);
write_phy_cck(dev, 0x45, 0x35); mdelay(1);
write_phy_cck(dev, 0x46, 0x2e); mdelay(1);
write_phy_cck(dev, 0x47, 0x25); mdelay(1);
write_phy_cck(dev, 0x48, 0x1c); mdelay(1);
write_phy_cck(dev, 0x49, 0x12); mdelay(1);
write_phy_cck(dev, 0x4a, 0x09); mdelay(1);
write_phy_cck(dev, 0x4b, 0x04); mdelay(1);
write_phy_cck(dev, 0x4c, 0x05); mdelay(1);
write_nic_byte(dev, 0x5b, 0x0d); mdelay(1);
rtl8225z2_SetTXPowerLevel(dev, channel);
/* RX antenna default to A */
write_phy_cck(dev, 0x11, 0x9b); mdelay(1); /* B: 0xDB */
write_phy_ofdm(dev, 0x26, 0x90); mdelay(1); /* B: 0x10 */
rtl8185_tx_antenna(dev, 0x03); /* B: 0x00 */
/* switch to high-speed 3-wire
* last digit. 2 for both cck and ofdm
*/
write_nic_dword(dev, 0x94, 0x15c00002);
rtl8185_rf_pins_enable(dev);
rtl8225_rf_set_chan(dev, priv->chan);
}
static u32 read_rtl8225(struct net_device *dev, u8 adr)
{
u32 data2Write = ((u32)(adr & 0x1f)) << 27;
u32 dataRead;
u32 mask;
u16 oval, oval2, oval3, tmp;
int i;
short bit, rw;
u8 wLength = 6;
u8 rLength = 12;
u8 low2high = 0;
oval = read_nic_word(dev, RFPinsOutput);
oval2 = read_nic_word(dev, RFPinsEnable);
oval3 = read_nic_word(dev, RFPinsSelect);
write_nic_word(dev, RFPinsEnable, (oval2|0xf));
write_nic_word(dev, RFPinsSelect, (oval3|0xf));
dataRead = 0;
oval &= ~0xf;
write_nic_word(dev, RFPinsOutput, oval | BB_HOST_BANG_EN);
udelay(4);
write_nic_word(dev, RFPinsOutput, oval);
udelay(5);
rw = 0;
mask = (low2high) ? 0x01 : (((u32)0x01)<<(32-1));
for (i = 0; i < wLength/2; i++) {
bit = ((data2Write&mask) != 0) ? 1 : 0;
write_nic_word(dev, RFPinsOutput, bit | oval | rw);
udelay(1);
write_nic_word(dev, RFPinsOutput,
bit | oval | BB_HOST_BANG_CLK | rw);
udelay(2);
write_nic_word(dev, RFPinsOutput,
bit | oval | BB_HOST_BANG_CLK | rw);
udelay(2);
mask = (low2high) ? (mask<<1) : (mask>>1);
if (i == 2) {
rw = BB_HOST_BANG_RW;
write_nic_word(dev, RFPinsOutput,
bit | oval | BB_HOST_BANG_CLK | rw);
udelay(2);
write_nic_word(dev, RFPinsOutput, bit | oval | rw);
udelay(2);
break;
}
bit = ((data2Write&mask) != 0) ? 1 : 0;
write_nic_word(dev, RFPinsOutput,
oval | bit | rw | BB_HOST_BANG_CLK);
udelay(2);
write_nic_word(dev, RFPinsOutput,
oval | bit | rw | BB_HOST_BANG_CLK);
udelay(2);
write_nic_word(dev, RFPinsOutput, oval | bit | rw);
udelay(1);
mask = (low2high) ? (mask<<1) : (mask>>1);
}
write_nic_word(dev, RFPinsOutput, rw|oval);
udelay(2);
mask = (low2high) ? 0x01 : (((u32)0x01) << (12-1));
/*
* We must set data pin to HW controlled, otherwise RF can't driver it
* and value RF register won't be able to read back properly.
*/
write_nic_word(dev, RFPinsEnable, (oval2 & (~0x01)));
for (i = 0; i < rLength; i++) {
write_nic_word(dev, RFPinsOutput, rw|oval); udelay(1);
write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
udelay(2);
write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
udelay(2);
write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
udelay(2);
tmp = read_nic_word(dev, RFPinsInput);
dataRead |= (tmp & BB_HOST_BANG_CLK ? mask : 0);
write_nic_word(dev, RFPinsOutput, (rw|oval)); udelay(2);
mask = (low2high) ? (mask<<1) : (mask>>1);
}
write_nic_word(dev, RFPinsOutput,
BB_HOST_BANG_EN | BB_HOST_BANG_RW | oval);
udelay(2);
write_nic_word(dev, RFPinsEnable, oval2);
write_nic_word(dev, RFPinsSelect, oval3); /* Set To SW Switch */
write_nic_word(dev, RFPinsOutput, 0x3a0);
return dataRead;
}
void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
{
#ifdef THOMAS_3WIRE
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
struct usb_device *udev = priv->udev;
int status;
data = (data << 4) | (u16)(adr & 0x0f);
//
// OUT a vendor request to ask 8051 do HW three write operation.
//
//printk("before write rtl8225 , data = %x\n",data);
status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
0x04, RTL8187_REQT_WRITE,
0x0000, 0x1304, &data, 2, HZ / 2);
if (status < 0)
{
printk("write_rtl8225 TimeOut! status:%x\n", status);
}
/*mdelay(1);
u16 Tmpdata;
status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
0x04, RTL8187_REQT_READ,
0x0000, 0x1304, &Tmpdata, 2, HZ / 2);
if (status < 0)
{
printk("read_rtl8225 TimeOut! status:%x\n", status);
}
printk("after read rtl8225 , data = %x\n",Tmpdata);*/
#else
#ifdef USE_8051_3WIRE
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
struct usb_device *udev = priv->udev;
//u8 bit;
u16 wReg80, wReg82, wReg84;
wReg80 = read_nic_word(dev, RFPinsOutput);
wReg80 &= 0xfff3;
wReg82 = read_nic_word(dev, RFPinsEnable);
wReg84 = read_nic_word(dev, RFPinsSelect);
// <RJ_NOTE> 3-wire should be controled by HW when we finish SW 3-wire programming. 2005.08.10, by rcnjko.
//wReg84 &= 0xfff0;
wReg84 &= 0xfff8; //modified by david according to windows segment code.
// We must set SW enabled before terminating HW 3-wire, 2005.07.29, by rcnjko.
write_nic_word(dev, RFPinsEnable, (wReg82|0x0007)); // Set To Output Enable
write_nic_word(dev, RFPinsSelect, (wReg84|0x0007)); // Set To SW Switch
force_pci_posting(dev);
udelay(10); //
write_nic_word(dev, 0x80, (BB_HOST_BANG_EN|wReg80)); // Set SI_EN (RFLE)
force_pci_posting(dev);
udelay(2);
//twreg.struc.enableB = 0;
write_nic_word(dev, 0x80, (wReg80)); // Clear SI_EN (RFLE)
force_pci_posting(dev);
udelay(10);
usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
adr, 0x8225, &data, 2, HZ / 2);
write_nic_word(dev, 0x80, (BB_HOST_BANG_EN|wReg80));
force_pci_posting(dev);
udelay(10);
write_nic_word(dev, 0x80, (wReg80|0x0004));
write_nic_word(dev, 0x84, (wReg84|0x0000));// Set To SW Switch
if(priv->card_type == USB)
mdelay(2);
else
rtl8185_rf_pins_enable(dev);
#else
int i;
u16 out,select;
u8 bit;
u32 bangdata = (data << 4) | (adr & 0xf);
struct r8180_priv *priv = ieee80211_priv(dev);
out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
write_nic_word(dev,RFPinsEnable,
(read_nic_word(dev,RFPinsEnable) | 0x7));
select = read_nic_word(dev, RFPinsSelect);
write_nic_word(dev, RFPinsSelect, select | 0x7 |
((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
force_pci_posting(dev);
udelay(10);
write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
force_pci_posting(dev);
udelay(2);
write_nic_word(dev, RFPinsOutput, out);
force_pci_posting(dev);
udelay(10);
for(i=15; i>=0;i--){
bit = (bangdata & (1<<i)) >> i;
write_nic_word(dev, RFPinsOutput, bit | out);
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
i--;
bit = (bangdata & (1<<i)) >> i;
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
write_nic_word(dev, RFPinsOutput, bit | out);
}
write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
force_pci_posting(dev);
udelay(10);
write_nic_word(dev, RFPinsOutput, out |
((priv->card_type == USB) ? 4 : BB_HOST_BANG_EN));
write_nic_word(dev, RFPinsSelect, select |
((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
if(priv->card_type == USB)
mdelay(2);
else
rtl8185_rf_pins_enable(dev);
#endif
#endif /*THOMAS_3WIRE*/
}
void rtl8225_rf_init(struct net_device *dev)
{
struct r8180_priv *priv = ieee80211_priv(dev);
int i;
short channel = 1;
u16 brsr;
priv->chan = channel;
rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
if(priv->card_type == USB)
rtl8225_host_usb_init(dev);
else
rtl8225_host_pci_init(dev);
write_nic_dword(dev, RF_TIMING, 0x000a8008);
brsr = read_nic_word(dev, BRSR);
write_nic_word(dev, BRSR, 0xffff);
#if 0
if(priv->card_8185 == 1){/* version C or B */
if(priv->card_8185_Bversion) /* version B*/
write_nic_dword(dev, RF_PARA, 0x44);
else /* version C */
write_nic_dword(dev, RF_PARA, 0x100044);
}else{ /* version D */
if(priv->enable_gpio0)
write_nic_dword(dev, RF_PARA, 0x20100044);
else /* also USB */
write_nic_dword(dev, RF_PARA, 0x100044);
}
#endif
write_nic_dword(dev, RF_PARA, 0x100044);
#if 1 //0->1
rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
write_nic_byte(dev, CONFIG3, 0x44);
rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
#endif
if(priv->card_type == USB){
rtl8185_rf_pins_enable(dev);
mdelay(1000);
}
write_rtl8225(dev, 0x0, 0x67); mdelay(1);
write_rtl8225(dev, 0x1, 0xfe0); mdelay(1);
write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
write_rtl8225(dev, 0x3, 0x441); mdelay(1);
if(priv->card_type == USB)
write_rtl8225(dev, 0x4, 0x486);
else
write_rtl8225(dev, 0x4, 0x8be);
mdelay(1);
#if 0
}else if(priv->phy_ver == 1){
/*-----------------------------------------------------------------------------
* Function: cmpk_message_handle_tx()
*
* Overview: Driver internal module can call the API to send message to
* firmware side. For example, you can send a debug command packet.
* Or you can send a request for FW to modify RLX4181 LBUS HW bank.
* Otherwise, you can change MAC/PHT/RF register by firmware at
* run time. We do not support message more than one segment now.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 05/06/2008 amy porting from windows code.
*
*---------------------------------------------------------------------------*/
extern RT_STATUS cmpk_message_handle_tx(
struct net_device *dev,
u8* codevirtualaddress,
u32 packettype,
u32 buffer_len)
{
RT_STATUS rt_status = RT_STATUS_SUCCESS;
#ifdef RTL8192U
return rt_status;
#else
struct r8192_priv *priv = ieee80211_priv(dev);
u16 frag_threshold;
u16 frag_length = 0, frag_offset = 0;
//u16 total_size;
//int i;
unsigned int flags;
rt_firmware *pfirmware = priv->pFirmware;
struct sk_buff *skb;
unsigned char *seg_ptr;
cb_desc *tcb_desc;
u8 bLastIniPkt;
PTX_FWINFO_8190PCI pTxFwInfo = NULL;
struct buffer* buflist;
tx_desc_819x_pci *pdesc = NULL;
ptx_ring tail;
ptx_ring begin;
u32 *buf;
int count;
int i;
int remain;
int buflen;
spin_lock_irqsave(&priv->tx_lock,flags);
RT_TRACE(COMP_CMDPKT,"%s(),buffer_len is %d\n",__FUNCTION__,buffer_len);
firmware_init_param(dev);
//Fragmentation might be required
frag_threshold = pfirmware->cmdpacket_frag_thresold;
do {
if((buffer_len - frag_offset) > frag_threshold) {
frag_length = frag_threshold ;
bLastIniPkt = 0;
} else {
frag_length =(u16)(buffer_len - frag_offset);
bLastIniPkt = 1;
}
tail=priv->txcmdringtail;
begin=priv->txcmdring;
buflist = priv->txcmdbufstail;
count = priv->txringcount;
pdesc = (tx_desc_819x_pci *)(tail->desc);
if(!buflist){
printk("TX CMD buffer error, cannot TX CMD frames. \n");
rt_status = RT_STATUS_FAILURE;
goto Failed;
}
buf=buflist->buf;
buflen=priv->txfwbuffersize;
if(pdesc->OWN)
{
printk("No more TX desc, returning \n");
priv->stats.txrdu++;
rt_status = RT_STATUS_FAILURE;
goto Failed;
}
/* Allocate skb buffer to contain firmware info and tx descriptor info
* add 4 to avoid packet appending overflow.
* */
#ifdef RTL8192U
skb = dev_alloc_skb(USB_HWDESC_HEADER_LEN + frag_length + 4);
#else
skb = dev_alloc_skb(frag_length + priv->ieee80211->tx_headroom + 4);
#endif
if(skb == NULL)
{
rt_status = RT_STATUS_FAILURE;
goto Failed;
}
memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
tcb_desc->queue_index = TXCMD_QUEUE;
tcb_desc->bCmdOrInit = packettype;
tcb_desc->bLastIniPkt = bLastIniPkt;
#ifdef RTL8192U
skb_reserve(skb, USB_HWDESC_HEADER_LEN);
#endif
seg_ptr = skb_put(skb, frag_length + priv->ieee80211->tx_headroom);
remain=skb->len;
pTxFwInfo = (PTX_FWINFO_8190PCI)seg_ptr;
memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
memset(pTxFwInfo,0x12,8);
seg_ptr +=sizeof(TX_FWINFO_8190PCI);
memset(pdesc,0,12);
pdesc->LINIP = tcb_desc->bLastIniPkt;
pdesc->FirstSeg = 1;//first segment;
pdesc->LastSeg = 1;//first segment;
pdesc->CmdInit = DESC_PACKET_TYPE_NORMAL;
pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
pdesc->PktSize = (u16)(frag_length+pdesc->Offset);
pdesc->QueueSelect = QSLT_CMD;
pdesc->TxFWInfoSize = 0x08;
pdesc->RATid = (u8)DESC_PACKET_TYPE_INIT;
pdesc->TxBufferSize = skb->len;
pdesc->TxBuffAddr = buflist->dma;
pdesc->OWN = 1;
/*
* Transform from little endian to big endian
* and pending zero
*/
memcpy(seg_ptr,codevirtualaddress,frag_length);
for(i=0;i<buflen&& remain >0;i++,remain--){
((u8*)buf)[i]=skb->data[i]; //copy data into descriptor pointed DMAble buffer
if(remain == 4 && i+4 >= buflen) break;
/* ensure the last desc has at least 4 bytes payload */
}
if(remain == 0)
dev_kfree_skb_any(skb);
#if 0
{
int k;
printk("------------tx cmd------------\n");
for(k = 0; k<i; k++)
printk(" 0x%x",((u8*)buf)[k]);
printk("\n");
}
{
int m;
printk("-------------cmd desc----------\n");
for(m=0;m<32;m++)
printk(" 0x%x",((u8*)pdesc)[m]);
printk("\n");
}
#endif
if(((tail->desc) - (begin->desc))/8 == count-1)
tail=begin;
else
tail=tail->next;
buflist=buflist->next;
mb();
priv->txcmdringtail=tail;
priv->txcmdbufstail=buflist;
codevirtualaddress += frag_length;
frag_offset += frag_length;
write_nic_word(dev,TPPoll,TPPoll_CQ);
}while(frag_offset < buffer_len);
Failed:
spin_unlock_irqrestore(&priv->tx_lock,flags);
return rt_status;
#endif
} /* CMPK_Message_Handle_Tx */
