void DEX_REGION::process_simply(OUT PRNO2UINT & prno2v, UINT param_num,
UINT vregnum, DEX2IR & d2ir, UINT2PR * v2pr,
IN PRNO2UINT * pr2v, TYIDR * tr)
{
LOG("\t\t Invoke DEX_REGION::process_simply '%s'", get_ru_name());
if (get_ir_list() == NULL) { return ; }
OPT_CTX oc;
OPTC_show_comp_time(oc) = g_show_comp_time;
CHAR const* ru_name = get_ru_name();
construct_ir_bb_list();
IS_TRUE0(verify_ir_and_bb(get_bb_list(), get_dm()));
RU_ana(this)->m_ir_list = NULL; //All IRs have been moved to each IR_BB.
IR_CFG * cfg = init_cfg(oc);
cfg->loop_analysis(oc);
PASS_MGR * pm = new_pass_mgr();
OPTC_pass_mgr(oc) = pm; //record pass manager.
if (g_do_ssa && OPTC_pass_mgr(oc) != NULL) {
//Convert program to ssa form.
IR_SSA_MGR * ssamgr = (IR_SSA_MGR*)OPTC_pass_mgr(oc)->
register_opt(OPT_SSA_MGR);
IS_TRUE0(ssamgr);
ssamgr->construction(oc, this);
}
init_aa(oc);
init_du(oc);
IR_SSA_MGR * ssamgr = (IR_SSA_MGR*)pm->query_opt(OPT_SSA_MGR);
if (ssamgr != NULL && ssamgr->is_ssa_construct()) {
//Destruct ssa form.
ssamgr->destruction_in_bblist_order();
}
delete pm;
OPTC_pass_mgr(oc) = NULL;
#if 1
//Do not allocate register.
prno2v.clean();
prno2v.copy(*d2ir.get_pr2v_map());
return;
#else
//Allocate register.
RA ra(this, tr, param_num, vregnum, v2pr, pr2v, &m_var2pr);
LOG("\t\tdo DEX Register Allcation for '%s'", ru_name);
ra.perform(oc);
update_ra_res(ra, prno2v);
#endif
}
void DEX_REGION::process(OUT PRNO2UINT & prno2v, UINT param_num, UINT vregnum,
UINT2PR * v2pr, IN PRNO2UINT * pr2v, TYIDR * tr)
{
if (get_ir_list() == NULL) { return; }
OPT_CTX oc;
OPTC_show_comp_time(oc) = g_show_comp_time;
g_indent = 0;
note("\n==---- REGION_NAME:%s ----==", get_ru_name());
prescan(get_ir_list());
RU_is_pr_unique_for_same_no(this) = true;
//g_do_ssa = true;
PASS_MGR * pm = new_pass_mgr();
OPTC_pass_mgr(oc) = pm;
high_process(oc);
middle_process(oc);
IR_SSA_MGR * ssamgr = (IR_SSA_MGR*)pm->query_opt(OPT_SSA_MGR);
if (ssamgr != NULL && ssamgr->is_ssa_construct()) {
ssamgr->destruction_in_bblist_order();
}
delete pm;
OPTC_pass_mgr(oc) = NULL;
if (RU_type(this) != RU_FUNC) { return; }
IR_BB_LIST * bbl = get_bb_list();
if (bbl->get_elem_count() == 0) { return; }
IS_TRUE0(verify_ir_and_bb(bbl, get_dm()));
RF_CTX rf;
RC_insert_cvt(rf) = false; //Do not insert cvt for DEX code.
refine_ir_bb_list(bbl, rf);
IS_TRUE0(verify_ir_and_bb(bbl, get_dm()));
RA ra(this, tr, param_num, vregnum, v2pr, pr2v, &m_var2pr);
LOG("\t\tdo DEX Register Allcation for '%s'", get_ru_name());
ra.perform(oc);
update_ra_res(ra, prno2v);
}
