template<> bool
device<Simulate>::acquire( task& task )
{
if ( simulator * simulator = task.simulator() )
return simulator->acquire( task.io_service() );
return false;
}
template<> bool
device<UserFDK>::readData( task& task, waveform& data )
{
static std::chrono::high_resolution_clock::time_point __uptime = std::chrono::high_resolution_clock::now();
IAgMD2LogicDevicePtr spDpuA = task.spAgDrvr()->LogicDevices->Item[L"DpuA"];
long words_32bits = task.method().nbr_of_s_to_acquire;
data.method_ = task.method();
try {
SAFEARRAY * psaWfmDataRaw(0);
spDpuA->ReadIndirectInt32(0x11, 0, words_32bits, &psaWfmDataRaw, &data.actualElements_, &data.firstValidElement_);
// workaround
data.timestamp_ = std::chrono::duration< uint64_t, std::pico >( std::chrono::high_resolution_clock::now() - __uptime ).count();
safearray_t<int32_t> sa( psaWfmDataRaw );
data.d_.resize( words_32bits );
std::copy( sa.data() + data.firstValidElement_, sa.data() + words_32bits, data.d_.begin() );
} catch ( _com_error& e ) {
TERR(e,"readData::ReadIndirectInt32");
}
return true;
}
template<> bool
device<Simulate>::readData( task& task, waveform& data )
{
data.method_ = task.method();
if ( simulator * simulator = task.simulator() )
return simulator->readData( data );
return false;
}
template<> bool
device<UserFDK>::acquire( task& task )
{
//Start the acquisition
try { task.spAgDrvr()->Acquisition->UserControl->StartSegmentation(); } catch ( _com_error& e ) { TERR(e, "StartSegmentation"); }
try { task.spAgDrvr()->Acquisition->UserControl->StartProcessing(AgMD2UserControlProcessingType1); } catch ( _com_error& e ) {
TERR( e, "StartProcessing" ); }
return true;
}
void interface5::internal::task_base::destroy( task& victim ) {
__TBB_ASSERT( victim.prefix().ref_count== (ConcurrentWaitsEnabled(victim) ? 1 : 0), "Task being destroyed must not have children" );
__TBB_ASSERT( victim.state()==task::allocated, "illegal state for victim task" );
task* parent = victim.parent();
victim.~task();
if( parent ) {
__TBB_ASSERT( parent->state()==task::allocated, "attempt to destroy child of running or corrupted parent?" );
parent->internal_decrement_ref_count();
// Despite last reference to *parent removed, it should not be destroyed (documented behavior).
}
governor::local_scheduler()->free_task<no_hint>( victim );
}
bool
device_ap240::acquire( task& task )
{
auto rcode = AcqrsD1_acquire( task.inst() );
if ( rcode != VI_SUCCESS ) {
task::checkError( task.inst(), rcode, "device_ap240::acquire",__FILE__,__LINE__,__FUNCTION__);
if ( rcode == ACQIRIS_ERROR_INSTRUMENT_RUNNING )
AcqrsD1_stopAcquisition( task.inst() );
std::this_thread::sleep_for( std::chrono::milliseconds( 1000 ) );
}
return rcode == VI_SUCCESS;
}
void interface5::internal::task_base::destroy( task& victim ) {
// 1 may be a guard reference for wait_for_all, which was not reset because
// of concurrent_wait mode or because prepared root task was not actually used
// for spawning tasks (as in structured_task_group).
__TBB_ASSERT( (intptr_t)victim.prefix().ref_count <= 1, "Task being destroyed must not have children" );
__TBB_ASSERT( victim.state()==task::allocated, "illegal state for victim task" );
task* parent = victim.parent();
victim.~task();
if( parent ) {
__TBB_ASSERT( parent->state()==task::allocated, "attempt to destroy child of running or corrupted parent?" );
parent->internal_decrement_ref_count();
// Even if the last reference to *parent is removed, it should not be spawned (documented behavior).
}
governor::local_scheduler()->free_task<no_hint>( victim );
}
bool
device_ap240::digitizer_setup( task& task, acqrscontrols::ap240::method& m )
{
assert( m.hor_.mode == 0 );
auto inst = task.inst();
ViStatus status;
if ( ( status = AcqrsD1_configHorizontal( inst, m.hor_.sampInterval, m.hor_.delayTime ) ) == ACQIRIS_WARN_SETUP_ADAPTED ) {
ViReal64 sampInterval, delay;
if ( AcqrsD1_getHorizontal( inst, &sampInterval, &delay ) == VI_SUCCESS ) {
std::cerr << boost::format( "sampInterval: %e <= %e, delay: %e <= %e\n" )
% sampInterval % m.hor_.sampInterval
% delay % m.hor_.delayTime;
}
}
task::checkError( inst, status, "AcqrsD1_configHorizontal", __FILE__,__LINE__,__FUNCTION__);
if ( (status = AcqrsD1_configMemory( inst, m.hor_.nbrSamples, nbrSegments )) == ACQIRIS_WARN_SETUP_ADAPTED ) {
ViInt32 nbrSamples, nSegments;
if ( AcqrsD1_getMemory( inst, &nbrSamples, &nSegments ) == VI_SUCCESS )
m.hor_.nbrSamples = nbrSamples;
} else
task::checkError( inst, status, "configMemory",__FILE__,__LINE__,__FUNCTION__);
status = AcqrsD1_configMode( inst, 0, 0, 0 ); // 2 := averaging mode, 0 := normal data acq.
task::checkError( inst, status, "AcqrsD1_configMode",__FILE__,__LINE__,__FUNCTION__);
return true;
}
template<> bool
device<Simulate>::waitForEndOfAcquisition( task& task, int /* timeout */)
{
if ( simulator * simulator = task.simulator() )
return simulator->waitForEndOfAcquisition();
return false;
}
/// \warning call only from event loop thread, otherwise the behavior is undefined.
void on_connect(task<std::error_code>::future_move_type future, std::shared_ptr<task<void>::promise_type> promise) {
const auto ec = future.get();
if (ec) {
switch (ec.value()) {
case asio::error::already_started:
queue->push_back(promise);
break;
case asio::error::already_connected:
promise->set_value();
break;
default:
promise->set_exception(std::system_error(ec));
queue.apply([&](queue_type& queue) {
for (auto it = queue.begin(); it != queue.end(); ++it) {
(*it)->set_exception(std::system_error(ec));
}
queue.clear();
});
}
} else {
promise->set_value();
queue.apply([&](queue_type& queue) {
for (auto it = queue.begin(); it != queue.end(); ++it) {
(*it)->set_value();
}
queue.clear();
});
}
}
template<> bool
device<Simulate>::initial_setup( task& task, const method& m )
{
IAgMD2LogicDevicePtr spDpuA = task.spAgDrvr()->LogicDevices->Item[L"DpuA"];
IAgMD2LogicDeviceMemoryBankPtr spDDR3A = spDpuA->MemoryBanks->Item[L"DDR3A"];
IAgMD2LogicDeviceMemoryBankPtr spDDR3B = spDpuA->MemoryBanks->Item[L"DDR3B"];
// Create smart pointers to Channels and TriggerSource interfaces
IAgMD2ChannelPtr spCh1 = task.spAgDrvr()->Channels->Item[L"Channel1"];
IAgMD2TriggerSourcePtr spTrigSrc = task.spAgDrvr()->Trigger->Sources->Item[L"External1"];
try { spCh1->TimeInterleavedChannelList = "Channel2"; } catch ( _com_error& e ) { TERR(e, "TimeInterleavedChannelList"); }
try { spCh1->PutRange(m.front_end_range); } catch ( _com_error& e ) { TERR(e, "Range"); }
try { spCh1->PutOffset(m.front_end_offset); } catch ( _com_error& e ) { TERR(e, "Offset"); }
// Setup triggering
try { task.spAgDrvr()->Trigger->ActiveSource = "External1"; } catch ( _com_error& e ) { TERR(e, "Trigger::ActiveSource"); }
try { spTrigSrc->PutLevel(m.ext_trigger_level); } catch ( _com_error& e ) { TERR(e, "TriggerSource::Level"); }
// Calibrate
ADTRACE() << "Calibrating...";
try { task.spAgDrvr()->Calibration->SelfCalibrate(); } catch ( _com_error& e ) { TERR(e, "Calibration::SelfCalibrate"); }
// Set the sample rate and nbr of samples to acquire
double sample_rate = 3.2E9;
try { task.spAgDrvr()->Acquisition->PutSampleRate(sample_rate); } catch (_com_error& e) { TERR(e,"SampleRate"); }
try { spCh1->Filter->Bypass = 1; } catch ( _com_error& e ) { TERR( e, "Bandwidth" ); } // invalid value
ADTRACE() << "Apply setup...";
try { task.spAgDrvr()->Acquisition->ApplySetup(); } catch ( _com_error& e ) { TERR( e, "ApplySetup" ); }
std::this_thread::sleep_for( std::chrono::milliseconds( 1000 ) );
return true;
}
void task_pool::process_task(task& tsk)
{
if (tsk.m_flags & cTaskFlagObject)
tsk.m_pObj->execute_task(tsk.m_data, tsk.m_pData_ptr);
else
tsk.m_callback(tsk.m_data, tsk.m_pData_ptr);
atomic_decrement32(&m_num_outstanding_tasks);
}
bool
device_ap240::waitForEndOfAcquisition( task& task, int timeout )
{
return AcqrsD1_waitForEndOfAcquisition( task.inst(), ViInt32( timeout ) ) == VI_SUCCESS;
// case VI_SUCCESS: return success;
// case ACQIRIS_ERROR_ACQ_TIMEOUT: return error_timeout;
// case ACQIRIS_ERROR_OVERLOAD: return error_overload; // if a channel/trigger overload was detected.
// case ACQIRIS_ERROR_IO_READ: return error_io_read; // if a link error has been detected (e.g. PCI link lost).
// case ACQIRIS_ERROR_INSTRUMENT_STOPPED: return error_stopped; // if the acquisition was not started beforehand
}
void task_pool::process_task(task &tsk)
{
if (tsk.m_flags & cTaskFlagObject)
tsk.m_pObj->execute_task(tsk.m_data, tsk.m_pData_ptr);
else
tsk.m_callback(tsk.m_data, tsk.m_pData_ptr);
if (atomic_increment32(&m_total_completed_tasks) == m_total_submitted_tasks)
{
// Try to signal the semaphore (the max count is 1 so this may actually fail).
m_all_tasks_completed.try_release();
}
}
void task_pool::process_task(task& tsk)
{
if (tsk.m_flags & cTaskFlagObject)
tsk.m_pObj->execute_task(tsk.m_data, tsk.m_pData_ptr);
else
tsk.m_callback(tsk.m_data, tsk.m_pData_ptr);
m_task_condition_var.lock();
m_num_outstanding_tasks--;
m_task_condition_var.unlock();
}
tbb::task* execute() {
// Capture execution order in the very beginning
int execution_order = 2 - my_successor->decrement_ref_count();
// Create some local work.
TaskGenerator& p = *new( allocate_root() ) TaskGenerator(2,2);
spawn_root_and_wait(p);
if( execution_order==2 ) { // the "slower" of two peer tasks
++nCompletedPairs;
// Of course execution order can differ from dequeue order.
// But there is no better approximation at hand; and a single worker
// will execute in dequeue order, which is enough for our check.
if (my_enqueue_order==execution_order)
++nOrderedPairs;
FireTwoTasks(my_track);
destroy(*my_successor);
}
return NULL;
}
template<> bool
device<UserFDK>::waitForEndOfAcquisition( task& task, int timeout )
{
(void)timeout;
//Wait for the end of the acquisition
long wait_for_end = 0x80000000;
IAgMD2LogicDevicePtr spDpuA = task.spAgDrvr()->LogicDevices->Item[L"DpuA"];
int count = 0;
while ( wait_for_end >= 0x80000000 ) {
std::this_thread::sleep_for( std::chrono::milliseconds( 200 ) );
try { spDpuA->ReadRegisterInt32( 0x3308, &wait_for_end ); } catch ( _com_error& e ) { TERR(e, "ReadRegisterInt32"); }
if ( ++count > 15 ) {
ADTRACE() << "U5303A::waitForEndOfAcqisition timed out";
return false;
}
}
return true;
}
bool
device_ap240::initial_setup( task& task, acqrscontrols::ap240::method& m )
{
ViStatus status;
ViStatus * pStatus = &status;
auto inst_ = task.inst();
if ( ( ( m.channels_ & 03 ) == 03 ) && ( m.hor_.sampInterval < 0.51e-9 ) ) { // if 2ch acquisition,
m.hor_.sampInterval = 1.0e-9;
}
int nAveragerDelay(0);
if ( m.hor_.mode == 2 ) {
m.hor_.nbrSamples = m.hor_.nbrSamples + 32 & ~0x1f; // fold of 32, can't be zero
double delay = m.hor_.delayTime >= 0 ? m.hor_.delayTime : 0; // averager mode can't be negative
if ( m.hor_.mode == 0 )
nAveragerDelay = int32_t( delay / m.hor_.sampInterval + 0.5 ) & ~0x1f; // fold of 32, can be zero
else
nAveragerDelay = int32_t( delay / m.hor_.sampInterval + 0.5 ) + 32 & ~0x1f; // fold of 32, can't be zero
}
// trigger setup
if ( ( status = AcqrsD1_configTrigClass( inst_
, m.trig_.trigClass, m.trig_.trigPattern, 0, 0, 0, 0 ) )
== ACQIRIS_WARN_SETUP_ADAPTED ) {
ViInt32 trigClass, trigPattern, a, b; ViReal64 c, d;
if ( AcqrsD1_getTrigClass( inst_, &trigClass, &trigPattern, &a, &b, &c, &d ) == VI_SUCCESS ) {
std::cerr << boost::format( "trigClass: %x <- %x, trigPattern: %x <- %x")
% trigClass % m.trig_.trigClass % trigPattern % m.trig_.trigPattern << std::endl;
}
}
task::checkError( inst_, status, "AcqrsD1_configTrigClass", __FILE__,__LINE__,__FUNCTION__);
ViInt32 trigChannel = m.trig_.trigPattern & 0x80000000 ? (-1) : m.trig_.trigPattern & 0x3;
status = AcqrsD1_configTrigSource( inst_
, trigChannel
, m.trig_.trigCoupling
, m.trig_.trigSlope //m.ext_trigger_slope // pos(0), neg(1)
, m.trig_.trigLevel1 //m.ext_trigger_level // 500
, m.trig_.trigLevel2 );
task::checkError( inst_, status, "AcqrsD1_configTrigSource", __FILE__,__LINE__,__FUNCTION__);
// vertical setup
const int chlist [] = { -1, 1, 2 };
int idx = 0;
for ( auto& v: { m.ext_, m.ch1_, m.ch2_ } ) {
int channel = chlist[ idx++ ];
status = AcqrsD1_configVertical( inst_
, channel
, v.fullScale
, v.offset
, v.coupling
, v.bandwidth );
// std::cerr << "\tch(" << channel << ") offset: " << v.offset << " fs: " << v.fullScale << std::endl;
if ( status == ACQIRIS_WARN_SETUP_ADAPTED ) {
ViReal64 fullScale, offset; ViInt32 coupling, bandwidth;
if ( AcqrsD1_getVertical( inst_, channel, &fullScale, &offset, &coupling, &bandwidth ) == VI_SUCCESS ) {
std::cerr << boost::format( "\tfullscale,offset): (%g,%g) <- (%g,%g)" )
% fullScale % offset % v.fullScale % v.offset << std::endl;
}
} else
task::checkError( inst_, status, "configVertical",__FILE__,__LINE__,__FUNCTION__);
}
// channels configuration
if ( m.channels_ == 03 ) { // 2ch simultaneous acquisition
status = AcqrsD1_configChannelCombination( inst_, 1, m.channels_ ); // all channels use 1 converter each
task::checkError( inst_, status, "AcqrsD1_configChannelCombination",__FILE__,__LINE__,__FUNCTION__);
} else {
status = AcqrsD1_configChannelCombination( inst_, 2, m.channels_ ); // half of the channels use 2 converters each
task::checkError( inst_, status, "AcqrsD1_configChannelCombination",__FILE__,__LINE__,__FUNCTION__);
}
if ( status == ACQIRIS_WARN_SETUP_ADAPTED ) {
ViInt32 nbrConvertersPerChannel, usedChannels;
if ( AcqrsD1_getChannelCombination( inst_, &nbrConvertersPerChannel, &usedChannels ) == VI_SUCCESS ) {
std::cerr << boost::format("ChannelCombination( %x, %x ) <- (%x)" )
% nbrConvertersPerChannel % &usedChannels % m.channels_ << std::endl;
}
}
if ( m.channels_ & 01 ) {
status = AcqrsD1_configMultiInput( inst_, 1, 0 ); // channel 1 --> A
task::checkError( inst_, status, "AcqrsD1_configMultiInput",__FILE__,__LINE__,__FUNCTION__);
}
if ( m.channels_ & 02 ) {
status = AcqrsD1_configMultiInput( inst_, 2, 1 ); // channel 2 --> B
task::checkError( inst_, status, "AcqrsD1_configMultiInput",__FILE__,__LINE__,__FUNCTION__);
}
// "IO B" for Acquisition is active
status = AcqrsD1_configControlIO( inst_, pin_B, 21, 0, 0 );
task::checkError( inst_, status, "AcqrsD1_configControlIO(B)",__FILE__,__LINE__,__FUNCTION__);
// config trigger out
status = AcqrsD1_configControlIO( inst_, pin_TR, 1610 / 2, 0, 0 );
task::checkError( inst_, status, "AcqrsD1_configControlIO(TR)",__FILE__,__LINE__,__FUNCTION__);
if ( m.hor_.mode == 0 )
return digitizer_setup( task, m );
else if ( m.hor_.mode == 2 )
return averager_setup( task, m );
return false; // unknown mode
}
void allocate_continuation_proxy::free( task& mytask ) const {
// Restore the parent as it was before the corresponding allocate was called.
((task*)this)->prefix().parent = mytask.parent();
governor::local_scheduler()->free_task<local_task>(mytask);
}
bool
device_ap240::averager_setup( task& task, acqrscontrols::ap240::method& m )
{
// averager mode
assert( m.hor_.mode == 2 );
auto inst = task.inst();
ViStatus status;
status = AcqrsD1_configMode( inst, 2, 0, 0 ); // 2 := averaging mode
task::checkError( inst, status, "AcqrsD1_configMode",__FILE__,__LINE__,__FUNCTION__);
ViInt32 int32Arg = ViInt32( m.hor_.nbrSamples );
status = AcqrsD1_configAvgConfig( inst, 0, "NbrSamples", &int32Arg );
task::checkError( inst, status, "AcqirisD1_configAvgConfig, NbrSamples",__FILE__,__LINE__,__FUNCTION__);
int32Arg = ViInt32( ( int( m.hor_.delayTime / m.hor_.sampInterval + 0.5 ) + 32 ) & ~0x1f ); // fold of 32, can't be zero
status = AcqrsD1_configAvgConfig( inst, 0, "StartDelay", &int32Arg );
task::checkError( inst, status, "AcqrsD1_configAvgConfig StartDelay ", __FILE__,__LINE__,__FUNCTION__);
int32Arg = 0;
status = AcqrsD1_configAvgConfig( inst, 0, "StopDelay", &int32Arg );
task::checkError( inst, status, "AcqrsD1_configAvgConfig (StopDelay)",__FILE__,__LINE__,__FUNCTION__);
int32Arg = m.hor_.nbrAvgWaveforms;
status = AcqrsD1_configAvgConfig( inst, 0, "NbrWaveforms", &int32Arg );
task::checkError( inst, status, "AcqrsD1_configAvgConfig NbrWaveforms ",__FILE__,__LINE__,__FUNCTION__);
int32Arg = 0;
for ( auto& cmd: { "TrigAlways", "TrigResync", "ThresholdEnable", "TriggerTimeout" } ) {
status = AcqrsD1_configAvgConfig( inst, 0, cmd, &int32Arg );
task::checkError( inst, status, cmd,__FILE__,__LINE__,__FUNCTION__);
}
//-----------------------
int32Arg = 1;
for ( auto& cmd: { "TimestampClock", "MarkerLatchMode" } ) {
status = AcqrsD1_configAvgConfig( inst, 0, cmd, &int32Arg);
task::checkError( inst, status, cmd,__FILE__,__LINE__,__FUNCTION__);
}
do {
int32Arg = m.ch1_.invertData ? 1 : 0; // invert data for mass spectrum;
status = AcqrsD1_configAvgConfig( inst, 0, "InvertData", &int32Arg);
task::checkError( inst, status, "AcqrsD1_configAvgConfig (InvertData)", __FILE__,__LINE__,__FUNCTION__);
} while (0);
#if 0
// config "IO A" -- it seems not working for input level
status = AcqrsD1_configControlIO( inst, 1, 1, 0, 0 );
if ( task::checkError( inst, status, "AcqrsD1_configControlIO(A)" ) )
return false;
#endif
// config "IO B" for Acquisition is active (21)
status = AcqrsD1_configControlIO( inst, 2, 21, 0, 0 );
if ( task::checkError( inst, status, "AcqrsD1_configControlIO(B)", __FILE__,__LINE__,__FUNCTION__) )
return false;
// Configure the front panel trigger out (TR.)
// The appropriate offset is 1,610 mV.
status = AcqrsD1_configControlIO( inst, 9, 1610 / 2, 0, 0 );
if ( task::checkError( inst, status, "AcqrsD1_configControlIO (2)", __FILE__,__LINE__,__FUNCTION__) )
return false;
// "P2Control" set to average(out) --> disable for debug
int32Arg = 0;
status = AcqrsD1_configAvgConfig( inst, 0, "P1Control", &int32Arg );
task::checkError( inst, status, "AcqrsD1_configAvgConfig (P1Control)",__FILE__,__LINE__,__FUNCTION__);
// "P2Control" to disable
int32Arg = 0;
status = AcqrsD1_configAvgConfig( inst, 0, "P2Control", &int32Arg );
task::checkError( inst, status, "AcqrsD1_configAvgConfig (P2Control)",__FILE__,__LINE__,__FUNCTION__);
int32Arg = 0;
status = AcqrsD1_configAvgConfig( inst, 0, "DitherRange", &int32Arg );
task::checkError( inst, status, "AcqrsD1_configAvgConfig (DitherRange)",__FILE__,__LINE__,__FUNCTION__);
int32Arg = nbrSegments;
status = AcqrsD1_configAvgConfig( inst, 0, "NbrSegments", &int32Arg );
task::checkError( inst, status, "AcqrsD1_configAvgConfig (NbrSegments)",__FILE__,__LINE__,__FUNCTION__);
return true;
}
/** Doxygen generates namespace function from friend impls... */
bool operator< (task const & lhs, task const & rhs)
{
return lhs.get_id() < rhs.get_id();
}
/** Doxygen generates namespace function from friend impls... */
bool operator== (task const & lhs, task const & rhs)
{
return lhs.get_task_if() == rhs.get_task_if();
}
bool
device_ap240::readData( task& task, acqrscontrols::ap240::waveform& data, const acqrscontrols::ap240::method& m, int channel )
{
data.method_ = m;
AqDataDescriptor dataDesc;
// std::cout << "## device_ap240::readData ##" << std::endl;
if ( m.hor_.mode == 0 ) {
AqSegmentDescriptor segDesc;
if ( readData<int8_t, AqSegmentDescriptor >( task.inst(), m, channel, dataDesc, segDesc, data ) == VI_SUCCESS ) {
data.timeSinceEpoch_ = std::chrono::system_clock::now().time_since_epoch().count();
data.meta_.dataType = sizeof( int8_t );
data.meta_.indexFirstPoint = dataDesc.indexFirstPoint;
data.meta_.channel = channel;
data.meta_.actualAverages = 0;
data.meta_.actualPoints = dataDesc.returnedSamplesPerSeg; //data.d_.size();
data.meta_.flags = 0; // segDesc.flags; // markers not in digitizer
data.meta_.initialXOffset = data.method_.hor_.delayTime;
// digitizer mode return time since triggered.
data.meta_.initialXTimeSeconds = task::instance()->timestamp(); // computer's uptime
data.meta_.scaleFactor = dataDesc.vGain; // V = vGain * data - vOffset
data.meta_.scaleOffset = dataDesc.vOffset;
data.meta_.xIncrement = dataDesc.sampTime;
data.meta_.horPos = segDesc.horPos;
}
} else {
AqSegmentDescriptorAvg segDesc;
ViStatus rcode(0);
if ( ( rcode = readData<int32_t, AqSegmentDescriptorAvg>( task.inst(), m, channel, dataDesc, segDesc, data ) ) == VI_SUCCESS ) {
data.timeSinceEpoch_ = std::chrono::system_clock::now().time_since_epoch().count();
data.meta_.dataType = sizeof( int32_t );
data.meta_.indexFirstPoint = dataDesc.indexFirstPoint;
data.meta_.channel = channel;
data.meta_.actualAverages = segDesc.actualTriggersInSeg; // number of triggers for average
data.meta_.actualPoints = dataDesc.returnedSamplesPerSeg; // data.d_.size();
data.meta_.flags = segDesc.flags; // markers
data.meta_.initialXOffset = dataDesc.sampTime * data.method_.hor_.delayTime;
uint64_t tstamp = uint64_t(segDesc.timeStampHi) << 32 | segDesc.timeStampLo;
data.meta_.initialXTimeSeconds = double( tstamp ) / std::pico::den; // ps -> s
data.meta_.scaleFactor = dataDesc.vGain;
data.meta_.scaleOffset = dataDesc.vOffset;
data.meta_.xIncrement = dataDesc.sampTime;
data.meta_.horPos = segDesc.horPos;
} else {
if ( rcode == ACQIRIS_ERROR_READMODE && task::instance()->simulated() ) {
data.timeSinceEpoch_ = std::chrono::system_clock::now().time_since_epoch().count();
data.meta_.dataType = sizeof( int32_t );
data.meta_.indexFirstPoint = 0;
data.meta_.channel = channel;
data.meta_.actualAverages = m.hor_.nbrAvgWaveforms;
data.meta_.actualPoints = m.hor_.nbrSamples;
data.meta_.flags = 0;
data.meta_.initialXOffset = m.hor_.delayTime;
data.meta_.initialXTimeSeconds = task::instance()->timestamp();
data.meta_.scaleFactor = 1.0;
data.meta_.scaleOffset = 0.0;
data.meta_.xIncrement = m.hor_.sampInterval;
data.meta_.horPos = 0.0;
}
}
ADDEBUG() << "--------------> " << data.meta_.initialXTimeSeconds;
}
return true;
}
void AssertTaskCanceled(task<T> & task)
{
Assert::IsTrue(task.is_done());
Assert::ExpectException<task_canceled>([&task](){ task.get(); });
}
template<> bool
device<UserFDK>::initial_setup( task& task, const method& m )
{
IAgMD2LogicDevicePtr spDpuA = task.spAgDrvr()->LogicDevices->Item[L"DpuA"];
IAgMD2LogicDeviceMemoryBankPtr spDDR3A = spDpuA->MemoryBanks->Item[L"DDR3A"];
IAgMD2LogicDeviceMemoryBankPtr spDDR3B = spDpuA->MemoryBanks->Item[L"DDR3B"];
// Create smart pointers to Channels and TriggerSource interfaces
IAgMD2ChannelPtr spCh1 = task.spAgDrvr()->Channels->Item[L"Channel1"];
IAgMD2TriggerSourcePtr spTrigSrc = task.spAgDrvr()->Trigger->Sources->Item[L"External1"];
try { spCh1->TimeInterleavedChannelList = "Channel2"; } catch ( _com_error& e ) { TERR(e, "TimeInterleavedChannelList"); }
try { spCh1->PutRange(m.front_end_range); } catch ( _com_error& e ) { TERR(e, "Range"); }
try { spCh1->PutOffset(m.front_end_offset); } catch ( _com_error& e ) { TERR(e, "Offset"); }
// Setup triggering
try { task.spAgDrvr()->Trigger->ActiveSource = "External1"; } catch ( _com_error& e ) { TERR(e, "Trigger::ActiveSource"); }
try { spTrigSrc->PutLevel(m.ext_trigger_level); } catch ( _com_error& e ) { TERR(e, "TriggerSource::Level"); }
// Calibrate
ADTRACE() << "Calibrating...";
try { task.spAgDrvr()->Calibration->SelfCalibrate(); } catch ( _com_error& e ) { TERR(e, "Calibration::SelfCalibrate"); }
ADTRACE() << "Set the Mode FDK...";
try { task.spAgDrvr()->Acquisition->Mode = AgMD2AcquisitionModeUserFDK; } catch (_com_error& e) { TERR(e,"Acquisition::Mode"); }
// Set the sample rate and nbr of samples to acquire
const double sample_rate = 3.2E9;
try { task.spAgDrvr()->Acquisition->PutSampleRate(sample_rate); } catch (_com_error& e) { TERR(e,"SampleRate"); }
try { task.spAgDrvr()->Acquisition->UserControl->PostTrigger = (m.nbr_of_s_to_acquire/32) + 2; } catch ( _com_error& e ) { TERR(e,"PostTrigger"); }
try { task.spAgDrvr()->Acquisition->UserControl->PreTrigger = 0; } catch ( _com_error& e ) { TERR(e,"PreTrigger"); }
// Start on trigger
try { task.spAgDrvr()->Acquisition->UserControl->StartOnTriggerEnabled = 1; } catch ( _com_error& e ) { TERR( e,"StartOnTrigger" ); }
// Full bandwidth
try { spCh1->Filter->Bypass = 1; } catch ( _com_error& e ) { TERR( e, "Bandwidth" ); }
ADTRACE() << "Apply setup...";
try { task.spAgDrvr()->Acquisition->ApplySetup(); } catch ( _com_error& e ) { TERR( e, "ApplySetup" ); }
long seg_depth = (m.nbr_of_s_to_acquire >> 5) + 5;
long seg_ctrl = 0x80000; // Averager mode, Analog trigger
if (m.invert_signal == 1) {
seg_ctrl = seg_ctrl + 0x400000;
}
long delay_next_acq = 2;
try { spDpuA->WriteRegisterInt32(0x3300, seg_depth); } catch ( _com_error& e ) { TERR(e, "WriteRegisterInt32,0x3300"); }
try { spDpuA->WriteRegisterInt32(0x3304, m.nbr_of_averages); } catch ( _com_error& e ) { TERR(e, "WriteRegisterInt32,0x3304"); }
try { spDpuA->WriteRegisterInt32(0x3308, seg_ctrl); } catch ( _com_error& e ) { TERR(e, "WriteRegisterInt32,0x3308"); }
try { spDpuA->WriteRegisterInt32(0x3318, m.nbr_of_averages); } catch ( _com_error& e ) { TERR(e, "WriteRegisterInt32,0x3318"); }
try { spDpuA->WriteRegisterInt32(0x331c, m.nsa); } catch ( _com_error& e ) { TERR(e, "WriteRegisterInt32,0x331c"); }
try { spDpuA->WriteRegisterInt32(0x3320, m.delay_to_first_s);} catch ( _com_error& e ) { TERR(e, "WriteRegisterInt32,0x3320"); }
try { spDpuA->WriteRegisterInt32(0x3324, delay_next_acq); } catch ( _com_error& e ) { TERR(e, "WriteRegisterInt32,0x3324"); }
std::this_thread::sleep_for( std::chrono::milliseconds( 1000 ) );
// Memory settings
try { spDDR3A->PutAccessControl(AgMD2LogicDeviceMemoryBankAccessControlUserFirmware); } catch (_com_error& e){TERR(e,"DDR3A::AccessControl");}
try { spDDR3B->PutAccessControl(AgMD2LogicDeviceMemoryBankAccessControlUserFirmware); } catch (_com_error& e){TERR(e,"DDR3B::AccessControl");}
std::this_thread::sleep_for( std::chrono::milliseconds( 1000 ) );
return true;
}
