int x1205Enable(void)
{
u_char writeBuffer[5];
writeBuffer[0] = 0;
writeBuffer[1] = 0x3f;
writeBuffer[2] = 0x02;
TwMasterTransact(I2C_SLA_RTC, writeBuffer, 3, 0, 0, NUT_WAIT_INFINITE);
writeBuffer[2] = 0x06;
TwMasterTransact(I2C_SLA_RTC, writeBuffer, 3, 0, 0, NUT_WAIT_INFINITE);
return 1;
}
// Returns 0 on success, err code on err
uint8_t ds2482SendCmd(uint8_t cmd)
{
#if 1
// 50 msec is too much?
int ret = TwMasterTransact(DS2482I2cAddr, &cmd, 1, 0, 0, 50 );
if(ret < 0)
{
return TwMasterError();
}
return 0;
//return ret == 0 ? 0 : -1;
#else
uint8_t data;
uint8_t i2cStat;
// send command
i2cStat = i2cMasterSendNI(DS2482I2cAddr, 1, &cmd);
if(i2cStat == I2C_ERROR_NODEV)
{
printf("No I2C Device\r\n");
return i2cStat;
}
// check status
i2cStat = i2cMasterReceiveNI(DS2482I2cAddr, 1, &data);
// rprintf("Cmd=0x%x Status=0x%x\r\n", cmd, data);
return (i2cStat == I2C_OK);
#endif
}
/*!
* \brief Read RTC registers.
*
* \param reg The first register to read.
* \param buff Pointer to a buffer that receives the register contents.
* \param cnt The number of registers to read.
*
* \return 0 on success or -1 in case of an error.
*/
int PcfRtcReadRegs(uint8_t reg, uint8_t *buff, size_t cnt)
{
int rc = -1;
if (TwMasterTransact(I2C_SLA_RTC, ®, 1, buff, cnt, NUT_WAIT_INFINITE) == cnt) {
rc = 0;
}
return rc;
}
// Returns 0 on success, err code on err
static uint8_t i2cMasterReceiveNI(uint8_t addr, uint8_t len, uint8_t *buf)
{
int ret = TwMasterTransact( addr, 0, 0, buf, len, 50 );
if(ret < 0)
{
return TwMasterError();
}
return 0;
}
/*!
* \brief Store buffer contents in non-volatile EEPROM.
*
* The EEPROM of the X122x has a capacity of 512 bytes, while the X1286 is
* able to store 32 kBytes.
*
* \param addr Storage start location.
* \param buff Points to a buffer that contains the bytes to store.
* \param len Number of valid bytes in the buffer.
*
* \return 0 on success or -1 in case of an error.
*/
int X12EepromWrite(u_int addr, CONST void *buff, size_t len)
{
int rc = 0;
u_char *wbuf;
size_t wlen;
CONST u_char *wp = buff;
/*
* Loop for each page to be written to.
*/
while (len)
{
/* Do not cross page boundaries. */
wlen = EEPROM_PAGE_SIZE - (addr & (EEPROM_PAGE_SIZE - 1));
if (wlen > len)
{
wlen = len;
}
/* Allocate and set a TWI write buffer. */
if ((wbuf = malloc(wlen + 2)) == 0)
{
rc = -1;
break;
}
wbuf[0] = (u_char)(addr >> 8);
wbuf[1] = (u_char)addr;
memcpy(wbuf + 2, (void *)wp, wlen);
/* Enable EEPROM write access and send the write buffer. */
if ((rc = X12WriteEnable(1)) == 0)
{
rc = TwMasterTransact(I2C_SLA_EEPROM, wbuf, wlen + 2, 0, 0, NUT_WAIT_INFINITE);
}
/* Release the buffer and check the result. */
free(wbuf);
if (rc)
{
break;
}
len -= wlen;
addr += wlen;
wp += wlen;
/* Poll for write cycle finished. */
if ((rc = X12WaitReady()) != 0)
{
break;
}
}
X12WriteEnable(0);
return(rc);
}
/*!
* \brief Wait until non-volatile write cycle finished.
*
* \return 0 on success or -1 in case of an error.
*/
static int X12WaitReady(void)
{
u_char poll;
int cnt = 20;
/* Poll for write cycle finished. */
while (--cnt && TwMasterTransact(I2C_SLA_EEPROM, 0, 0, &poll, 1, NUT_WAIT_INFINITE) == -1)
{
NutSleep(1);
}
return(cnt ? 0 : -1);
}
/*!
* \brief Read contents from non-volatile EEPROM.
*
* \param addr Start location.
* \param buff Points to a buffer that receives the contents.
* \param len Number of bytes to read.
*
* \return 0 on success or -1 in case of an error.
*/
int X12EepromRead(u_int addr, void *buff, size_t len)
{
int rc = -1;
u_char wbuf[2];
wbuf[0] = (u_char)(addr >> 8);
wbuf[1] = (u_char)addr;
if (TwMasterTransact(I2C_SLA_EEPROM, wbuf, 2, buff, len, NUT_WAIT_INFINITE) == len)
{
rc = 0;
}
return(rc);
}
/*!
* \brief Read RTC registers.
*
* \param reg The first register to read.
* \param buff Pointer to a buffer that receives the register contents.
* \param cnt The number of registers to read.
*
* \return 0 on success or -1 in case of an error.
*/
int X12RtcReadRegs(u_char reg, u_char *buff, size_t cnt)
{
int rc = -1;
u_char wbuf[2];
wbuf[0] = 0;
wbuf[1] = reg;
if (TwMasterTransact(I2C_SLA_RTC, wbuf, 2, buff, cnt, NUT_WAIT_INFINITE) == cnt)
{
rc = 0;
}
return(rc);
}
int x1205WriteByte(unsigned char addr, unsigned char data ) //, unsigned char cnt)
{
int retval = 0;
u_char writeBuffer[3];
writeBuffer[0] = 0;
writeBuffer[1] = addr;
writeBuffer[2] = data;
TwMasterTransact(I2C_SLA_RTC, writeBuffer, 3, 0, 0, NUT_WAIT_INFINITE);
return retval;
}
/*!
* \brief Enable or disable write access.
*
* \param on Write access is disabled if this parameter is 0, or
* enabled otherwise.
*
* \return 0 on success or -1 in case of an error.
*/
static int X12WriteEnable(int on)
{
int rc;
u_char buf[3];
buf[0] = 0;
buf[1] = 0x3F;
if (on)
{
buf[2] = 0x02;
if ((rc = TwMasterTransact(I2C_SLA_RTC, buf, 3, 0, 0, NUT_WAIT_INFINITE)) == 0)
{
buf[2] = 0x06;
rc = TwMasterTransact(I2C_SLA_RTC, buf, 3, 0, 0, NUT_WAIT_INFINITE);
}
}
else
{
buf[2] = 0x00;
rc = TwMasterTransact(I2C_SLA_RTC, buf, 3, 0, 0, NUT_WAIT_INFINITE);
}
return(rc);
}
void i2c_findslaves() {
byte slaveaddr = TWSLA_MIN; /* Lowest slave address */
byte data[2];
byte recvdata[2];
memset(data, '\0', 2);
data[0] = I2C_DATA_PING;
for (; slaveaddr <= TWSLA_MAX; slaveaddr++) {
TwMasterTransact(slaveaddr, (void *)data, I2C_DATA_LENGTH,
(void *)recvdata, I2C_DATA_LENGTH, 0);
}
}
/*!
* \brief Write to RTC registers.
*
* \param nv Must be set to 1 when writing to non-volatile registers.
* In this case the routine will poll for write cycle
* completion before returning to the caller. Set to zero
* if writing to volatile registers.
* \param buff This buffer must contain all bytes to be transfered to
* the RTC chip, including the register address.
* \param cnt Number of valid bytes in the buffer.
*
* \return 0 on success or -1 in case of an error.
*/
int X12RtcWrite(int nv, CONST u_char *buff, size_t cnt)
{
int rc;
if ((rc = X12WriteEnable(1)) == 0)
{
rc = TwMasterTransact(I2C_SLA_RTC, buff, cnt, 0, 0, NUT_WAIT_INFINITE);
if (rc == 0 && nv)
{
rc = X12WaitReady();
}
X12WriteEnable(0);
}
return(rc);
}
// Returns 0 on success, err code on err
uint8_t ds2482SendCmdArg(uint8_t cmd, uint8_t arg)
{
#if 1
uint8_t data[2];
// prepare command
data[0] = cmd;
data[1] = arg;
//DEBUG_PUTS("ds2482SendCmdArg TwMasterTransact.. ");
// 50 msec is too much?
int ret = TwMasterTransact(DS2482I2cAddr, data, 2, 0, 0, 50 );
//DEBUG_PUTS("ds2482SendCmdArg TwMasterTransact out.. ");
if(ret < 0)
{
return TwMasterError();
}
return 0;
//return ret == reply_size ? 0 : -1;
#else
uint8_t data[2];
uint8_t i2cStat;
// prepare command
data[0] = cmd;
data[1] = arg;
// send command
i2cStat = i2cMasterSendNI(DS2482I2cAddr, 2, data);
if(i2cStat == I2C_ERROR_NODEV)
{
printf("No I2C Device\r\n");
return i2cStat;
}
// check status
i2cStat = i2cMasterReceiveNI(DS2482I2cAddr, 1, data);
// rprintf("Cmd=0x%x Arg=0x%x Status=0x%x\r\n", cmd, arg, data[0]);
return (i2cStat == I2C_OK);
#endif
}
int x1205ReadByte(unsigned char addr)
{
int retval = 1;
u_char writeBuffer[2];
u_char readBuffer[2];
writeBuffer[0] = 0;
writeBuffer[1] = addr; // SC register in x1205 RTC, datasheet page 10
// TwMasterTransact schrijft eerst en leest daarna. Dit is wat we willen.
// Schrijf eerst werk register we willen lezen, daarna lees het register
if( TwMasterTransact(I2C_SLA_RTC, writeBuffer, 2, readBuffer, 2, NUT_WAIT_INFINITE) != 2 )
{
retval = -1;
LogMsg_P(LOG_INFO, PSTR("error x1205readByte()"));
}
else
{
LogMsg_P(LOG_INFO, PSTR("x1205 says: [%02x][%02x]"), readBuffer[0], readBuffer[1] );
}
return retval;
}
/*!
* \brief Write to RTC registers.
*
* \param nv Must be set to 1 when writing to non-volatile registers.
* In this case the routine will poll for write cycle
* completion before returning to the caller. Set to zero
* if writing to volatile registers.
* \param buff This buffer must contain all bytes to be transfered to
* the RTC chip, including the register address.
* \param cnt Number of valid bytes in the buffer.
*
* \return 0 on success or -1 in case of an error.
*/
int PcfRtcWrite(int nv, const uint8_t *buff, size_t cnt)
{
return TwMasterTransact(I2C_SLA_RTC, buff, cnt, 0, 0, NUT_WAIT_INFINITE);
}
int readI2C(void* params) {
struct I2CParams* par = (struct I2CParams*) params;
int ret = 0;
TwMasterTransact(par->address, &(par->command), 1, &ret, 1, 500);
return ret;
}
